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From: bd-phuc@jinso.co.jp
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/8] ARM64: dts: r8a7795: Add CMT device to DT
Date: Fri, 09 Sep 2016 11:43:08 +0000	[thread overview]
Message-ID: <1473421394-9745-3-git-send-email-bd-phuc@jinso.co.jp> (raw)
In-Reply-To: <1473421394-9745-1-git-send-email-bd-phuc@jinso.co.jp>

From: Bui Duc Phuc <bd-phuc@jinso.co.jp>

Add the CMT0 and CMT1 counters to the r8a7795 device tree

Signed-off-by: Bui Duc Phuc <bd-phuc@jinso.co.jp>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b902356..2333830 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -312,6 +312,36 @@
 					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		};
 
+		cmt0: timer@e60f0000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe60f0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 303>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0x60>;
+	         };
+
+		cmt1: timer@e6130000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 302>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0xff>;
+	         };
+
 		cpg: clock-controller@e6150000 {
 			compatible = "renesas,r8a7795-cpg-mssr";
 			reg = <0 0xe6150000 0 0x1000>;
-- 
2.7.4


WARNING: multiple messages have this Message-ID
From: bd-phuc-HEF513clHfp3+QwDJ9on6Q@public.gmane.org
To: daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-sh-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org,
	linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org,
	magnus.damm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	horms-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org,
	kuninori.morimoto.gx-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org,
	yoshihiro.shimoda.uh-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org,
	ryusuke.sakato.bx-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org,
	h-inayoshi-HEF513clHfp3+QwDJ9on6Q@public.gmane.org,
	cm-hiep-HEF513clHfp3+QwDJ9on6Q@public.gmane.org,
	nv-dung-HEF513clHfp3+QwDJ9on6Q@public.gmane.org
Subject: [PATCH 2/8] ARM64: dts: r8a7795: Add CMT device to DT
Date: Fri,  9 Sep 2016 20:43:08 +0900	[thread overview]
Message-ID: <1473421394-9745-3-git-send-email-bd-phuc@jinso.co.jp> (raw)
In-Reply-To: <1473421394-9745-1-git-send-email-bd-phuc-HEF513clHfp3+QwDJ9on6Q@public.gmane.org>

From: Bui Duc Phuc <bd-phuc-HEF513clHfp3+QwDJ9on6Q@public.gmane.org>

Add the CMT0 and CMT1 counters to the r8a7795 device tree

Signed-off-by: Bui Duc Phuc <bd-phuc-HEF513clHfp3+QwDJ9on6Q@public.gmane.org>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b902356..2333830 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -312,6 +312,36 @@
 					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		};
 
+		cmt0: timer@e60f0000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe60f0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 303>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0x60>;
+	         };
+
+		cmt1: timer@e6130000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 302>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0xff>;
+	         };
+
 		cpg: clock-controller@e6150000 {
 			compatible = "renesas,r8a7795-cpg-mssr";
 			reg = <0 0xe6150000 0 0x1000>;
-- 
2.7.4

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WARNING: multiple messages have this Message-ID
From: bd-phuc@jinso.co.jp
To: daniel.lezcano@linaro.org, tglx@linutronix.de
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-sh@vger.kernel.org, geert+renesas@glider.be,
	linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@vger.kernel.org,
	laurent.pinchart+renesas@ideasonboard.com, magnus.damm@gmail.com,
	horms@verge.net.au, kuninori.morimoto.gx@renesas.com,
	yoshihiro.shimoda.uh@renesas.com, ryusuke.sakato.bx@renesas.com,
	h-inayoshi@jinso.co.jp, cm-hiep@jinso.co.jp, nv-dung@jinso.co.jp
Subject: [PATCH 2/8] ARM64: dts: r8a7795: Add CMT device to DT
Date: Fri,  9 Sep 2016 20:43:08 +0900	[thread overview]
Message-ID: <1473421394-9745-3-git-send-email-bd-phuc@jinso.co.jp> (raw)
In-Reply-To: <1473421394-9745-1-git-send-email-bd-phuc@jinso.co.jp>

From: Bui Duc Phuc <bd-phuc@jinso.co.jp>

Add the CMT0 and CMT1 counters to the r8a7795 device tree

Signed-off-by: Bui Duc Phuc <bd-phuc@jinso.co.jp>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b902356..2333830 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -312,6 +312,36 @@
 					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		};
 
+		cmt0: timer@e60f0000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe60f0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 303>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0x60>;
+	         };
+
+		cmt1: timer@e6130000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 302>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0xff>;
+	         };
+
 		cpg: clock-controller@e6150000 {
 			compatible = "renesas,r8a7795-cpg-mssr";
 			reg = <0 0xe6150000 0 0x1000>;
-- 
2.7.4


WARNING: multiple messages have this Message-ID
From: bd-phuc@jinso.co.jp (bd-phuc at jinso.co.jp)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/8] ARM64: dts: r8a7795: Add CMT device to DT
Date: Fri,  9 Sep 2016 20:43:08 +0900	[thread overview]
Message-ID: <1473421394-9745-3-git-send-email-bd-phuc@jinso.co.jp> (raw)
In-Reply-To: <1473421394-9745-1-git-send-email-bd-phuc@jinso.co.jp>

From: Bui Duc Phuc <bd-phuc@jinso.co.jp>

Add the CMT0 and CMT1 counters to the r8a7795 device tree

Signed-off-by: Bui Duc Phuc <bd-phuc@jinso.co.jp>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b902356..2333830 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -312,6 +312,36 @@
 					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		};
 
+		cmt0: timer at e60f0000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe60f0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 303>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0x60>;
+	         };
+
+		cmt1: timer at e6130000 {
+			compatible = "renesas,cmt-48-gen3";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 302>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,channels-mask = <0xff>;
+	         };
+
 		cpg: clock-controller at e6150000 {
 			compatible = "renesas,r8a7795-cpg-mssr";
 			reg = <0 0xe6150000 0 0x1000>;
-- 
2.7.4

  parent reply	other threads:[~2016-09-09 11:43 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-09 11:43 [PATCH 0/8] clocksource: sh_cmt: Add R-car Gen3 CMT0/1 support bd-phuc
2016-09-09 11:43 ` bd-phuc at jinso.co.jp
2016-09-09 11:43 ` bd-phuc
2016-09-09 11:43 ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-09 11:43 ` [PATCH 1/8] devicetree: binding: R-car Gen3 CMT0 and CMT1 bindings bd-phuc
2016-09-09 11:43   ` bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-09 12:07   ` Geert Uytterhoeven
2016-09-09 12:07     ` Geert Uytterhoeven
2016-09-09 12:07     ` Geert Uytterhoeven
2016-09-09 12:07     ` Geert Uytterhoeven
2016-09-12 15:12     ` Bui Duc Phuc
2016-09-12 15:12       ` Bui Duc Phuc
2016-09-12 15:12       ` Bui Duc Phuc
2016-09-12 15:12       ` Bui Duc Phuc
2016-09-09 11:43 ` bd-phuc [this message]
2016-09-09 11:43   ` [PATCH 2/8] ARM64: dts: r8a7795: Add CMT device to DT bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-09 11:43 ` [PATCH 3/8] ARM64: dts: r8a7796: " bd-phuc
2016-09-09 11:43   ` bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-09 11:43 ` [PATCH 4/8] clk: renesas: r8a7795: Add CMT clocks bd-phuc
2016-09-09 11:43   ` bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-12  8:31   ` Geert Uytterhoeven
2016-09-12  8:31     ` Geert Uytterhoeven
2016-09-12  8:31     ` Geert Uytterhoeven
2016-09-12  8:31     ` Geert Uytterhoeven
2016-09-12 14:57     ` Bui Duc Phuc
2016-09-12 14:57       ` Bui Duc Phuc
2016-09-12 14:57       ` Bui Duc Phuc
2016-09-12 14:57       ` Bui Duc Phuc
2016-09-09 11:43 ` [PATCH 5/8] clk: renesas: r8a7796: " bd-phuc
2016-09-09 11:43   ` bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-12  8:35   ` Geert Uytterhoeven
2016-09-12  8:35     ` Geert Uytterhoeven
2016-09-12  8:35     ` Geert Uytterhoeven
2016-09-12  8:35     ` Geert Uytterhoeven
2016-09-12 15:00     ` Bui Duc Phuc
2016-09-12 15:00       ` Bui Duc Phuc
2016-09-12 15:00       ` Bui Duc Phuc
2016-09-12 15:00       ` Bui Duc Phuc
2016-09-09 11:43 ` [PATCH 6/8] clocksource: sh_cmt: Support separate R-car Gen3 CMT0/1 bd-phuc
2016-09-09 11:43   ` bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-09 12:12   ` Laurent Pinchart
2016-09-09 12:12     ` Laurent Pinchart
2016-09-09 12:12     ` Laurent Pinchart
2016-09-09 11:43 ` [PATCH 7/8] clocksource: Kconfig: Modify CMT config support 64bit bd-phuc
2016-09-09 11:43   ` bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q
2016-09-09 11:47   ` Sergei Shtylyov
2016-09-09 11:47     ` Sergei Shtylyov
2016-09-09 11:47     ` Sergei Shtylyov
2016-09-09 11:47     ` Sergei Shtylyov
2016-09-09  3:06     ` Bui Duc Phuc
2016-09-09  3:06       ` Bui Duc Phuc
2016-09-09  3:06       ` Bui Duc Phuc
2016-09-09 12:08   ` Laurent Pinchart
2016-09-09 12:08     ` Laurent Pinchart
2016-09-09 12:08     ` Laurent Pinchart
2016-09-12  0:25     ` Bui Duc Phuc
2016-09-12  0:25       ` Bui Duc Phuc
2016-09-12  0:25       ` Bui Duc Phuc
2016-09-09 11:43 ` [PATCH 8/8] ARM64: defconfig: Enable SH_TIMER_CMT config option bd-phuc
2016-09-09 11:43   ` bd-phuc at jinso.co.jp
2016-09-09 11:43   ` bd-phuc
2016-09-09 11:43   ` bd-phuc-HEF513clHfp3+QwDJ9on6Q

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