* [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-12 8:22 ` Gerd Hoffmann
0 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2016-09-12 8:22 UTC (permalink / raw)
To: linux-arm-kernel
From: Eric Anholt <eric@anholt.net>
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made. With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.
Signed-off-by: Eric Anholt <eric@anholt.net>
squashed in:
ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
fixups by kraxel:
* fix spi0 name
* sort & group entries
* use pull defines
* add dpi group
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..7b03b63 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,209 @@
interrupt-controller;
#interrupt-cells = <2>;
+
+ /* Defines pin muxing groups according to
+ * BCM2835-ARM-Peripherals.pdf page 102.
+ *
+ * While each pin can have its mux selected
+ * for various functions individually, some
+ * groups only make sense to switch to a
+ * particular function together.
+ */
+ dpi_gpio4: dpi_gpio4 {
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
+ 12 13 14 15 16 17 18 19
+ 20 21 22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ emmc_gpio22: emmc_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ emmc_gpio34: emmc_gpio34 {
+ brcm,pins = <34 35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ brcm,pull = <BCM2835_PUD_OFF
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP>;
+ };
+ emmc_gpio48: emmc_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ gpclk0_gpio4: gpclk0_gpio4 {
+ brcm,pins = <4>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio5: gpclk1_gpio5 {
+ brcm,pins = <5>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio42: gpclk1_gpio42 {
+ brcm,pins = <42>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio44: gpclk1_gpio44 {
+ brcm,pins = <44>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio6: gpclk2_gpio6 {
+ brcm,pins = <6>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio43: gpclk2_gpio43 {
+ brcm,pins = <43>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ i2c0_gpio0: i2c0_gpio0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio32: i2c0_gpio32 {
+ brcm,pins = <32 34>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio44: i2c0_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ };
+ i2c1_gpio2: i2c1_gpio2 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c1_gpio44: i2c1_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ i2c_slave_gpio18: i2c_slave_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ jtag_gpio4: jtag_gpio4 {
+ brcm,pins = <4 5 6 12 13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio22: jtag_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ pcm_gpio18: pcm_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pcm_gpio28: pcm_gpio28 {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+
+ pwm0_gpio12: pwm0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio18: pwm0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm0_gpio40: pwm0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio13: pwm1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio19: pwm1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_gpio41: pwm1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio45: pwm1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ sdhost_gpio48: sdhost_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ spi0_gpio7: spi0_gpio7 {
+ brcm,pins = <7 8 9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi0_gpio35: spi0_gpio35 {
+ brcm,pins = <35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi1_gpio16: spi1_gpio16 {
+ brcm,pins = <16 17 18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ spi2_gpio40: spi2_gpio40 {
+ brcm,pins = <40 41 42 43 44 45>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ uart0_gpio14: uart0_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ /* Separate from the uart0_gpio14 group
+ * because it conflicts with spi1_gpio16, and
+ * people often run uart0 on the two pins
+ * without flow contrl.
+ */
+ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_gpio30: uart0_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ uart1_gpio14: uart1_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio32: uart1_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio36: uart1_gpio36 {
+ brcm,pins = <36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ uart1_gpio40: uart1_gpio40 {
+ brcm,pins = <40 41>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+ brcm,pins = <42 43>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
};
uart0: serial at 7e201000 {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-12 8:22 ` Gerd Hoffmann
0 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2016-09-12 8:22 UTC (permalink / raw)
To: linux-rpi-kernel, devicetree, linux-arm-kernel
Cc: eric, swarren, bcm-kernel-feedback-list, Gerd Hoffmann,
Rob Herring, Mark Rutland, Russell King, Florian Fainelli,
Ray Jui, Scott Branden, open list
From: Eric Anholt <eric@anholt.net>
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made. With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.
Signed-off-by: Eric Anholt <eric@anholt.net>
squashed in:
ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
fixups by kraxel:
* fix spi0 name
* sort & group entries
* use pull defines
* add dpi group
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..7b03b63 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,209 @@
interrupt-controller;
#interrupt-cells = <2>;
+
+ /* Defines pin muxing groups according to
+ * BCM2835-ARM-Peripherals.pdf page 102.
+ *
+ * While each pin can have its mux selected
+ * for various functions individually, some
+ * groups only make sense to switch to a
+ * particular function together.
+ */
+ dpi_gpio4: dpi_gpio4 {
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
+ 12 13 14 15 16 17 18 19
+ 20 21 22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ emmc_gpio22: emmc_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ emmc_gpio34: emmc_gpio34 {
+ brcm,pins = <34 35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ brcm,pull = <BCM2835_PUD_OFF
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP>;
+ };
+ emmc_gpio48: emmc_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ gpclk0_gpio4: gpclk0_gpio4 {
+ brcm,pins = <4>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio5: gpclk1_gpio5 {
+ brcm,pins = <5>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio42: gpclk1_gpio42 {
+ brcm,pins = <42>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio44: gpclk1_gpio44 {
+ brcm,pins = <44>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio6: gpclk2_gpio6 {
+ brcm,pins = <6>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio43: gpclk2_gpio43 {
+ brcm,pins = <43>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ i2c0_gpio0: i2c0_gpio0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio32: i2c0_gpio32 {
+ brcm,pins = <32 34>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio44: i2c0_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ };
+ i2c1_gpio2: i2c1_gpio2 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c1_gpio44: i2c1_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ i2c_slave_gpio18: i2c_slave_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ jtag_gpio4: jtag_gpio4 {
+ brcm,pins = <4 5 6 12 13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio22: jtag_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ pcm_gpio18: pcm_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pcm_gpio28: pcm_gpio28 {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+
+ pwm0_gpio12: pwm0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio18: pwm0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm0_gpio40: pwm0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio13: pwm1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio19: pwm1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_gpio41: pwm1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio45: pwm1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ sdhost_gpio48: sdhost_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ spi0_gpio7: spi0_gpio7 {
+ brcm,pins = <7 8 9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi0_gpio35: spi0_gpio35 {
+ brcm,pins = <35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi1_gpio16: spi1_gpio16 {
+ brcm,pins = <16 17 18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ spi2_gpio40: spi2_gpio40 {
+ brcm,pins = <40 41 42 43 44 45>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ uart0_gpio14: uart0_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ /* Separate from the uart0_gpio14 group
+ * because it conflicts with spi1_gpio16, and
+ * people often run uart0 on the two pins
+ * without flow contrl.
+ */
+ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_gpio30: uart0_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ uart1_gpio14: uart1_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio32: uart1_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio36: uart1_gpio36 {
+ brcm,pins = <36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ uart1_gpio40: uart1_gpio40 {
+ brcm,pins = <40 41>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+ brcm,pins = <42 43>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
};
uart0: serial@7e201000 {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
2016-09-12 8:22 ` Gerd Hoffmann
@ 2016-09-12 18:19 ` Stefan Wahren
-1 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2016-09-12 18:19 UTC (permalink / raw)
To: Gerd Hoffmann, linux-rpi-kernel, linux-arm-kernel, devicetree
Cc: Scott Branden, Ray Jui, Russell King, open list, Rob Herring,
bcm-kernel-feedback-list, Mark Rutland, Florian Fainelli
Hi Gerd,
> Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> geschrieben:
>
>
> From: Eric Anholt <eric@anholt.net>
>
> The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> function selects do for the pins, and there are a bunch of obvious
> groupings to be made. With these created, we'll be able to replace
> bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> references to specific groups we want enabled.
>
> Signed-off-by: Eric Anholt <eric@anholt.net>
>
> squashed in:
> ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
>
> fixups by kraxel:
> * fix spi0 name
> * sort & group entries
> * use pull defines
> * add dpi group
this looks like a changelog. Please move this at the proper place before the
first "diff" and specify the version.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
> arch/arm/boot/dts/bcm283x.dtsi | 203
> +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 203 insertions(+)
>
> diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> index 4d9f3ab..7b03b63 100644
> --- a/arch/arm/boot/dts/bcm283x.dtsi
> +++ b/arch/arm/boot/dts/bcm283x.dtsi
> @@ -131,6 +131,209 @@
>
> interrupt-controller;
> #interrupt-cells = <2>;
> +
> + /* Defines pin muxing groups according to
> + * BCM2835-ARM-Peripherals.pdf page 102.
> + *
> + * While each pin can have its mux selected
> + * for various functions individually, some
> + * groups only make sense to switch to a
> + * particular function together.
> + */
> + dpi_gpio4: dpi_gpio4 {
> + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> + 12 13 14 15 16 17 18 19
> + 20 21 22 23 24 25 26 27>;
> + brcm,function = <BCM2835_FSEL_ALT2>;
> + };
s/dpi_gpio4/dpi_gpio0
> + emmc_gpio22: emmc_gpio22 {
> + brcm,pins = <22 23 24 25 26 27>;
> + brcm,function = <BCM2835_FSEL_ALT3>;
> + };
> + emmc_gpio34: emmc_gpio34 {
> + brcm,pins = <34 35 36 37 38 39>;
> + brcm,function = <BCM2835_FSEL_ALT3>;
> + brcm,pull = <BCM2835_PUD_OFF
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP>;
> + };
> + emmc_gpio48: emmc_gpio48 {
> + brcm,pins = <48 49 50 51 52 53>;
> + brcm,function = <BCM2835_FSEL_ALT3>;
> + };
Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
for the same eMMC interface. I thought there is a eMMC interface and a SD host
interface with different DMA channels.
> +
> ...
> +
> + sdhost_gpio48: sdhost_gpio48 {
> + brcm,pins = <48 49 50 51 52 53>;
> + brcm,function = <BCM2835_FSEL_ALT0>;
> + };
I think this incorrect. There is no function ALT0 for these pins, only ALT3.
Regards
Stefan
^ permalink raw reply [flat|nested] 31+ messages in thread* [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-12 18:19 ` Stefan Wahren
0 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2016-09-12 18:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi Gerd,
> Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> geschrieben:
>
>
> From: Eric Anholt <eric@anholt.net>
>
> The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> function selects do for the pins, and there are a bunch of obvious
> groupings to be made. With these created, we'll be able to replace
> bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> references to specific groups we want enabled.
>
> Signed-off-by: Eric Anholt <eric@anholt.net>
>
> squashed in:
> ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
>
> fixups by kraxel:
> * fix spi0 name
> * sort & group entries
> * use pull defines
> * add dpi group
this looks like a changelog. Please move this at the proper place before the
first "diff" and specify the version.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
> arch/arm/boot/dts/bcm283x.dtsi | 203
> +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 203 insertions(+)
>
> diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> index 4d9f3ab..7b03b63 100644
> --- a/arch/arm/boot/dts/bcm283x.dtsi
> +++ b/arch/arm/boot/dts/bcm283x.dtsi
> @@ -131,6 +131,209 @@
>
> interrupt-controller;
> #interrupt-cells = <2>;
> +
> + /* Defines pin muxing groups according to
> + * BCM2835-ARM-Peripherals.pdf page 102.
> + *
> + * While each pin can have its mux selected
> + * for various functions individually, some
> + * groups only make sense to switch to a
> + * particular function together.
> + */
> + dpi_gpio4: dpi_gpio4 {
> + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> + 12 13 14 15 16 17 18 19
> + 20 21 22 23 24 25 26 27>;
> + brcm,function = <BCM2835_FSEL_ALT2>;
> + };
s/dpi_gpio4/dpi_gpio0
> + emmc_gpio22: emmc_gpio22 {
> + brcm,pins = <22 23 24 25 26 27>;
> + brcm,function = <BCM2835_FSEL_ALT3>;
> + };
> + emmc_gpio34: emmc_gpio34 {
> + brcm,pins = <34 35 36 37 38 39>;
> + brcm,function = <BCM2835_FSEL_ALT3>;
> + brcm,pull = <BCM2835_PUD_OFF
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP
> + BCM2835_PUD_UP>;
> + };
> + emmc_gpio48: emmc_gpio48 {
> + brcm,pins = <48 49 50 51 52 53>;
> + brcm,function = <BCM2835_FSEL_ALT3>;
> + };
Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
for the same eMMC interface. I thought there is a eMMC interface and a SD host
interface with different DMA channels.
> +
> ...
> +
> + sdhost_gpio48: sdhost_gpio48 {
> + brcm,pins = <48 49 50 51 52 53>;
> + brcm,function = <BCM2835_FSEL_ALT0>;
> + };
I think this incorrect. There is no function ALT0 for these pins, only ALT3.
Regards
Stefan
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
2016-09-12 18:19 ` Stefan Wahren
@ 2016-09-12 19:05 ` Stefan Wahren
-1 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2016-09-12 19:05 UTC (permalink / raw)
To: Gerd Hoffmann, linux-arm-kernel, linux-rpi-kernel, devicetree
Cc: Scott Branden, Ray Jui, Russell King, open list, Rob Herring,
bcm-kernel-feedback-list, Mark Rutland, Florian Fainelli
Hi Gerd,
> Stefan Wahren <stefan.wahren@i2se.com> hat am 12. September 2016 um 20:19
> geschrieben:
>
>
> Hi Gerd,
>
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> >
> >
> > From: Eric Anholt <eric@anholt.net>
> >
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made. With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> >
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> >
> > squashed in:
> > ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> > ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> > ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> >
> > fixups by kraxel:
> > * fix spi0 name
> > * sort & group entries
> > * use pull defines
> > * add dpi group
>
> this looks like a changelog. Please move this at the proper place before the
> first "diff" and specify the version.
>
> >
> > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> > ---
> > arch/arm/boot/dts/bcm283x.dtsi | 203
> > +++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 203 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> > index 4d9f3ab..7b03b63 100644
> > --- a/arch/arm/boot/dts/bcm283x.dtsi
> > +++ b/arch/arm/boot/dts/bcm283x.dtsi
> > @@ -131,6 +131,209 @@
> >
> > interrupt-controller;
> > #interrupt-cells = <2>;
> > +
> > + /* Defines pin muxing groups according to
> > + * BCM2835-ARM-Peripherals.pdf page 102.
> > + *
> > + * While each pin can have its mux selected
> > + * for various functions individually, some
> > + * groups only make sense to switch to a
> > + * particular function together.
> > + */
> > + dpi_gpio4: dpi_gpio4 {
> > + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > + 12 13 14 15 16 17 18 19
> > + 20 21 22 23 24 25 26 27>;
> > + brcm,function = <BCM2835_FSEL_ALT2>;
> > + };
>
> s/dpi_gpio4/dpi_gpio0
>
> > + emmc_gpio22: emmc_gpio22 {
> > + brcm,pins = <22 23 24 25 26 27>;
> > + brcm,function = <BCM2835_FSEL_ALT3>;
> > + };
> > + emmc_gpio34: emmc_gpio34 {
> > + brcm,pins = <34 35 36 37 38 39>;
> > + brcm,function = <BCM2835_FSEL_ALT3>;
> > + brcm,pull = <BCM2835_PUD_OFF
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP>;
> > + };
> > + emmc_gpio48: emmc_gpio48 {
> > + brcm,pins = <48 49 50 51 52 53>;
> > + brcm,function = <BCM2835_FSEL_ALT3>;
> > + };
>
> Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> for the same eMMC interface. I thought there is a eMMC interface and a SD host
> interface with different DMA channels.
>
> > +
> > ...
> > +
> > + sdhost_gpio48: sdhost_gpio48 {
> > + brcm,pins = <48 49 50 51 52 53>;
> > + brcm,function = <BCM2835_FSEL_ALT0>;
> > + };
>
> I think this incorrect. There is no function ALT0 for these pins, only ALT3.
please forget my last 2 comments. According to this page [1] eMMC is selected by
ALT3 and sdhost is selected by ALT0.
Do you know a reliable source where all muxes for both interface are documented?
The datasheet isn't very helpful here.
Regards
Stefan
[1] - http://pinout.xyz/pinout/sdio
>
> Regards
> Stefan
^ permalink raw reply [flat|nested] 31+ messages in thread* [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-12 19:05 ` Stefan Wahren
0 siblings, 0 replies; 31+ messages in thread
From: Stefan Wahren @ 2016-09-12 19:05 UTC (permalink / raw)
To: linux-arm-kernel
Hi Gerd,
> Stefan Wahren <stefan.wahren@i2se.com> hat am 12. September 2016 um 20:19
> geschrieben:
>
>
> Hi Gerd,
>
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> >
> >
> > From: Eric Anholt <eric@anholt.net>
> >
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made. With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> >
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> >
> > squashed in:
> > ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> > ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> > ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> >
> > fixups by kraxel:
> > * fix spi0 name
> > * sort & group entries
> > * use pull defines
> > * add dpi group
>
> this looks like a changelog. Please move this at the proper place before the
> first "diff" and specify the version.
>
> >
> > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> > ---
> > arch/arm/boot/dts/bcm283x.dtsi | 203
> > +++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 203 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> > index 4d9f3ab..7b03b63 100644
> > --- a/arch/arm/boot/dts/bcm283x.dtsi
> > +++ b/arch/arm/boot/dts/bcm283x.dtsi
> > @@ -131,6 +131,209 @@
> >
> > interrupt-controller;
> > #interrupt-cells = <2>;
> > +
> > + /* Defines pin muxing groups according to
> > + * BCM2835-ARM-Peripherals.pdf page 102.
> > + *
> > + * While each pin can have its mux selected
> > + * for various functions individually, some
> > + * groups only make sense to switch to a
> > + * particular function together.
> > + */
> > + dpi_gpio4: dpi_gpio4 {
> > + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > + 12 13 14 15 16 17 18 19
> > + 20 21 22 23 24 25 26 27>;
> > + brcm,function = <BCM2835_FSEL_ALT2>;
> > + };
>
> s/dpi_gpio4/dpi_gpio0
>
> > + emmc_gpio22: emmc_gpio22 {
> > + brcm,pins = <22 23 24 25 26 27>;
> > + brcm,function = <BCM2835_FSEL_ALT3>;
> > + };
> > + emmc_gpio34: emmc_gpio34 {
> > + brcm,pins = <34 35 36 37 38 39>;
> > + brcm,function = <BCM2835_FSEL_ALT3>;
> > + brcm,pull = <BCM2835_PUD_OFF
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP
> > + BCM2835_PUD_UP>;
> > + };
> > + emmc_gpio48: emmc_gpio48 {
> > + brcm,pins = <48 49 50 51 52 53>;
> > + brcm,function = <BCM2835_FSEL_ALT3>;
> > + };
>
> Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> for the same eMMC interface. I thought there is a eMMC interface and a SD host
> interface with different DMA channels.
>
> > +
> > ...
> > +
> > + sdhost_gpio48: sdhost_gpio48 {
> > + brcm,pins = <48 49 50 51 52 53>;
> > + brcm,function = <BCM2835_FSEL_ALT0>;
> > + };
>
> I think this incorrect. There is no function ALT0 for these pins, only ALT3.
please forget my last 2 comments. According to this page [1] eMMC is selected by
ALT3 and sdhost is selected by ALT0.
Do you know a reliable source where all muxes for both interface are documented?
The datasheet isn't very helpful here.
Regards
Stefan
[1] - http://pinout.xyz/pinout/sdio
>
> Regards
> Stefan
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-13 6:34 ` Gerd Hoffmann
0 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2016-09-13 6:34 UTC (permalink / raw)
To: Stefan Wahren
Cc: linux-arm-kernel, linux-rpi-kernel, devicetree, Scott Branden,
Ray Jui, Russell King, open list, Rob Herring,
bcm-kernel-feedback-list, Mark Rutland, Florian Fainelli
Hi,
> > > + emmc_gpio48: emmc_gpio48 {
> > > + brcm,pins = <48 49 50 51 52 53>;
> > > + brcm,function = <BCM2835_FSEL_ALT3>;
> > > + };
> >
> > Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> > for the same eMMC interface. I thought there is a eMMC interface and a SD host
> > interface with different DMA channels.
> >
> > > +
> > > ...
> > > +
> > > + sdhost_gpio48: sdhost_gpio48 {
> > > + brcm,pins = <48 49 50 51 52 53>;
> > > + brcm,function = <BCM2835_FSEL_ALT0>;
> > > + };
> >
> > I think this incorrect. There is no function ALT0 for these pins, only ALT3.
>
> please forget my last 2 comments. According to this page [1] eMMC is selected by
> ALT3 and sdhost is selected by ALT0.
>
> Do you know a reliable source where all muxes for both interface are documented?
> The datasheet isn't very helpful here.
No, I don't know any source better than the datasheet @ github.
Yes, I tried to double-check things with the sheet too.
IIRC Eric mentioned a while back in some mail or patch that he checked
something for the rpi device tree with non-public docs, not fully sure
though whenever it was emmc/sdhost or something else. But I'm basically
trusting Eric here ...
cheers,
Gerd
PS: This is exactly why I think it us useful to have all those entries
in the dt file even if unused: To serve as documentation.
^ permalink raw reply [flat|nested] 31+ messages in thread* [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-13 6:34 ` Gerd Hoffmann
0 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2016-09-13 6:34 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
> > > + emmc_gpio48: emmc_gpio48 {
> > > + brcm,pins = <48 49 50 51 52 53>;
> > > + brcm,function = <BCM2835_FSEL_ALT3>;
> > > + };
> >
> > Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> > for the same eMMC interface. I thought there is a eMMC interface and a SD host
> > interface with different DMA channels.
> >
> > > +
> > > ...
> > > +
> > > + sdhost_gpio48: sdhost_gpio48 {
> > > + brcm,pins = <48 49 50 51 52 53>;
> > > + brcm,function = <BCM2835_FSEL_ALT0>;
> > > + };
> >
> > I think this incorrect. There is no function ALT0 for these pins, only ALT3.
>
> please forget my last 2 comments. According to this page [1] eMMC is selected by
> ALT3 and sdhost is selected by ALT0.
>
> Do you know a reliable source where all muxes for both interface are documented?
> The datasheet isn't very helpful here.
No, I don't know any source better than the datasheet @ github.
Yes, I tried to double-check things with the sheet too.
IIRC Eric mentioned a while back in some mail or patch that he checked
something for the rpi device tree with non-public docs, not fully sure
though whenever it was emmc/sdhost or something else. But I'm basically
trusting Eric here ...
cheers,
Gerd
PS: This is exactly why I think it us useful to have all those entries
in the dt file even if unused: To serve as documentation.
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-13 6:34 ` Gerd Hoffmann
0 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2016-09-13 6:34 UTC (permalink / raw)
To: Stefan Wahren
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Scott Branden, Ray Jui,
Russell King, open list, Rob Herring,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w, Mark Rutland,
Florian Fainelli
Hi,
> > > + emmc_gpio48: emmc_gpio48 {
> > > + brcm,pins = <48 49 50 51 52 53>;
> > > + brcm,function = <BCM2835_FSEL_ALT3>;
> > > + };
> >
> > Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> > for the same eMMC interface. I thought there is a eMMC interface and a SD host
> > interface with different DMA channels.
> >
> > > +
> > > ...
> > > +
> > > + sdhost_gpio48: sdhost_gpio48 {
> > > + brcm,pins = <48 49 50 51 52 53>;
> > > + brcm,function = <BCM2835_FSEL_ALT0>;
> > > + };
> >
> > I think this incorrect. There is no function ALT0 for these pins, only ALT3.
>
> please forget my last 2 comments. According to this page [1] eMMC is selected by
> ALT3 and sdhost is selected by ALT0.
>
> Do you know a reliable source where all muxes for both interface are documented?
> The datasheet isn't very helpful here.
No, I don't know any source better than the datasheet @ github.
Yes, I tried to double-check things with the sheet too.
IIRC Eric mentioned a while back in some mail or patch that he checked
something for the rpi device tree with non-public docs, not fully sure
though whenever it was emmc/sdhost or something else. But I'm basically
trusting Eric here ...
cheers,
Gerd
PS: This is exactly why I think it us useful to have all those entries
in the dt file even if unused: To serve as documentation.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
2016-09-12 18:19 ` Stefan Wahren
@ 2016-09-13 6:22 ` Gerd Hoffmann
-1 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2016-09-13 6:22 UTC (permalink / raw)
To: Stefan Wahren
Cc: linux-rpi-kernel, linux-arm-kernel, devicetree, Scott Branden,
Ray Jui, Russell King, open list, Rob Herring,
bcm-kernel-feedback-list, Mark Rutland, Florian Fainelli
On Mo, 2016-09-12 at 20:19 +0200, Stefan Wahren wrote:
> Hi Gerd,
>
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> >
> >
> > From: Eric Anholt <eric@anholt.net>
> >
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made. With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> >
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> >
> > squashed in:
> > ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> > ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> > ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> >
> > fixups by kraxel:
> > * fix spi0 name
> > * sort & group entries
> > * use pull defines
> > * add dpi group
>
> this looks like a changelog.
It actually is, trying to keep track of what comes from Eric and what
comes from me. But I guess I can also simply summarize that as "based
on a patch from Eric".
> > + dpi_gpio4: dpi_gpio4 {
> > + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > + 12 13 14 15 16 17 18 19
> > + 20 21 22 23 24 25 26 27>;
> > + brcm,function = <BCM2835_FSEL_ALT2>;
> > + };
>
> s/dpi_gpio4/dpi_gpio0
Yea, right, will fix.
cheers,
Gerd
^ permalink raw reply [flat|nested] 31+ messages in thread* [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
@ 2016-09-13 6:22 ` Gerd Hoffmann
0 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2016-09-13 6:22 UTC (permalink / raw)
To: linux-arm-kernel
On Mo, 2016-09-12 at 20:19 +0200, Stefan Wahren wrote:
> Hi Gerd,
>
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> >
> >
> > From: Eric Anholt <eric@anholt.net>
> >
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made. With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> >
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> >
> > squashed in:
> > ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> > ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> > ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> >
> > fixups by kraxel:
> > * fix spi0 name
> > * sort & group entries
> > * use pull defines
> > * add dpi group
>
> this looks like a changelog.
It actually is, trying to keep track of what comes from Eric and what
comes from me. But I guess I can also simply summarize that as "based
on a patch from Eric".
> > + dpi_gpio4: dpi_gpio4 {
> > + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > + 12 13 14 15 16 17 18 19
> > + 20 21 22 23 24 25 26 27>;
> > + brcm,function = <BCM2835_FSEL_ALT2>;
> > + };
>
> s/dpi_gpio4/dpi_gpio0
Yea, right, will fix.
cheers,
Gerd
^ permalink raw reply [flat|nested] 31+ messages in thread