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From: Masahiro Yamada <yamada.masahiro@socionext.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 01/15] pinctrl: uniphier: support 4bit-width pin-mux register capability
Date: Sat, 17 Sep 2016 03:32:58 +0900	[thread overview]
Message-ID: <1474050792-23218-2-git-send-email-yamada.masahiro@socionext.com> (raw)
In-Reply-To: <1474050792-23218-1-git-send-email-yamada.masahiro@socionext.com>

On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit
wide on sLD3 SoC.  Support it for the sLD3 pinctrl driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 20 ++++++++------------
 drivers/pinctrl/uniphier/pinctrl-uniphier.h      |  5 +++--
 2 files changed, 11 insertions(+), 14 deletions(-)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index f2fe313..51144b8 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -105,8 +105,10 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
 				    int muxval)
 {
 	struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
-	unsigned mux_bits, reg_stride, reg, reg_end, shift, mask;
-	bool load_pinctrl;
+	unsigned reg, reg_end, shift, mask;
+	unsigned mux_bits = 8;
+	unsigned reg_stride = 4;
+	bool load_pinctrl = false;
 	u32 tmp;
 
 	/* some pins need input-enabling */
@@ -115,24 +117,18 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
 	if (muxval < 0)
 		return;		/* dedicated pin; nothing to do for pin-mux */
 
+	if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_MUX_4BIT)
+		mux_bits = 4;
+
 	if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
 		/*
 		 *  Mode       offset        bit
 		 *  Normal     4 * n     shift+3:shift
 		 *  Debug      4 * n     shift+7:shift+4
 		 */
-		mux_bits = 4;
+		mux_bits /= 2;
 		reg_stride = 8;
 		load_pinctrl = true;
-	} else {
-		/*
-		 *  Mode       offset           bit
-		 *  Normal     8 * n        shift+3:shift
-		 *  Debug      8 * n + 4    shift+3:shift
-		 */
-		mux_bits = 8;
-		reg_stride = 4;
-		load_pinctrl = false;
 	}
 
 	reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index 76ea1be..5c3db2a 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -67,8 +67,9 @@ struct uniphier_pinctrl_socdata {
 	const char * const *functions;
 	int functions_count;
 	unsigned caps;
-#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL	BIT(1)
-#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE	BIT(0)
+#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL	BIT(2)
+#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE	BIT(1)
+#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT		BIT(0)
 };
 
 #define UNIPHIER_PINCTRL_PIN(a, b)					\
-- 
1.9.1

  reply	other threads:[~2016-09-16 18:32 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-16 18:32 [U-Boot] [PATCH 00/15] ARM: uniphier: more updates for UniPhier SoC family for v2016.11-rc1 Masahiro Yamada
2016-09-16 18:32 ` Masahiro Yamada [this message]
2016-09-16 18:32 ` [U-Boot] [PATCH 02/15] pinctrl: uniphier: add UniPhier sLD3 pinctrl driver Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 03/15] ARM: dts: uniphier: add pinctrl device node and pinctrl properties Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 04/15] ARM: uniphier: select PINCTRL and SPL_PINCTRL Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 05/15] ARM: uniphier: remove redundant pin-muxing for EA24 pin of sLD3 SoC Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 06/15] ARM: uniphier: remove ad-hoc pin-mux code for sLD3 Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 07/15] ARM: uniphier: consolidate NAND pin-mux settings Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 08/15] ARM: dts: uniphier: include System Bus pin group node in SPL DT Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 09/15] ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20 Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 10/15] ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20 Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 11/15] ARM: uniphier: rename CONFIG_DPLL_SSC_RATE_1PER Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 12/15] ARM: uniphier: move PLL init code to U-Boot proper where possible Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 13/15] ARM: uniphier: collect clock/PLL init code into a single directory Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 14/15] ARM: uniphier: add PLL init code for LD20 SoC Masahiro Yamada
2016-09-16 18:33 ` [U-Boot] [PATCH 15/15] ARM: uniphier: update DRAM " Masahiro Yamada
2016-09-18 15:22 ` [U-Boot] [PATCH 00/15] ARM: uniphier: more updates for UniPhier SoC family for v2016.11-rc1 Masahiro Yamada

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