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From: Eric Auger <eric.auger@redhat.com>
To: eric.auger@redhat.com, eric.auger.pro@gmail.com,
	christoffer.dall@linaro.org, marc.zyngier@arm.com,
	robin.murphy@arm.com, alex.williamson@redhat.com,
	will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de,
	jason@lakedaemon.net, linux-arm-kernel@lists.infradead.org
Cc: kvm@vger.kernel.org, drjones@redhat.com,
	linux-kernel@vger.kernel.org, pranav.sawargaonkar@gmail.com,
	iommu@lists.linux-foundation.org, punit.agrawal@arm.com,
	diana.craciun@nxp.com, gpkulkarni@gmail.com,
	shankerd@codeaurora.org, bharat.bhushan@nxp.com,
	geethasowjanya.akula@gmail.com
Subject: [PATCH v5 10/17] iommu/arm-smmu: Implement reserved region get/put callbacks
Date: Wed,  4 Jan 2017 13:32:19 +0000	[thread overview]
Message-ID: <1483536746-2725-11-git-send-email-eric.auger@redhat.com> (raw)
In-Reply-To: <1483536746-2725-1-git-send-email-eric.auger@redhat.com>

The get() populates the list with the MSI IOVA reserved window.

At the moment an arbitray MSI IOVA window is set at 0x8000000
of size 1MB. This will allow to report those info in iommu-group
sysfs.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

---

v3 -> v4:
- do not handle PCI host bridge windows anymore
- encode prot

RFC v2 -> v3:
- use existing get/put_resv_regions

RFC v1 -> v2:
- use defines for MSI IOVA base and length
---
 drivers/iommu/arm-smmu.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a60cded..a354572 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -281,6 +281,9 @@ enum arm_smmu_s2cr_privcfg {
 
 #define FSYNR0_WNR			(1 << 4)
 
+#define MSI_IOVA_BASE			0x8000000
+#define MSI_IOVA_LENGTH			0x100000
+
 static int force_stage;
 module_param(force_stage, int, S_IRUGO);
 MODULE_PARM_DESC(force_stage,
@@ -1549,6 +1552,29 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	return iommu_fwspec_add_ids(dev, &fwid, 1);
 }
 
+static void arm_smmu_get_resv_regions(struct device *dev,
+				      struct list_head *head)
+{
+	struct iommu_resv_region *region;
+	int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
+
+	region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH,
+					 prot, IOMMU_RESV_MSI);
+	if (!region)
+		return;
+
+	list_add_tail(&region->list, head);
+}
+
+static void arm_smmu_put_resv_regions(struct device *dev,
+				      struct list_head *head)
+{
+	struct iommu_resv_region *entry, *next;
+
+	list_for_each_entry_safe(entry, next, head, list)
+		kfree(entry);
+}
+
 static struct iommu_ops arm_smmu_ops = {
 	.capable		= arm_smmu_capable,
 	.domain_alloc		= arm_smmu_domain_alloc,
@@ -1564,6 +1590,8 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	.domain_get_attr	= arm_smmu_domain_get_attr,
 	.domain_set_attr	= arm_smmu_domain_set_attr,
 	.of_xlate		= arm_smmu_of_xlate,
+	.get_resv_regions	= arm_smmu_get_resv_regions,
+	.put_resv_regions	= arm_smmu_put_resv_regions,
 	.pgsize_bitmap		= -1UL, /* Restricted during device attach */
 };
 
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Eric Auger <eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
To: eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	eric.auger.pro-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	marc.zyngier-5wv7dgnIgG8@public.gmane.org,
	robin.murphy-5wv7dgnIgG8@public.gmane.org,
	alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	will.deacon-5wv7dgnIgG8@public.gmane.org,
	joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
	tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org,
	jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: drjones-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	punit.agrawal-5wv7dgnIgG8@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	geethasowjanya.akula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	pranav.sawargaonkar-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	shankerd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	gpkulkarni-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: [PATCH v5 10/17] iommu/arm-smmu: Implement reserved region get/put callbacks
Date: Wed,  4 Jan 2017 13:32:19 +0000	[thread overview]
Message-ID: <1483536746-2725-11-git-send-email-eric.auger@redhat.com> (raw)
In-Reply-To: <1483536746-2725-1-git-send-email-eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>

The get() populates the list with the MSI IOVA reserved window.

At the moment an arbitray MSI IOVA window is set at 0x8000000
of size 1MB. This will allow to report those info in iommu-group
sysfs.

Signed-off-by: Eric Auger <eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>

---

v3 -> v4:
- do not handle PCI host bridge windows anymore
- encode prot

RFC v2 -> v3:
- use existing get/put_resv_regions

RFC v1 -> v2:
- use defines for MSI IOVA base and length
---
 drivers/iommu/arm-smmu.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a60cded..a354572 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -281,6 +281,9 @@ enum arm_smmu_s2cr_privcfg {
 
 #define FSYNR0_WNR			(1 << 4)
 
+#define MSI_IOVA_BASE			0x8000000
+#define MSI_IOVA_LENGTH			0x100000
+
 static int force_stage;
 module_param(force_stage, int, S_IRUGO);
 MODULE_PARM_DESC(force_stage,
@@ -1549,6 +1552,29 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	return iommu_fwspec_add_ids(dev, &fwid, 1);
 }
 
+static void arm_smmu_get_resv_regions(struct device *dev,
+				      struct list_head *head)
+{
+	struct iommu_resv_region *region;
+	int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
+
+	region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH,
+					 prot, IOMMU_RESV_MSI);
+	if (!region)
+		return;
+
+	list_add_tail(&region->list, head);
+}
+
+static void arm_smmu_put_resv_regions(struct device *dev,
+				      struct list_head *head)
+{
+	struct iommu_resv_region *entry, *next;
+
+	list_for_each_entry_safe(entry, next, head, list)
+		kfree(entry);
+}
+
 static struct iommu_ops arm_smmu_ops = {
 	.capable		= arm_smmu_capable,
 	.domain_alloc		= arm_smmu_domain_alloc,
@@ -1564,6 +1590,8 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	.domain_get_attr	= arm_smmu_domain_get_attr,
 	.domain_set_attr	= arm_smmu_domain_set_attr,
 	.of_xlate		= arm_smmu_of_xlate,
+	.get_resv_regions	= arm_smmu_get_resv_regions,
+	.put_resv_regions	= arm_smmu_put_resv_regions,
 	.pgsize_bitmap		= -1UL, /* Restricted during device attach */
 };
 
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: eric.auger@redhat.com (Eric Auger)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 10/17] iommu/arm-smmu: Implement reserved region get/put callbacks
Date: Wed,  4 Jan 2017 13:32:19 +0000	[thread overview]
Message-ID: <1483536746-2725-11-git-send-email-eric.auger@redhat.com> (raw)
In-Reply-To: <1483536746-2725-1-git-send-email-eric.auger@redhat.com>

The get() populates the list with the MSI IOVA reserved window.

At the moment an arbitray MSI IOVA window is set at 0x8000000
of size 1MB. This will allow to report those info in iommu-group
sysfs.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

---

v3 -> v4:
- do not handle PCI host bridge windows anymore
- encode prot

RFC v2 -> v3:
- use existing get/put_resv_regions

RFC v1 -> v2:
- use defines for MSI IOVA base and length
---
 drivers/iommu/arm-smmu.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a60cded..a354572 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -281,6 +281,9 @@ enum arm_smmu_s2cr_privcfg {
 
 #define FSYNR0_WNR			(1 << 4)
 
+#define MSI_IOVA_BASE			0x8000000
+#define MSI_IOVA_LENGTH			0x100000
+
 static int force_stage;
 module_param(force_stage, int, S_IRUGO);
 MODULE_PARM_DESC(force_stage,
@@ -1549,6 +1552,29 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	return iommu_fwspec_add_ids(dev, &fwid, 1);
 }
 
+static void arm_smmu_get_resv_regions(struct device *dev,
+				      struct list_head *head)
+{
+	struct iommu_resv_region *region;
+	int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
+
+	region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH,
+					 prot, IOMMU_RESV_MSI);
+	if (!region)
+		return;
+
+	list_add_tail(&region->list, head);
+}
+
+static void arm_smmu_put_resv_regions(struct device *dev,
+				      struct list_head *head)
+{
+	struct iommu_resv_region *entry, *next;
+
+	list_for_each_entry_safe(entry, next, head, list)
+		kfree(entry);
+}
+
 static struct iommu_ops arm_smmu_ops = {
 	.capable		= arm_smmu_capable,
 	.domain_alloc		= arm_smmu_domain_alloc,
@@ -1564,6 +1590,8 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	.domain_get_attr	= arm_smmu_domain_get_attr,
 	.domain_set_attr	= arm_smmu_domain_set_attr,
 	.of_xlate		= arm_smmu_of_xlate,
+	.get_resv_regions	= arm_smmu_get_resv_regions,
+	.put_resv_regions	= arm_smmu_put_resv_regions,
 	.pgsize_bitmap		= -1UL, /* Restricted during device attach */
 };
 
-- 
1.9.1

  parent reply	other threads:[~2017-01-04 13:33 UTC|newest]

Thread overview: 92+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-04 13:32 [PATCH v5 00/17] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions Eric Auger
2017-01-04 13:32 ` Eric Auger
2017-01-04 13:32 ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 01/17] iommu/dma: Allow MSI-only cookies Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 02/17] iommu: Rename iommu_dm_regions into iommu_resv_regions Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 03/17] iommu: Add a new type field in iommu_resv_region Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 04/17] iommu: iommu_alloc_resv_region Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 05/17] iommu: Only map direct mapped regions Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 06/17] iommu: iommu_get_group_resv_regions Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 07/17] iommu: Implement reserved_regions iommu-group sysfs file Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 08/17] iommu/vt-d: Implement reserved region get/put callbacks Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 09/17] iommu/amd: Declare MSI and HT regions as reserved IOVA regions Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` Eric Auger [this message]
2017-01-04 13:32   ` [PATCH v5 10/17] iommu/arm-smmu: Implement reserved region get/put callbacks Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 11/17] iommu/arm-smmu-v3: " Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 12/17] irqdomain: Add IRQ_DOMAIN_FLAG_MSI_REMAP value Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 13/17] irqdomain: irq_domain_check_msi_remap Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:46   ` Marc Zyngier
2017-01-04 13:46     ` Marc Zyngier
2017-01-04 13:46     ` Marc Zyngier
2017-01-04 14:11     ` Auger Eric
2017-01-04 14:11       ` Auger Eric
2017-01-04 14:11       ` Auger Eric
2017-01-04 15:27       ` Marc Zyngier
2017-01-04 15:27         ` Marc Zyngier
2017-01-04 15:27         ` Marc Zyngier
2017-01-04 15:58         ` Auger Eric
2017-01-04 15:58           ` Auger Eric
2017-01-04 15:58           ` Auger Eric
2017-01-05 10:45         ` Auger Eric
2017-01-05 10:45           ` Auger Eric
2017-01-05 10:45           ` Auger Eric
2017-01-05 11:25           ` Marc Zyngier
2017-01-05 11:25             ` Marc Zyngier
2017-01-05 11:25             ` Marc Zyngier
2017-01-05 11:29             ` Auger Eric
2017-01-05 11:29               ` Auger Eric
2017-01-05 11:29               ` Auger Eric
2017-01-05 11:57               ` Marc Zyngier
2017-01-05 11:57                 ` Marc Zyngier
2017-01-05 12:08                 ` Auger Eric
2017-01-05 12:08                   ` Auger Eric
2017-01-05 12:08                   ` Auger Eric
2017-01-06  4:27                   ` Bharat Bhushan
2017-01-06  4:27                     ` Bharat Bhushan
2017-01-06  4:27                     ` Bharat Bhushan
2017-01-06  8:35                     ` Auger Eric
2017-01-06  8:35                       ` Auger Eric
2017-01-06  8:35                       ` Auger Eric
2017-01-06  9:42                     ` Marc Zyngier
2017-01-06  9:42                       ` Marc Zyngier
2017-01-06  9:42                       ` Marc Zyngier
2017-01-05  6:28   ` kbuild test robot
2017-01-05  6:28     ` kbuild test robot
2017-01-05  6:28     ` kbuild test robot
2017-01-04 13:32 ` [PATCH v5 14/17] irqchip/gicv3-its: Sets IRQ_DOMAIN_FLAG_MSI_REMAP Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 15/17] vfio/type1: Allow transparent MSI IOVA allocation Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 16/17] vfio/type1: Check MSI remapping at irq domain level Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32 ` [PATCH v5 17/17] iommu/arm-smmu: Do not advertise IOMMU_CAP_INTR_REMAP anymore Eric Auger
2017-01-04 13:32   ` Eric Auger
2017-01-04 13:32   ` Eric Auger

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