[PATCH] clk: aspeed: fix APB and AHB clock rates

[PATCH] clk: aspeed: fix APB and AHB clock rates

[Cédric Le Goater]

The masking is one bit too generous which generates really low clock
rates.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 drivers/clk/aspeed/clk-g4.c | 2 +-
 drivers/clk/aspeed/clk-g5.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/aspeed/clk-g4.c b/drivers/clk/aspeed/clk-g4.c
index bf61919ead52..50117ec16909 100644
--- a/drivers/clk/aspeed/clk-g4.c
+++ b/drivers/clk/aspeed/clk-g4.c
@@ -94,7 +94,7 @@ static unsigned long aspeed_clk_apb_recalc_rate(struct clk_hw *hw,
 		return ret;
 	}
 
-	reg = (reg >> 23) & GENMASK(2, 0);
+	reg = (reg >> 23) & 0x3;
 
 	return hpll_rate / (2 + 2 * reg);
 }
diff --git a/drivers/clk/aspeed/clk-g5.c b/drivers/clk/aspeed/clk-g5.c
index 6eb0004f894d..8f8f7f796cee 100644
--- a/drivers/clk/aspeed/clk-g5.c
+++ b/drivers/clk/aspeed/clk-g5.c
@@ -84,7 +84,7 @@ static unsigned long aspeed_clk_ahb_recalc_rate(struct clk_hw *hw,
 	}
 
 	/* Bits 11:9 define the AXI/AHB clock frequency ratio */
-	reg = (reg >> 9) & GENMASK(3, 0);
+	reg = (reg >> 9) & 0x7;
 
 	/* A value of zero is undefined */
 	WARN_ON(reg == 0);
@@ -108,7 +108,7 @@ static unsigned long aspeed_clk_apb_recalc_rate(struct clk_hw *hw,
 		return ret;
 	}
 
-	reg = (reg >> 23) & GENMASK(3, 0);
+	reg = (reg >> 23) & 0x7;
 
 	rate = hpll_rate / (4 * (reg + 1));
 
-- 
2.7.4

Re: [PATCH linux dev-4.10] clk: aspeed: fix APB and AHB clock rates

[Cédric Le Goater]

I forgot to add a subject prefix : that is for 'linux dev-4.10'

Thanks,

C.  

for On 03/24/2017 01:17 PM, Cédric Le Goater wrote:
> The masking is one bit too generous which generates really low clock
> rates.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  drivers/clk/aspeed/clk-g4.c | 2 +-
>  drivers/clk/aspeed/clk-g5.c | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/aspeed/clk-g4.c b/drivers/clk/aspeed/clk-g4.c
> index bf61919ead52..50117ec16909 100644
> --- a/drivers/clk/aspeed/clk-g4.c
> +++ b/drivers/clk/aspeed/clk-g4.c
> @@ -94,7 +94,7 @@ static unsigned long aspeed_clk_apb_recalc_rate(struct clk_hw *hw,
>  		return ret;
>  	}
>  
> -	reg = (reg >> 23) & GENMASK(2, 0);
> +	reg = (reg >> 23) & 0x3;
>  
>  	return hpll_rate / (2 + 2 * reg);
>  }
> diff --git a/drivers/clk/aspeed/clk-g5.c b/drivers/clk/aspeed/clk-g5.c
> index 6eb0004f894d..8f8f7f796cee 100644
> --- a/drivers/clk/aspeed/clk-g5.c
> +++ b/drivers/clk/aspeed/clk-g5.c
> @@ -84,7 +84,7 @@ static unsigned long aspeed_clk_ahb_recalc_rate(struct clk_hw *hw,
>  	}
>  
>  	/* Bits 11:9 define the AXI/AHB clock frequency ratio */
> -	reg = (reg >> 9) & GENMASK(3, 0);
> +	reg = (reg >> 9) & 0x7;
>  
>  	/* A value of zero is undefined */
>  	WARN_ON(reg == 0);
> @@ -108,7 +108,7 @@ static unsigned long aspeed_clk_apb_recalc_rate(struct clk_hw *hw,
>  		return ret;
>  	}
>  
> -	reg = (reg >> 23) & GENMASK(3, 0);
> +	reg = (reg >> 23) & 0x7;
>  
>  	rate = hpll_rate / (4 * (reg + 1));
>  
> 

Re: [PATCH linux dev-4.10] clk: aspeed: fix APB and AHB clock rates

[Joel Stanley]

On Fri, Mar 24, 2017 at 11:26 PM, Cédric Le Goater <clg@kaod.org> wrote:
> I forgot to add a subject prefix : that is for 'linux dev-4.10'
>
> Thanks,
>
> C.
>
> for On 03/24/2017 01:17 PM, Cédric Le Goater wrote:
>> The masking is one bit too generous which generates really low clock
>> rates.

Thanks. I've gotten this wrong about four times now. I tried to make
it clearer with the GENMASK macro, but grabbed too many bits.

Applied to dev-4.10.

Cheers,

Joel

>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>>  drivers/clk/aspeed/clk-g4.c | 2 +-
>>  drivers/clk/aspeed/clk-g5.c | 4 ++--
>>  2 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/aspeed/clk-g4.c b/drivers/clk/aspeed/clk-g4.c
>> index bf61919ead52..50117ec16909 100644
>> --- a/drivers/clk/aspeed/clk-g4.c
>> +++ b/drivers/clk/aspeed/clk-g4.c
>> @@ -94,7 +94,7 @@ static unsigned long aspeed_clk_apb_recalc_rate(struct clk_hw *hw,
>>               return ret;
>>       }
>>
>> -     reg = (reg >> 23) & GENMASK(2, 0);
>> +     reg = (reg >> 23) & 0x3;
>>
>>       return hpll_rate / (2 + 2 * reg);
>>  }
>> diff --git a/drivers/clk/aspeed/clk-g5.c b/drivers/clk/aspeed/clk-g5.c
>> index 6eb0004f894d..8f8f7f796cee 100644
>> --- a/drivers/clk/aspeed/clk-g5.c
>> +++ b/drivers/clk/aspeed/clk-g5.c
>> @@ -84,7 +84,7 @@ static unsigned long aspeed_clk_ahb_recalc_rate(struct clk_hw *hw,
>>       }
>>
>>       /* Bits 11:9 define the AXI/AHB clock frequency ratio */
>> -     reg = (reg >> 9) & GENMASK(3, 0);
>> +     reg = (reg >> 9) & 0x7;
>>
>>       /* A value of zero is undefined */
>>       WARN_ON(reg == 0);
>> @@ -108,7 +108,7 @@ static unsigned long aspeed_clk_apb_recalc_rate(struct clk_hw *hw,
>>               return ret;
>>       }
>>
>> -     reg = (reg >> 23) & GENMASK(3, 0);
>> +     reg = (reg >> 23) & 0x7;
>>
>>       rate = hpll_rate / (4 * (reg + 1));
>>
>>
>