From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [RFC 2/4] drm/i915: Program RPCS for Broadwell
Date: Tue, 02 May 2017 15:22:28 +0300 [thread overview]
Message-ID: <1493727748.3146.4.camel@linux.intel.com> (raw)
In-Reply-To: <20170502114942.2703-2-chris@chris-wilson.co.uk>
On ti, 2017-05-02 at 12:49 +0100, Chris Wilson wrote:
> Currently we only configure the power gating for Skylake and above, but
> the configuration should equally apply to Broadwell and Braswell. Even
> though, there is not as much variation as for later generations, we want
> to expose control over the configuration to userspace and may want to
> opt out of the "always-enabled" setting.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This craves for T-b's because it excercises new portions of HW.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2017-05-02 12:22 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-02 11:49 [RFC 1/4] drm/i915: Record both min/max eu_per_subslice in sseu_dev_info Chris Wilson
2017-05-02 11:49 ` [RFC 2/4] drm/i915: Program RPCS for Broadwell Chris Wilson
2017-05-02 12:22 ` Joonas Lahtinen [this message]
2017-05-02 19:32 ` Lionel Landwerlin
2017-05-02 11:49 ` [RFC 3/4] drm/i915: Record the sseu configuration per-context Chris Wilson
2017-05-02 11:49 ` [RFC 4/4] drm/i915: Expose RPCS (SSEU) configuration to userspace Chris Wilson
2017-05-02 10:33 ` Oscar Mateo
2017-05-02 19:55 ` Chris Wilson
2017-05-02 15:00 ` Oscar Mateo
2017-05-09 9:52 ` Lionel Landwerlin
2017-07-11 17:14 ` Lionel Landwerlin
2017-05-02 12:08 ` ✓ Fi.CI.BAT: success for series starting with [RFC,1/4] drm/i915: Record both min/max eu_per_subslice in sseu_dev_info Patchwork
2017-05-02 12:13 ` [RFC 1/4] " Joonas Lahtinen
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