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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Oscar Mateo <oscar.mateo@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [RFC 4/4] drm/i915: Expose RPCS (SSEU) configuration to userspace
Date: Tue, 2 May 2017 20:55:00 +0100	[thread overview]
Message-ID: <20170502195500.GG19680@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <6ae5656a-6844-75d1-cdf6-0247adcba868@intel.com>

On Tue, May 02, 2017 at 10:33:19AM +0000, Oscar Mateo wrote:
> 
> 
> On 05/02/2017 11:49 AM, Chris Wilson wrote:
> >We want to allow userspace to reconfigure the subslice configuration for
> >its own use case. To do so, we expose a context parameter to allow
> >adjustment of the RPCS register stored within the context image (and
> >currently not accessible via LRI).
> 
> Userspace could also do this by themselves via LRI if we simply
> whitelist GEN8_R_PWR_CLK_STATE.
> 
> Hardware people suggested this programming model:
> 
> - PIPECONTROL - Stalling flish, flush all caches (color, depth, DC$)
> - LOAD_REGISTER_IMMEDIATE - R_PWR_CLK_STATE
> - Reprogram complete state

Hmm, treating it as a complete state wipe is a nuisance, but fairly
trivial. The simplest way will be for the user to execute the LRI batch
as part of creating the context. But there will be some use cases where
dynamic reconfiguration within an active context will be desired, I'm
sure.

> >If the context is adjusted before
> >first use, the adjustment is for "free"; otherwise if the context is
> >active we flush the context off the GPU (stalling all users) and forcing
> >the GPU to save the context to memory where we can modify it and so
> >ensure that the register is reloaded on next execution.
> 
> There is another cost associated with the adjustment: slice poweron
> and shutdown do take some time to happen (in the order of tens of
> usecs). I have been playing with an i-g-t benchmark to measure this
> delay, I'll send it to the mailing list.

Hmm, I thought the argument for why selecting smaller subslices gave
better performance was that it was restoring the whole set between
contexts, even when the configuration between contexts was the same.

As always numbers demonstrating the advantage, perhaps explaining why
it helps, and also for spotting when we break it are most welcome :)
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
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  reply	other threads:[~2017-05-02 19:55 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-02 11:49 [RFC 1/4] drm/i915: Record both min/max eu_per_subslice in sseu_dev_info Chris Wilson
2017-05-02 11:49 ` [RFC 2/4] drm/i915: Program RPCS for Broadwell Chris Wilson
2017-05-02 12:22   ` Joonas Lahtinen
2017-05-02 19:32   ` Lionel Landwerlin
2017-05-02 11:49 ` [RFC 3/4] drm/i915: Record the sseu configuration per-context Chris Wilson
2017-05-02 11:49 ` [RFC 4/4] drm/i915: Expose RPCS (SSEU) configuration to userspace Chris Wilson
2017-05-02 10:33   ` Oscar Mateo
2017-05-02 19:55     ` Chris Wilson [this message]
2017-05-02 15:00       ` Oscar Mateo
2017-05-09  9:52   ` Lionel Landwerlin
2017-07-11 17:14   ` Lionel Landwerlin
2017-05-02 12:08 ` ✓ Fi.CI.BAT: success for series starting with [RFC,1/4] drm/i915: Record both min/max eu_per_subslice in sseu_dev_info Patchwork
2017-05-02 12:13 ` [RFC 1/4] " Joonas Lahtinen

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