* [U-Boot] [PATCH v2] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
@ 2017-08-31 4:56 Yogesh Gaur
2017-08-31 14:13 ` Jagan Teki
0 siblings, 1 reply; 4+ messages in thread
From: Yogesh Gaur @ 2017-08-31 4:56 UTC (permalink / raw)
To: u-boot
Add MT35XU512ABA1G12 parameters to NOR flash parameters array.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
dual and quad. Supports subsector erase with 4KB granularity, have support
of FSR(flag status register) and flash size is 64MB.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
---
Change in v2:
- Incorporated Jagan's review comments. Removed macro SPI_FLASH_CFI_MFR_MICRON
---
drivers/mtd/spi/spi_flash_ids.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index c4ccf48..e4f4570 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -134,6 +134,7 @@ const struct spi_flash_info spi_flash_ids[] = {
{"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25qu02g", INFO(0x20bb22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25ql02g", INFO(0x20ba22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"mt35xu512g", INFO6(0x2c5b1a, 0x104100, 128 * 1024, 512, E_FSR | SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
{"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
2017-08-31 4:56 [U-Boot] [PATCH v2] mtd/spi: Add MT35XU512ABA1G12 NOR flash support Yogesh Gaur
@ 2017-08-31 14:13 ` Jagan Teki
2017-09-25 7:21 ` Jagan Teki
0 siblings, 1 reply; 4+ messages in thread
From: Jagan Teki @ 2017-08-31 14:13 UTC (permalink / raw)
To: u-boot
On Thu, Aug 31, 2017 at 10:26 AM, Yogesh Gaur
<yogeshnarayan.gaur@nxp.com> wrote:
> Add MT35XU512ABA1G12 parameters to NOR flash parameters array.
>
> The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
> dual and quad. Supports subsector erase with 4KB granularity, have support
> of FSR(flag status register) and flash size is 64MB.
>
> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
2017-08-31 14:13 ` Jagan Teki
@ 2017-09-25 7:21 ` Jagan Teki
0 siblings, 0 replies; 4+ messages in thread
From: Jagan Teki @ 2017-09-25 7:21 UTC (permalink / raw)
To: u-boot
On Thu, Aug 31, 2017 at 7:43 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> On Thu, Aug 31, 2017 at 10:26 AM, Yogesh Gaur
> <yogeshnarayan.gaur@nxp.com> wrote:
>> Add MT35XU512ABA1G12 parameters to NOR flash parameters array.
>>
>> The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
>> dual and quad. Supports subsector erase with 4KB granularity, have support
>> of FSR(flag status register) and flash size is 64MB.
>>
>> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
>
> Reviewed-by: Jagan Teki <jagan@openedev.com>
Applied to u-boot-spi/master
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
@ 2017-08-31 12:20 Yogesh Gaur
0 siblings, 0 replies; 4+ messages in thread
From: Yogesh Gaur @ 2017-08-31 12:20 UTC (permalink / raw)
To: u-boot
Add MT35XU512ABA1G12 parameters to NOR flash parameters array.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
dual and quad. Supports subsector erase with 4KB granularity, have support
of FSR(flag status register) and flash size is 64MB.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
---
Change in v2:
- Incorporated Jagan's review comments. Removed macro SPI_FLASH_CFI_MFR_MICRON
---
drivers/mtd/spi/spi_flash_ids.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index c4ccf48..e4f4570 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -134,6 +134,7 @@ const struct spi_flash_info spi_flash_ids[] = {
{"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25qu02g", INFO(0x20bb22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25ql02g", INFO(0x20ba22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"mt35xu512g", INFO6(0x2c5b1a, 0x104100, 128 * 1024, 512, E_FSR | SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
{"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-09-25 7:21 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-08-31 4:56 [U-Boot] [PATCH v2] mtd/spi: Add MT35XU512ABA1G12 NOR flash support Yogesh Gaur
2017-08-31 14:13 ` Jagan Teki
2017-09-25 7:21 ` Jagan Teki
2017-08-31 12:20 Yogesh Gaur
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