From: Andrew Jeffery <andrew@aj.id.au> To: Joel Stanley <joel@jms.id.au>, Lee Jones <lee.jones@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@codeaurora.org> Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Benjamin Herrenschmidt <benh@kernel.crashing.org>, Jeremy Kerr <jk@ozlabs.org>, Rick Altherr <raltherr@google.com>, Ryan Chen <ryan_chen@aspeedtech.com>, Arnd Bergmann <arnd@arndb.de> Subject: Re: [PATCH v2 5/5] clk: aspeed: Add reset controller Date: Mon, 25 Sep 2017 22:24:41 +0930 [thread overview] Message-ID: <1506344081.30138.32.camel@aj.id.au> (raw) In-Reply-To: <20170921042641.7326-6-joel@jms.id.au> [-- Attachment #1: Type: text/plain, Size: 4916 bytes --] On Thu, 2017-09-21 at 13:56 +0930, Joel Stanley wrote: > There are some resets that are not associated with gates. These are > represented by a reset controller. > > Signed-off-by: Joel Stanley <joel@jms.id.au> > --- > drivers/clk/clk-aspeed.c | 82 +++++++++++++++++++++++++++++++- > include/dt-bindings/clock/aspeed-clock.h | 9 ++++ > 2 files changed, 90 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c > index dec9db4ec47b..db97c0f9f99e 100644 > --- a/drivers/clk/clk-aspeed.c > +++ b/drivers/clk/clk-aspeed.c > @@ -17,6 +17,7 @@ > #include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/regmap.h> > +#include <linux/reset-controller.h> > #include <linux/slab.h> > #include <linux/spinlock.h> > > @@ -256,6 +257,68 @@ static const struct clk_ops aspeed_clk_gate_ops = { > .is_enabled = aspeed_clk_is_enabled, > }; > > +/** > + * struct aspeed_reset - Aspeed reset controller > + * @map: regmap to access the containing system controller > + * @rcdev: reset controller device > + */ > +struct aspeed_reset { > + struct regmap *map; > + struct reset_controller_dev rcdev; > +}; > + > +#define to_aspeed_reset(p) container_of((p), struct aspeed_reset, rcdev) > + > +static const u8 aspeed_resets[] = { > + 25, /* x-dma */ > + 24, /* mctp */ > + 23, /* adc */ > + 22, /* jtag-master */ > + 18, /* mic */ > + 9, /* pwm */ > + 8, /* pci-vga */ > + 2, /* i2c */ > + 1, /* ahb */ Bit of a nit, but given you define macros for the indices, maybe use designated initialisers and drop the comments. > +}; > + > +static int aspeed_reset_deassert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct aspeed_reset *ar = to_aspeed_reset(rcdev); > + u32 rst = BIT(aspeed_resets[id]); > + > + return regmap_update_bits(ar->map, ASPEED_RESET_CTRL, rst, 0); > +} > + > +static int aspeed_reset_assert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct aspeed_reset *ar = to_aspeed_reset(rcdev); > + u32 rst = BIT(aspeed_resets[id]); > + > + return regmap_update_bits(ar->map, ASPEED_RESET_CTRL, rst, rst); > +} > + > +static int aspeed_reset_status(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct aspeed_reset *ar = to_aspeed_reset(rcdev); > + u32 val, rst = BIT(aspeed_resets[id]); > + int ret; > + > + ret = regmap_read(ar->map, ASPEED_RESET_CTRL, &val); > + if (ret) > + return ret; > + > + return !!(val & rst); > +} > + > +static const struct reset_control_ops aspeed_reset_ops = { > + .assert = aspeed_reset_assert, > + .deassert = aspeed_reset_deassert, > + .status = aspeed_reset_status, > +}; > + > static struct clk_hw *aspeed_clk_hw_register_gate(struct device *dev, > const char *name, const char *parent_name, unsigned long flags, > struct regmap *map, u8 clock_idx, u8 reset_idx, > @@ -299,10 +362,11 @@ static int __init aspeed_clk_probe(struct platform_device *pdev) > const struct clk_div_table *mac_div_table; > const struct clk_div_table *div_table; > struct device *dev = &pdev->dev; > + struct aspeed_reset *ar; > struct regmap *map; > struct clk_hw *hw; > u32 val, rate; > - int i; > + int i, ret; > > map = syscon_node_to_regmap(dev->of_node); > if (IS_ERR(map)) { > @@ -310,6 +374,22 @@ static int __init aspeed_clk_probe(struct platform_device *pdev) > return PTR_ERR(map); > } > > + ar = devm_kzalloc(dev, sizeof(*ar), GFP_KERNEL); > + if (!ar) > + return -ENOMEM; > + > + ar->map = map; > + ar->rcdev.owner = THIS_MODULE; > + ar->rcdev.nr_resets = ARRAY_SIZE(aspeed_resets); > + ar->rcdev.ops = &aspeed_reset_ops; > + ar->rcdev.of_node = dev->of_node; > + > + ret = devm_reset_controller_register(dev, &ar->rcdev); > + if (ret) { > + dev_err(dev, "could not register reset controller\n"); > + return ret; > + } > + > /* SoC generations share common layouts but have different divisors */ > soc_data = of_device_get_match_data(&pdev->dev); > div_table = soc_data->div_table; > diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h > index afe06b77562d..a9d552b6bbd2 100644 > --- a/include/dt-bindings/clock/aspeed-clock.h > +++ b/include/dt-bindings/clock/aspeed-clock.h > @@ -40,4 +40,13 @@ > #define ASPEED_CLK_GATE_SDCLKCLK (22 + ASPEED_CLK_GATES) > #define ASPEED_CLK_GATE_LHCCLK (23 + ASPEED_CLK_GATES) > > +#define ASPEED_RESET_XDMA 0 > +#define ASPEED_RESET_MCTP 1 > +#define ASPEED_RESET_JTAG_MASTER 2 > +#define ASPEED_RESET_MIC 3 > +#define ASPEED_RESET_PWM 4 > +#define ASPEED_RESET_PCIVGA 5 > +#define ASPEED_RESET_I2C 6 > +#define ASPEED_RESET_AHB 7 > + > #endif [-- Attachment #2: This is a digitally signed message part --] [-- Type: application/pgp-signature, Size: 801 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: andrew@aj.id.au (Andrew Jeffery) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 5/5] clk: aspeed: Add reset controller Date: Mon, 25 Sep 2017 22:24:41 +0930 [thread overview] Message-ID: <1506344081.30138.32.camel@aj.id.au> (raw) In-Reply-To: <20170921042641.7326-6-joel@jms.id.au> On Thu, 2017-09-21 at 13:56 +0930, Joel Stanley wrote: > There are some resets that are not associated with gates. These are > represented by a reset controller. >? > Signed-off-by: Joel Stanley <joel@jms.id.au> > --- > ?drivers/clk/clk-aspeed.c?????????????????| 82 +++++++++++++++++++++++++++++++- > ?include/dt-bindings/clock/aspeed-clock.h |??9 ++++ > ?2 files changed, 90 insertions(+), 1 deletion(-) >? > diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c > index dec9db4ec47b..db97c0f9f99e 100644 > --- a/drivers/clk/clk-aspeed.c > +++ b/drivers/clk/clk-aspeed.c > @@ -17,6 +17,7 @@ > ?#include <linux/of_device.h> > ?#include <linux/platform_device.h> > ?#include <linux/regmap.h> > +#include <linux/reset-controller.h> > ?#include <linux/slab.h> > ?#include <linux/spinlock.h> > ? > @@ -256,6 +257,68 @@ static const struct clk_ops aspeed_clk_gate_ops = { > ? .is_enabled = aspeed_clk_is_enabled, > ?}; > ? > +/** > + * struct aspeed_reset - Aspeed reset controller > + * @map: regmap to access the containing system controller > + * @rcdev: reset controller device > + */ > +struct aspeed_reset { > + struct regmap *map; > + struct reset_controller_dev rcdev; > +}; > + > +#define to_aspeed_reset(p) container_of((p), struct aspeed_reset, rcdev) > + > +static const u8 aspeed_resets[] = { > + 25, /* x-dma */ > + 24, /* mctp */ > + 23, /* adc */ > + 22, /* jtag-master */ > + 18, /* mic */ > + ?9, /* pwm */ > + ?8, /* pci-vga */ > + ?2, /* i2c */ > + ?1, /* ahb */ Bit of a nit, but given you define macros for the indices, maybe use designated initialisers and drop the comments. > +}; > + > +static int aspeed_reset_deassert(struct reset_controller_dev *rcdev, > + ?unsigned long id) > +{ > + struct aspeed_reset *ar = to_aspeed_reset(rcdev); > + u32 rst = BIT(aspeed_resets[id]); > + > + return regmap_update_bits(ar->map, ASPEED_RESET_CTRL, rst, 0); > +} > + > +static int aspeed_reset_assert(struct reset_controller_dev *rcdev, > + ???????unsigned long id) > +{ > + struct aspeed_reset *ar = to_aspeed_reset(rcdev); > + u32 rst = BIT(aspeed_resets[id]); > + > + return regmap_update_bits(ar->map, ASPEED_RESET_CTRL, rst, rst); > +} > + > +static int aspeed_reset_status(struct reset_controller_dev *rcdev, > + ???????unsigned long id) > +{ > + struct aspeed_reset *ar = to_aspeed_reset(rcdev); > + u32 val, rst = BIT(aspeed_resets[id]); > + int ret; > + > + ret = regmap_read(ar->map, ASPEED_RESET_CTRL, &val); > + if (ret) > + return ret; > + > + return !!(val & rst); > +} > + > +static const struct reset_control_ops aspeed_reset_ops = { > + .assert = aspeed_reset_assert, > + .deassert = aspeed_reset_deassert, > + .status = aspeed_reset_status, > +}; > + > ?static struct clk_hw *aspeed_clk_hw_register_gate(struct device *dev, > ? const char *name, const char *parent_name, unsigned long flags, > ? struct regmap *map, u8 clock_idx, u8 reset_idx, > @@ -299,10 +362,11 @@ static int __init aspeed_clk_probe(struct platform_device *pdev) > ? const struct clk_div_table *mac_div_table; > ? const struct clk_div_table *div_table; > ? struct device *dev = &pdev->dev; > + struct aspeed_reset *ar; > ? struct regmap *map; > ? struct clk_hw *hw; > ? u32 val, rate; > - int i; > + int i, ret; > ? > ? map = syscon_node_to_regmap(dev->of_node); > ? if (IS_ERR(map)) { > @@ -310,6 +374,22 @@ static int __init aspeed_clk_probe(struct platform_device *pdev) > ? return PTR_ERR(map); > ? } > ? > + ar = devm_kzalloc(dev, sizeof(*ar), GFP_KERNEL); > + if (!ar) > + return -ENOMEM; > + > + ar->map = map; > + ar->rcdev.owner = THIS_MODULE; > + ar->rcdev.nr_resets = ARRAY_SIZE(aspeed_resets); > + ar->rcdev.ops = &aspeed_reset_ops; > + ar->rcdev.of_node = dev->of_node; > + > + ret = devm_reset_controller_register(dev, &ar->rcdev); > + if (ret) { > + dev_err(dev, "could not register reset controller\n"); > + return ret; > + } > + > ? /* SoC generations share common layouts but have different divisors */ > ? soc_data = of_device_get_match_data(&pdev->dev); > ? div_table = soc_data->div_table; > diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h > index afe06b77562d..a9d552b6bbd2 100644 > --- a/include/dt-bindings/clock/aspeed-clock.h > +++ b/include/dt-bindings/clock/aspeed-clock.h > @@ -40,4 +40,13 @@ > ?#define ASPEED_CLK_GATE_SDCLKCLK (22 + ASPEED_CLK_GATES) > ?#define ASPEED_CLK_GATE_LHCCLK (23 + ASPEED_CLK_GATES) > ? > +#define ASPEED_RESET_XDMA 0 > +#define ASPEED_RESET_MCTP 1 > +#define ASPEED_RESET_JTAG_MASTER 2 > +#define ASPEED_RESET_MIC 3 > +#define ASPEED_RESET_PWM 4 > +#define ASPEED_RESET_PCIVGA 5 > +#define ASPEED_RESET_I2C 6 > +#define ASPEED_RESET_AHB 7 > + > ?#endif -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 801 bytes Desc: This is a digitally signed message part URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170925/645f6bb8/attachment.sig>
next prev parent reply other threads:[~2017-09-25 12:54 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-09-21 4:26 [PATCH v2 0/5] clk: Add Aspeed clock driver Joel Stanley 2017-09-21 4:26 ` Joel Stanley 2017-09-21 4:26 ` [PATCH v2 1/5] clk: Add clock driver for ASPEED BMC SoCs Joel Stanley 2017-09-21 4:26 ` Joel Stanley 2017-09-25 3:40 ` Andrew Jeffery 2017-09-25 3:40 ` Andrew Jeffery 2017-09-27 6:11 ` Joel Stanley 2017-09-27 6:11 ` Joel Stanley 2017-09-21 4:26 ` [PATCH v2 2/5] clk: aspeed: Register core clocks Joel Stanley 2017-09-21 4:26 ` Joel Stanley 2017-09-25 12:02 ` Andrew Jeffery 2017-09-25 12:02 ` Andrew Jeffery 2017-09-27 6:13 ` Joel Stanley 2017-09-27 6:13 ` Joel Stanley 2017-10-02 21:39 ` Stephen Boyd 2017-10-02 21:39 ` Stephen Boyd 2017-09-21 4:26 ` [PATCH v2 3/5] clk: aspeed: Add platform driver and register PLLs Joel Stanley 2017-09-21 4:26 ` Joel Stanley 2017-09-25 12:40 ` Andrew Jeffery 2017-09-25 12:40 ` Andrew Jeffery 2017-09-27 6:13 ` Joel Stanley 2017-09-27 6:13 ` Joel Stanley 2017-09-27 7:34 ` Andrew Jeffery 2017-09-27 7:34 ` Andrew Jeffery 2017-09-28 4:29 ` Joel Stanley 2017-09-28 4:29 ` Joel Stanley 2017-10-02 21:24 ` Stephen Boyd 2017-10-02 21:24 ` Stephen Boyd 2017-10-03 5:48 ` Joel Stanley 2017-10-03 5:48 ` Joel Stanley 2017-10-04 21:18 ` Stephen Boyd 2017-10-04 21:18 ` Stephen Boyd 2017-10-05 6:22 ` Joel Stanley 2017-10-05 6:22 ` Joel Stanley 2017-09-21 4:26 ` [PATCH v2 4/5] clk: aspeed: Register gated clocks Joel Stanley 2017-09-21 4:26 ` Joel Stanley 2017-10-02 21:37 ` Stephen Boyd 2017-10-02 21:37 ` Stephen Boyd 2017-10-03 5:47 ` Joel Stanley 2017-10-03 5:47 ` Joel Stanley 2017-09-21 4:26 ` [PATCH v2 5/5] clk: aspeed: Add reset controller Joel Stanley 2017-09-21 4:26 ` Joel Stanley 2017-09-25 12:54 ` Andrew Jeffery [this message] 2017-09-25 12:54 ` Andrew Jeffery 2017-09-27 6:13 ` Joel Stanley 2017-09-27 6:13 ` Joel Stanley
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1506344081.30138.32.camel@aj.id.au \ --to=andrew@aj.id.au \ --cc=arnd@arndb.de \ --cc=benh@kernel.crashing.org \ --cc=jk@ozlabs.org \ --cc=joel@jms.id.au \ --cc=lee.jones@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mturquette@baylibre.com \ --cc=raltherr@google.com \ --cc=ryan_chen@aspeedtech.com \ --cc=sboyd@codeaurora.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.