From: Michel Pollet <michel.pollet@bp.renesas.com>
To: linux-renesas-soc@vger.kernel.org, Simon Horman <horms@verge.net.au>
Cc: phil.edworthy@renesas.com, buserror+upstream@gmail.com,
"Michel Pollet" <michel.pollet@bp.renesas.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
"Kevin Hilman" <khilman@baylibre.com>,
"Rajendra Nayak" <rnayak@codeaurora.org>,
"Stefan Wahren" <stefan.wahren@i2se.com>,
"Juri Lelli" <juri.lelli@arm.com>,
"Frank Rowand" <frank.rowand@sony.com>,
"Carlo Caione" <carlo@endlessm.com>,
"Andreas Färber" <afaerber@suse.de>,
"Florian Fainelli" <f.fainelli@gmail.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [RFC 0/3] Renesas RZ/N1D SMP enabler
Date: Mon, 16 Apr 2018 10:34:55 +0100 [thread overview]
Message-ID: <1523871304-48517-1-git-send-email-michel.pollet@bp.renesas.com> (raw)
*Warning -- this requires the base RZ/N1 support patches already posted *
This is a tentative patch series for enabling the second CA7 of the RZ/N1D.
It's based on a spin_table method, and it reuses the same binding property
as that driver.
One question is: Do i have to document it separately, or is it sufficiently
clear?
Michel Pollet (3):
dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.
ARM: dts: Renesas RZ/N1D SMP enable method
arm: shmobile: Add the RZ/N1D SMP enabler driver.
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
arch/arm/boot/dts/r9a06g032.dtsi | 2 +
arch/arm/mach-shmobile/Makefile | 1 +
arch/arm/mach-shmobile/smp-r9a06g032.c | 87 ++++++++++++++++++++++++++
4 files changed, 91 insertions(+)
create mode 100644 arch/arm/mach-shmobile/smp-r9a06g032.c
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Michel Pollet <michel.pollet@bp.renesas.com>
To: linux-renesas-soc@vger.kernel.org, Simon Horman <horms@verge.net.au>
Cc: phil.edworthy@renesas.com, buserror+upstream@gmail.com,
"Michel Pollet" <michel.pollet@bp.renesas.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
"Kevin Hilman" <khilman@baylibre.com>,
"Rajendra Nayak" <rnayak@codeaurora.org>,
"Stefan Wahren" <stefan.wahren@i2se.com>,
"Juri Lelli" <juri.lelli@arm.com>,
"Frank Rowand" <frank.rowand@sony.com>,
"Carlo Caione" <carlo@endlessm.com>,
"Andreas Färber" <afaerber@suse.de>,
"Florian Fainelli" <f.fainelli@gmail.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [RFC 0/3] Renesas RZ/N1D SMP enabler
Date: Mon, 16 Apr 2018 10:34:55 +0100 [thread overview]
Message-ID: <1523871304-48517-1-git-send-email-michel.pollet@bp.renesas.com> (raw)
*Warning -- this requires the base RZ/N1 support patches already posted *
This is a tentative patch series for enabling the second CA7 of the RZ/N1D.
It's based on a spin_table method, and it reuses the same binding property
as that driver.
One question is: Do i have to document it separately, or is it sufficiently
clear?
Michel Pollet (3):
dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.
ARM: dts: Renesas RZ/N1D SMP enable method
arm: shmobile: Add the RZ/N1D SMP enabler driver.
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
arch/arm/boot/dts/r9a06g032.dtsi | 2 +
arch/arm/mach-shmobile/Makefile | 1 +
arch/arm/mach-shmobile/smp-r9a06g032.c | 87 ++++++++++++++++++++++++++
4 files changed, 91 insertions(+)
create mode 100644 arch/arm/mach-shmobile/smp-r9a06g032.c
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: michel.pollet@bp.renesas.com (Michel Pollet)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 0/3] Renesas RZ/N1D SMP enabler
Date: Mon, 16 Apr 2018 10:34:55 +0100 [thread overview]
Message-ID: <1523871304-48517-1-git-send-email-michel.pollet@bp.renesas.com> (raw)
*Warning -- this requires the base RZ/N1 support patches already posted *
This is a tentative patch series for enabling the second CA7 of the RZ/N1D.
It's based on a spin_table method, and it reuses the same binding property
as that driver.
One question is: Do i have to document it separately, or is it sufficiently
clear?
Michel Pollet (3):
dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.
ARM: dts: Renesas RZ/N1D SMP enable method
arm: shmobile: Add the RZ/N1D SMP enabler driver.
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
arch/arm/boot/dts/r9a06g032.dtsi | 2 +
arch/arm/mach-shmobile/Makefile | 1 +
arch/arm/mach-shmobile/smp-r9a06g032.c | 87 ++++++++++++++++++++++++++
4 files changed, 91 insertions(+)
create mode 100644 arch/arm/mach-shmobile/smp-r9a06g032.c
--
2.7.4
next reply other threads:[~2018-04-16 9:34 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-16 9:34 Michel Pollet [this message]
2018-04-16 9:34 ` [RFC 0/3] Renesas RZ/N1D SMP enabler Michel Pollet
2018-04-16 9:34 ` Michel Pollet
2018-04-16 9:34 ` [PATCH 1/1] arm: rzn1: Add support for the second CPU Michel Pollet
2018-04-16 9:34 ` Michel Pollet
2018-04-16 9:34 ` [RFC 1/3] dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method Michel Pollet
2018-04-16 9:34 ` Michel Pollet
2018-04-16 21:37 ` Rob Herring
2018-04-16 21:37 ` Rob Herring
2018-04-16 9:34 ` [RFC 2/3] ARM: dts: " Michel Pollet
2018-04-16 9:34 ` Michel Pollet
2018-04-16 9:34 ` [RFC 3/3] arm: shmobile: Add the RZ/N1D SMP enabler driver Michel Pollet
2018-04-16 9:34 ` Michel Pollet
2018-04-16 21:46 ` Florian Fainelli
2018-04-16 21:46 ` Florian Fainelli
2018-04-17 9:32 ` Michel Pollet
2018-04-17 9:32 ` Michel Pollet
2018-04-17 9:32 ` Michel Pollet
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