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From: Luwei Kang <luwei.kang@intel.com>
To: kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	x86@kernel.org, pbonzini@redhat.com, rkrcmar@redhat.com,
	linux-kernel@vger.kernel.org, joro@8bytes.org,
	peterz@infradead.org, chao.p.peng@linux.intel.com,
	Luwei Kang <luwei.kang@intel.com>
Subject: [PATCH v7 12/13] KVM: x86: Set intercept for Intel PT MSRs read/write
Date: Thu,  3 May 2018 20:08:42 +0800	[thread overview]
Message-ID: <1525349323-9938-13-git-send-email-luwei.kang@intel.com> (raw)
In-Reply-To: <1525349323-9938-1-git-send-email-luwei.kang@intel.com>

From: Chao Peng <chao.p.peng@linux.intel.com>

Disable intercept Intel PT MSRs only when Intel PT is
enabled in guest. But MSR_IA32_RTIT_CTL will alway be
intercept.

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
---
 arch/x86/kvm/vmx.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 2a29ab9..c125fb1 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -947,6 +947,7 @@ static bool nested_vmx_is_page_fault_vmexit(struct vmcs12 *vmcs12,
 static void vmx_update_msr_bitmap(struct kvm_vcpu *vcpu);
 static void __always_inline vmx_disable_intercept_for_msr(unsigned long *msr_bitmap,
 							  u32 msr, int type);
+static void pt_set_intercept_for_msr(struct vcpu_vmx *vmx, bool flag);
 
 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
@@ -3954,6 +3955,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 			vmx_rtit_ctl_check(vcpu, data))
 			return 1;
 		vmcs_write64(GUEST_IA32_RTIT_CTL, data);
+		pt_set_intercept_for_msr(vmx, !(data & RTIT_CTL_TRACEEN));
 		vmx->pt_desc.guest.ctl = data;
 		break;
 	case MSR_IA32_RTIT_STATUS:
@@ -5761,6 +5763,24 @@ static void vmx_update_msr_bitmap(struct kvm_vcpu *vcpu)
 	vmx->msr_bitmap_mode = mode;
 }
 
+static void pt_set_intercept_for_msr(struct vcpu_vmx *vmx, bool flag)
+{
+	unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap;
+	u32 i;
+
+	vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_STATUS,
+							MSR_TYPE_RW, flag);
+	vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_OUTPUT_BASE,
+							MSR_TYPE_RW, flag);
+	vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_OUTPUT_MASK,
+							MSR_TYPE_RW, flag);
+	vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_CR3_MATCH,
+							MSR_TYPE_RW, flag);
+	for (i = 0; i < vmx->pt_desc.range_cnt; i++)
+		vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_ADDR0_A + i,
+							MSR_TYPE_RW, flag);
+}
+
 static bool vmx_get_enable_apicv(struct kvm_vcpu *vcpu)
 {
 	return enable_apicv;
-- 
1.8.3.1

  parent reply	other threads:[~2018-05-03 10:15 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-03 12:08 [PATCH v7 00/13] Intel Processor Trace virtualization enabling Luwei Kang
2018-05-03 10:33 ` Alexander Shishkin
2018-05-03 12:08 ` [PATCH v7 01/13] perf/x86/intel/pt: Move Intel-PT MSRs bit definitions to a public header Luwei Kang
2018-05-03 12:08 ` [PATCH v7 02/13] perf/x86/intel/pt: Change pt_cap_get() to a public function Luwei Kang
2018-05-03 12:08 ` [PATCH v7 03/13] perf/x86/intel/pt: Add new bit definitions for Intel PT MSRs Luwei Kang
2018-05-03 12:08 ` [PATCH v7 04/13] perf/x86/intel/pt: add new capability for Intel PT Luwei Kang
2018-05-03 12:08 ` [PATCH v7 05/13] perf/x86/intel/pt: Introduce a new function to get capability of " Luwei Kang
2018-05-03 10:50   ` Alexander Shishkin
2018-05-03 11:04     ` Kang, Luwei
2018-05-03 12:13       ` Alexander Shishkin
2018-05-03 12:30         ` Paolo Bonzini
2018-05-03 12:30         ` Kang, Luwei
2018-05-03 12:32           ` Paolo Bonzini
2018-05-03 12:50             ` Kang, Luwei
2018-05-03 12:59               ` Alexander Shishkin
2018-05-03 12:08 ` [PATCH v7 06/13] KVM: x86: Add Intel Processor Trace virtualization mode Luwei Kang
2018-05-03 11:32   ` Alexander Shishkin
2018-05-03 11:50     ` Paolo Bonzini
2018-05-03 12:02       ` Alexander Shishkin
2018-05-03 12:30         ` Paolo Bonzini
2018-05-03 12:48           ` Alexander Shishkin
2018-05-03 12:50             ` Paolo Bonzini
2018-05-03 13:38               ` Alexander Shishkin
2018-05-03 13:48                 ` Paolo Bonzini
2018-05-04 10:38                   ` Alexander Shishkin
2018-05-04 21:52                     ` Paolo Bonzini
2018-05-04 10:45                 ` Peter Zijlstra
2018-05-04 21:44                   ` Paolo Bonzini
2018-05-04 22:15                     ` Peter Zijlstra
2018-05-07 10:47                       ` Paolo Bonzini
2018-05-03 11:52     ` Paolo Bonzini
2018-05-03 12:09       ` Alexander Shishkin
2018-05-03 12:31         ` Paolo Bonzini
2018-05-03 12:08 ` [PATCH v7 07/13] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2018-05-03 12:08 ` [PATCH v7 08/13] KVM: x86: Add Intel processor trace context for each vcpu Luwei Kang
2018-05-03 11:39   ` Alexander Shishkin
2018-05-03 11:53     ` Paolo Bonzini
2018-05-03 12:08 ` [PATCH v7 09/13] KVM: x86: Implement Intel Processor Trace context switch Luwei Kang
2018-05-04 10:29   ` Alexander Shishkin
2018-05-04 21:49     ` Paolo Bonzini
2018-05-03 12:08 ` [PATCH v7 10/13] KVM: x86: Introduce a function to initialize the PT configuration Luwei Kang
2018-05-03 12:08 ` [PATCH v7 11/13] KVM: x86: Implement Intel Processor Trace MSRs read/write Luwei Kang
2018-05-04 10:11   ` Alexander Shishkin
2018-05-04 21:47     ` Paolo Bonzini
2018-05-03 12:08 ` Luwei Kang [this message]
2018-05-03 12:08 ` [PATCH v7 13/13] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang
2018-05-04 10:23   ` Alexander Shishkin
2018-05-04 21:49     ` Paolo Bonzini
2018-05-03 12:13 [PATCH v7 00/13] Intel Processor Trace virtualization enabling Luwei Kang
2018-05-03 12:13 ` [PATCH v7 12/13] KVM: x86: Set intercept for Intel PT MSRs read/write Luwei Kang

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