[PATCH 0/2] x86/cpuid: Trivial fixes

[PATCH 0/2] x86/cpuid: Trivial fixes

[Andrew Cooper]

This is some trivial prep work for the main CPUID work.

Andrew Cooper (2):
  x86/cpuid: Fix up stale comments
  x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

 tools/libxc/xc_cpuid_x86.c  | 11 ++++++++++-
 xen/arch/x86/cpuid.c        | 43 ++++++++++++++++++++++++++++++++++++++++---
 xen/arch/x86/domctl.c       | 13 ++++++++++---
 xen/include/asm-x86/cpuid.h | 18 +++++++++++++++++-
 4 files changed, 77 insertions(+), 8 deletions(-)

-- 
2.1.4


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[PATCH 1/2] x86/cpuid: Fix up stale comments

[Andrew Cooper]

 * There is no legacy path any more.  All static information is retrieved in
   the first pass.
 * d->arch.cpuids[] doesn't exist any more.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/cpuid.c  | 2 +-
 xen/arch/x86/domctl.c | 5 ++---
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index beee47d..eca1a9a 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -701,7 +701,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
      * First pass:
      * - Perform max_leaf/subleaf calculations.  Out-of-range leaves return
      *   all zeros, following the AMD model.
-     * - Fill in *res for leaves no longer handled on the legacy path.
+     * - Fill in *res with static data.
      * - Dispatch the virtualised leaves to their respective handlers.
      */
     switch ( leaf )
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 8fbbf3a..105a576 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -56,9 +56,8 @@ static int update_domain_cpuid_info(struct domain *d,
     bool call_policy_changed = false; /* Avoid for_each_vcpu() unnecessarily */
 
     /*
-     * Skip update for leaves we don't care about.  This avoids the overhead
-     * of recalculate_cpuid_policy() and making d->arch.cpuids[] needlessly
-     * longer to search.
+     * Skip update for leaves we don't care about, to avoid the overhead of
+     * recalculate_cpuid_policy().
      */
     switch ( ctl->input[0] )
     {
-- 
2.1.4


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[PATCH 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Andrew Cooper]

The new data lives in the .topo union, rather than being treated as a single
leaf in the basic union.

Host data is scanned when filling in the raw policy, but Xen still discards
any toolstack settings for now.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Ian Jackson <Ian.Jackson@eu.citrix.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
---
 tools/libxc/xc_cpuid_x86.c  | 11 ++++++++++-
 xen/arch/x86/cpuid.c        | 41 +++++++++++++++++++++++++++++++++++++++--
 xen/arch/x86/domctl.c       |  8 ++++++++
 xen/include/asm-x86/cpuid.h | 18 +++++++++++++++++-
 4 files changed, 74 insertions(+), 4 deletions(-)

diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 21537f0..96c6c95 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -764,13 +764,22 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid,
             if ( (regs[0] & 0x1f) != 0 )
                 continue;
         }
+        /* Extended Topology leaves. */
+        else if ( input[0] == 0xb )
+        {
+            uint8_t level_type = regs[2] >> 8;
+
+            input[1]++;
+            if ( level_type >= 1 && level_type <= 2 )
+                continue;
+        }
 
         input[0]++;
         if ( !(input[0] & 0x80000000u) && (input[0] > base_max ) )
             input[0] = 0x80000000u;
 
         input[1] = XEN_CPUID_INPUT_UNUSED;
-        if ( (input[0] == 4) || (input[0] == 7) )
+        if ( (input[0] == 4) || (input[0] == 7) || (input[0] == 0xb) )
             input[1] = 0;
         else if ( input[0] == 0xd )
             input[1] = 1; /* Xen automatically calculates almost everything. */
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index eca1a9a..a6f7bc6 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -205,7 +205,10 @@ static void recalculate_misc(struct cpuid_policy *p)
     p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */
 
     p->basic.raw[0x8] = EMPTY_LEAF;
-    p->basic.raw[0xb] = EMPTY_LEAF; /* TODO: Rework topology logic. */
+
+    /* TODO: Rework topology logic. */
+    memset(p->topo.raw, 0, sizeof(p->topo.raw));
+
     p->basic.raw[0xc] = EMPTY_LEAF;
 
     p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES;
@@ -273,7 +276,7 @@ static void __init calculate_raw_policy(void)
     {
         switch ( i )
         {
-        case 0x4: case 0x7: case 0xd:
+        case 0x4: case 0x7: case 0xb: case 0xd:
             /* Multi-invocation leaves.  Deferred. */
             continue;
         }
@@ -316,6 +319,33 @@ static void __init calculate_raw_policy(void)
             cpuid_count_leaf(7, i, &p->feat.raw[i]);
     }
 
+    if ( p->basic.max_leaf >= 0xb )
+    {
+        union {
+            struct cpuid_leaf l;
+            struct cpuid_topo_leaf t;
+        } u;
+
+        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
+        {
+            cpuid_count_leaf(0xb, i, &u.l);
+
+            if ( u.t.type == 0 )
+                break;
+
+            p->topo.subleaf[i] = u.t;
+        }
+
+        /*
+         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
+         * to grow for future harware.
+         */
+        if ( i == ARRAY_SIZE(p->topo.raw) &&
+             (cpuid_count_leaf(0xb, i, &u.l), u.t.type != 0) )
+            printk(XENLOG_WARNING
+                   "CPUID: Insufficient Leaf 0xb space for this hardware\n");
+    }
+
     if ( p->basic.max_leaf >= XSTATE_CPUID )
     {
         uint64_t xstates;
@@ -730,6 +760,13 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
             *res = p->feat.raw[subleaf];
             break;
 
+        case 0xb:
+            if ( subleaf >= ARRAY_SIZE(p->topo.raw) )
+                return;
+
+            *res = p->topo.raw[subleaf];
+            break;
+
         case XSTATE_CPUID:
             if ( !p->basic.xsave || subleaf >= ARRAY_SIZE(p->xstate.raw) )
                 return;
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 105a576..3e9580b 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -70,6 +70,10 @@ static int update_domain_cpuid_info(struct domain *d,
              ctl->input[1] >= ARRAY_SIZE(p->feat.raw) )
             return 0;
 
+        if ( ctl->input[0] == 0xb &&
+             ctl->input[1] >= ARRAY_SIZE(p->topo.raw) )
+            return 0;
+
         BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) < 2);
         if ( ctl->input[0] == XSTATE_CPUID &&
              ctl->input[1] != 1 ) /* Everything else automatically calculated. */
@@ -100,6 +104,10 @@ static int update_domain_cpuid_info(struct domain *d,
             p->feat.raw[ctl->input[1]] = leaf;
             break;
 
+        case 0xb:
+            p->topo.raw[ctl->input[1]] = leaf;
+            break;
+
         case XSTATE_CPUID:
             p->xstate.raw[ctl->input[1]] = leaf;
             break;
diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h
index 4cce268..4113a5e 100644
--- a/xen/include/asm-x86/cpuid.h
+++ b/xen/include/asm-x86/cpuid.h
@@ -61,6 +61,7 @@ extern struct cpuidmasks cpuidmask_defaults;
 #define CPUID_GUEST_NR_BASIC      (0xdu + 1)
 #define CPUID_GUEST_NR_FEAT       (0u + 1)
 #define CPUID_GUEST_NR_CACHE      (5u + 1)
+#define CPUID_GUEST_NR_TOPO       (1u + 1)
 #define CPUID_GUEST_NR_XSTATE     (62u + 1)
 #define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1)
 #define CPUID_GUEST_NR_EXTD_AMD   (0x1cu + 1)
@@ -108,7 +109,11 @@ struct cpuid_policy
             uint64_t :64, :64; /* Leaf 0x9 - DCA */
 
             /* Leaf 0xa - Intel PMU. */
-            uint8_t pmu_version;
+            uint8_t pmu_version, _pmu[15];
+
+            uint64_t :64, :64; /* Leaf 0xb - Topology. */
+            uint64_t :64, :64; /* Leaf 0xc - rsvd */
+            uint64_t :64, :64; /* Leaf 0xd - XSTATE. */
         };
     } basic;
 
@@ -142,6 +147,17 @@ struct cpuid_policy
         };
     } feat;
 
+    /* Extended topology enumeration: 0x0000000B[xx] */
+    union {
+        struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO];
+        struct cpuid_topo_leaf {
+            uint32_t id_shift:5, :27;
+            uint16_t nr_logical, :16;
+            uint8_t level, type, :8, :8;
+            uint32_t x2apic_id;
+        } subleaf[CPUID_GUEST_NR_TOPO];
+    } topo;
+
     /* Xstate feature leaf: 0x0000000D[xx] */
     union {
         struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE];
-- 
2.1.4


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Re: [PATCH 1/2] x86/cpuid: Fix up stale comments

[Jan Beulich]

 >>> On 27.06.18 at 15:55, <andrew.cooper3@citrix.com> wrote:
> * There is no legacy path any more.  All static information is retrieved in
>    the first pass.
>  * d->arch.cpuids[] doesn't exist any more.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Acked-by: Jan Beulich <jbeulich@suse.com>



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Re: [PATCH 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Jan Beulich]

>>> On 27.06.18 at 15:55, <andrew.cooper3@citrix.com> wrote:
> @@ -316,6 +319,33 @@ static void __init calculate_raw_policy(void)
>              cpuid_count_leaf(7, i, &p->feat.raw[i]);
>      }
>  
> +    if ( p->basic.max_leaf >= 0xb )
> +    {
> +        union {
> +            struct cpuid_leaf l;
> +            struct cpuid_topo_leaf t;
> +        } u;
> +
> +        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
> +        {
> +            cpuid_count_leaf(0xb, i, &u.l);
> +
> +            if ( u.t.type == 0 )
> +                break;
> +
> +            p->topo.subleaf[i] = u.t;
> +        }
> +
> +        /*
> +         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
> +         * to grow for future harware.

Missing d.

> @@ -108,7 +109,11 @@ struct cpuid_policy
>              uint64_t :64, :64; /* Leaf 0x9 - DCA */
>  
>              /* Leaf 0xa - Intel PMU. */
> -            uint8_t pmu_version;
> +            uint8_t pmu_version, _pmu[15];
> +
> +            uint64_t :64, :64; /* Leaf 0xb - Topology. */
> +            uint64_t :64, :64; /* Leaf 0xc - rsvd */
> +            uint64_t :64, :64; /* Leaf 0xd - XSTATE. */

I don't understand why you add the latter two lines, neither in general
nor in the particular context of this patch.

Jan



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Re: [PATCH 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Andrew Cooper]

On 27/06/18 15:58, Jan Beulich wrote:
>>>> On 27.06.18 at 15:55, <andrew.cooper3@citrix.com> wrote:
>> @@ -316,6 +319,33 @@ static void __init calculate_raw_policy(void)
>>              cpuid_count_leaf(7, i, &p->feat.raw[i]);
>>      }
>>  
>> +    if ( p->basic.max_leaf >= 0xb )
>> +    {
>> +        union {
>> +            struct cpuid_leaf l;
>> +            struct cpuid_topo_leaf t;
>> +        } u;
>> +
>> +        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
>> +        {
>> +            cpuid_count_leaf(0xb, i, &u.l);
>> +
>> +            if ( u.t.type == 0 )
>> +                break;
>> +
>> +            p->topo.subleaf[i] = u.t;
>> +        }
>> +
>> +        /*
>> +         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
>> +         * to grow for future harware.
> Missing d.

Where?  I'm afraid that after repeated re-reads, I can't spot any issue.

>
>> @@ -108,7 +109,11 @@ struct cpuid_policy
>>              uint64_t :64, :64; /* Leaf 0x9 - DCA */
>>  
>>              /* Leaf 0xa - Intel PMU. */
>> -            uint8_t pmu_version;
>> +            uint8_t pmu_version, _pmu[15];
>> +
>> +            uint64_t :64, :64; /* Leaf 0xb - Topology. */
>> +            uint64_t :64, :64; /* Leaf 0xc - rsvd */
>> +            uint64_t :64, :64; /* Leaf 0xd - XSTATE. */
> I don't understand why you add the latter two lines, neither in general
> nor in the particular context of this patch.

This is part of reducing the effort for people extending the CPUID
leaves, by keeping the .basic union in line with max_leaf.

There are further non-subleaf leaves beyond this point (0x15/0x16) and
I've noticed several mistakes with newer submitted series.  I'd much
rather do this myself once now, than attempt to explain it to others
during code review.

~Andrew

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Re: [PATCH 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Wei Liu]

On Wed, Jun 27, 2018 at 04:58:08PM +0100, Andrew Cooper wrote:
> On 27/06/18 15:58, Jan Beulich wrote:
> >>>> On 27.06.18 at 15:55, <andrew.cooper3@citrix.com> wrote:
> >> @@ -316,6 +319,33 @@ static void __init calculate_raw_policy(void)
> >>              cpuid_count_leaf(7, i, &p->feat.raw[i]);
> >>      }
> >>  
> >> +    if ( p->basic.max_leaf >= 0xb )
> >> +    {
> >> +        union {
> >> +            struct cpuid_leaf l;
> >> +            struct cpuid_topo_leaf t;
> >> +        } u;
> >> +
> >> +        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
> >> +        {
> >> +            cpuid_count_leaf(0xb, i, &u.l);
> >> +
> >> +            if ( u.t.type == 0 )
> >> +                break;
> >> +
> >> +            p->topo.subleaf[i] = u.t;
> >> +        }
> >> +
> >> +        /*
> >> +         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
> >> +         * to grow for future harware.
> > Missing d.
> 
> Where?  I'm afraid that after repeated re-reads, I can't spot any issue.
> 

har d ware. ;p

Wei.

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Re: [PATCH 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Andrew Cooper]

On 27/06/18 17:00, Wei Liu wrote:
> On Wed, Jun 27, 2018 at 04:58:08PM +0100, Andrew Cooper wrote:
>> On 27/06/18 15:58, Jan Beulich wrote:
>>>>>> On 27.06.18 at 15:55, <andrew.cooper3@citrix.com> wrote:
>>>> @@ -316,6 +319,33 @@ static void __init calculate_raw_policy(void)
>>>>              cpuid_count_leaf(7, i, &p->feat.raw[i]);
>>>>      }
>>>>  
>>>> +    if ( p->basic.max_leaf >= 0xb )
>>>> +    {
>>>> +        union {
>>>> +            struct cpuid_leaf l;
>>>> +            struct cpuid_topo_leaf t;
>>>> +        } u;
>>>> +
>>>> +        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
>>>> +        {
>>>> +            cpuid_count_leaf(0xb, i, &u.l);
>>>> +
>>>> +            if ( u.t.type == 0 )
>>>> +                break;
>>>> +
>>>> +            p->topo.subleaf[i] = u.t;
>>>> +        }
>>>> +
>>>> +        /*
>>>> +         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
>>>> +         * to grow for future harware.
>>> Missing d.
>> Where?  I'm afraid that after repeated re-reads, I can't spot any issue.
>>
> har d ware. ;p

Wow I'm blind.  Thanks.

~Andrew

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Re: [PATCH 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Jan Beulich]

>>> On 27.06.18 at 17:58, <andrew.cooper3@citrix.com> wrote:
> On 27/06/18 15:58, Jan Beulich wrote:
>>>>> On 27.06.18 at 15:55, <andrew.cooper3@citrix.com> wrote:
>>> @@ -316,6 +319,33 @@ static void __init calculate_raw_policy(void)
>>>              cpuid_count_leaf(7, i, &p->feat.raw[i]);
>>>      }
>>>  
>>> +    if ( p->basic.max_leaf >= 0xb )
>>> +    {
>>> +        union {
>>> +            struct cpuid_leaf l;
>>> +            struct cpuid_topo_leaf t;
>>> +        } u;
>>> +
>>> +        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
>>> +        {
>>> +            cpuid_count_leaf(0xb, i, &u.l);
>>> +
>>> +            if ( u.t.type == 0 )
>>> +                break;
>>> +
>>> +            p->topo.subleaf[i] = u.t;
>>> +        }
>>> +
>>> +        /*
>>> +         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
>>> +         * to grow for future harware.
>> Missing d.
> 
> Where?  I'm afraid that after repeated re-reads, I can't spot any issue.

hardware

>>> @@ -108,7 +109,11 @@ struct cpuid_policy
>>>              uint64_t :64, :64; /* Leaf 0x9 - DCA */
>>>  
>>>              /* Leaf 0xa - Intel PMU. */
>>> -            uint8_t pmu_version;
>>> +            uint8_t pmu_version, _pmu[15];
>>> +
>>> +            uint64_t :64, :64; /* Leaf 0xb - Topology. */
>>> +            uint64_t :64, :64; /* Leaf 0xc - rsvd */
>>> +            uint64_t :64, :64; /* Leaf 0xd - XSTATE. */
>> I don't understand why you add the latter two lines, neither in general
>> nor in the particular context of this patch.
> 
> This is part of reducing the effort for people extending the CPUID
> leaves, by keeping the .basic union in line with max_leaf.
> 
> There are further non-subleaf leaves beyond this point (0x15/0x16) and
> I've noticed several mistakes with newer submitted series.  I'd much
> rather do this myself once now, than attempt to explain it to others
> during code review.

Ah, I see. If you make the commit message say so,
Reviewed-by: Jan Beulich <jbeulich@suse.com>

Jan



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[PATCH v2 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Andrew Cooper]

The new data lives in the .topo union, rather than being treated as a single
leaf in the basic union.

While adjusting cpuid_policy, pad .basic to CPUID_GUEST_NR_BASIC for the
benefit of people extending the number of leaves in the future.

Host data is scanned when filling in the raw policy, but Xen still discards
any toolstack settings for now.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
CC: Ian Jackson <Ian.Jackson@eu.citrix.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: Roger Pau Monné <roger.pau@citrix.com>

v2:
 * s/harware/hardware/
 * Comment about padding .basic in the commit message
---
 tools/libxc/xc_cpuid_x86.c  | 11 ++++++++++-
 xen/arch/x86/cpuid.c        | 41 +++++++++++++++++++++++++++++++++++++++--
 xen/arch/x86/domctl.c       |  8 ++++++++
 xen/include/asm-x86/cpuid.h | 18 +++++++++++++++++-
 4 files changed, 74 insertions(+), 4 deletions(-)

diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 21537f0..96c6c95 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -764,13 +764,22 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid,
             if ( (regs[0] & 0x1f) != 0 )
                 continue;
         }
+        /* Extended Topology leaves. */
+        else if ( input[0] == 0xb )
+        {
+            uint8_t level_type = regs[2] >> 8;
+
+            input[1]++;
+            if ( level_type >= 1 && level_type <= 2 )
+                continue;
+        }
 
         input[0]++;
         if ( !(input[0] & 0x80000000u) && (input[0] > base_max ) )
             input[0] = 0x80000000u;
 
         input[1] = XEN_CPUID_INPUT_UNUSED;
-        if ( (input[0] == 4) || (input[0] == 7) )
+        if ( (input[0] == 4) || (input[0] == 7) || (input[0] == 0xb) )
             input[1] = 0;
         else if ( input[0] == 0xd )
             input[1] = 1; /* Xen automatically calculates almost everything. */
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index eca1a9a..c33c6d4 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -205,7 +205,10 @@ static void recalculate_misc(struct cpuid_policy *p)
     p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */
 
     p->basic.raw[0x8] = EMPTY_LEAF;
-    p->basic.raw[0xb] = EMPTY_LEAF; /* TODO: Rework topology logic. */
+
+    /* TODO: Rework topology logic. */
+    memset(p->topo.raw, 0, sizeof(p->topo.raw));
+
     p->basic.raw[0xc] = EMPTY_LEAF;
 
     p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES;
@@ -273,7 +276,7 @@ static void __init calculate_raw_policy(void)
     {
         switch ( i )
         {
-        case 0x4: case 0x7: case 0xd:
+        case 0x4: case 0x7: case 0xb: case 0xd:
             /* Multi-invocation leaves.  Deferred. */
             continue;
         }
@@ -316,6 +319,33 @@ static void __init calculate_raw_policy(void)
             cpuid_count_leaf(7, i, &p->feat.raw[i]);
     }
 
+    if ( p->basic.max_leaf >= 0xb )
+    {
+        union {
+            struct cpuid_leaf l;
+            struct cpuid_topo_leaf t;
+        } u;
+
+        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
+        {
+            cpuid_count_leaf(0xb, i, &u.l);
+
+            if ( u.t.type == 0 )
+                break;
+
+            p->topo.subleaf[i] = u.t;
+        }
+
+        /*
+         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
+         * to grow for future hardware.
+         */
+        if ( i == ARRAY_SIZE(p->topo.raw) &&
+             (cpuid_count_leaf(0xb, i, &u.l), u.t.type != 0) )
+            printk(XENLOG_WARNING
+                   "CPUID: Insufficient Leaf 0xb space for this hardware\n");
+    }
+
     if ( p->basic.max_leaf >= XSTATE_CPUID )
     {
         uint64_t xstates;
@@ -730,6 +760,13 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
             *res = p->feat.raw[subleaf];
             break;
 
+        case 0xb:
+            if ( subleaf >= ARRAY_SIZE(p->topo.raw) )
+                return;
+
+            *res = p->topo.raw[subleaf];
+            break;
+
         case XSTATE_CPUID:
             if ( !p->basic.xsave || subleaf >= ARRAY_SIZE(p->xstate.raw) )
                 return;
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 105a576..3e9580b 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -70,6 +70,10 @@ static int update_domain_cpuid_info(struct domain *d,
              ctl->input[1] >= ARRAY_SIZE(p->feat.raw) )
             return 0;
 
+        if ( ctl->input[0] == 0xb &&
+             ctl->input[1] >= ARRAY_SIZE(p->topo.raw) )
+            return 0;
+
         BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) < 2);
         if ( ctl->input[0] == XSTATE_CPUID &&
              ctl->input[1] != 1 ) /* Everything else automatically calculated. */
@@ -100,6 +104,10 @@ static int update_domain_cpuid_info(struct domain *d,
             p->feat.raw[ctl->input[1]] = leaf;
             break;
 
+        case 0xb:
+            p->topo.raw[ctl->input[1]] = leaf;
+            break;
+
         case XSTATE_CPUID:
             p->xstate.raw[ctl->input[1]] = leaf;
             break;
diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h
index 4cce268..4113a5e 100644
--- a/xen/include/asm-x86/cpuid.h
+++ b/xen/include/asm-x86/cpuid.h
@@ -61,6 +61,7 @@ extern struct cpuidmasks cpuidmask_defaults;
 #define CPUID_GUEST_NR_BASIC      (0xdu + 1)
 #define CPUID_GUEST_NR_FEAT       (0u + 1)
 #define CPUID_GUEST_NR_CACHE      (5u + 1)
+#define CPUID_GUEST_NR_TOPO       (1u + 1)
 #define CPUID_GUEST_NR_XSTATE     (62u + 1)
 #define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1)
 #define CPUID_GUEST_NR_EXTD_AMD   (0x1cu + 1)
@@ -108,7 +109,11 @@ struct cpuid_policy
             uint64_t :64, :64; /* Leaf 0x9 - DCA */
 
             /* Leaf 0xa - Intel PMU. */
-            uint8_t pmu_version;
+            uint8_t pmu_version, _pmu[15];
+
+            uint64_t :64, :64; /* Leaf 0xb - Topology. */
+            uint64_t :64, :64; /* Leaf 0xc - rsvd */
+            uint64_t :64, :64; /* Leaf 0xd - XSTATE. */
         };
     } basic;
 
@@ -142,6 +147,17 @@ struct cpuid_policy
         };
     } feat;
 
+    /* Extended topology enumeration: 0x0000000B[xx] */
+    union {
+        struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO];
+        struct cpuid_topo_leaf {
+            uint32_t id_shift:5, :27;
+            uint16_t nr_logical, :16;
+            uint8_t level, type, :8, :8;
+            uint32_t x2apic_id;
+        } subleaf[CPUID_GUEST_NR_TOPO];
+    } topo;
+
     /* Xstate feature leaf: 0x0000000D[xx] */
     union {
         struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE];
-- 
2.1.4


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Re: [PATCH 1/2] x86/cpuid: Fix up stale comments

[Roger Pau Monné]

On Wed, Jun 27, 2018 at 02:55:49PM +0100, Andrew Cooper wrote:
>  * There is no legacy path any more.  All static information is retrieved in
>    the first pass.
>  * d->arch.cpuids[] doesn't exist any more.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>

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Re: [PATCH v2 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Roger Pau Monné]

On Wed, Jun 27, 2018 at 06:11:49PM +0100, Andrew Cooper wrote:
> The new data lives in the .topo union, rather than being treated as a single
> leaf in the basic union.
> 
> While adjusting cpuid_policy, pad .basic to CPUID_GUEST_NR_BASIC for the
> benefit of people extending the number of leaves in the future.
> 
> Host data is scanned when filling in the raw policy, but Xen still discards
> any toolstack settings for now.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Reviewed-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>

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Re: [PATCH v2 2/2] x86/cpuid: Alter the policy logic for leaf 0xb to be multi-invocation

[Wei Liu]

On Wed, Jun 27, 2018 at 06:11:49PM +0100, Andrew Cooper wrote:
> The new data lives in the .topo union, rather than being treated as a single
> leaf in the basic union.
> 
> While adjusting cpuid_policy, pad .basic to CPUID_GUEST_NR_BASIC for the
> benefit of people extending the number of leaves in the future.
> 
> Host data is scanned when filling in the raw policy, but Xen still discards
> any toolstack settings for now.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Reviewed-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Wei Liu <wei.liu2@citrix.com>

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