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From: Stu Hsieh <stu.hsieh@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Philipp Zabel <p.zabel@pengutronix.de>
Cc: David Airlie <airlied@linux.ie>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <srv_heupstream@mediatek.com>,
	Stu Hsieh <stu.hsieh@mediatek.com>
Subject: [PATCH v1 04/15] drm/mediatek: add connection from RDMA2 to DSI0
Date: Tue, 24 Jul 2018 16:17:04 +0800	[thread overview]
Message-ID: <1532420235-22268-5-git-send-email-stu.hsieh@mediatek.com> (raw)
In-Reply-To: <1532420235-22268-1-git-send-email-stu.hsieh@mediatek.com>

This patch add connection from RDMA2 to DSI0

Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 31189fad8d4e..3239f22785fd 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -125,6 +125,7 @@
 #define DPI1_SEL_IN_RDMA1		(0x1 << 8)
 #define DPI1_SEL_IN_RDMA2		(0x3 << 8)
 #define DSI0_SEL_IN_RDMA1		0x1
+#define DSI0_SEL_IN_RDMA2		0x4
 #define DSI1_SEL_IN_RDMA1		0x1
 #define DSI1_SEL_IN_RDMA2		0x4
 #define DSI2_SEL_IN_RDMA1		(0x1 << 16)
@@ -309,6 +310,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
 	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI1) {
 		*addr = DISP_REG_CONFIG_DPI_SEL_IN;
 		value = DPI1_SEL_IN_RDMA2;
+	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI0) {
+		*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
+		value = DSI0_SEL_IN_RDMA2;
 	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI1) {
 		*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
 		value = DSI1_SEL_IN_RDMA2;
-- 
2.12.5


WARNING: multiple messages have this Message-ID (diff)
From: Stu Hsieh <stu.hsieh@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Philipp Zabel <p.zabel@pengutronix.de>
Cc: srv_heupstream@mediatek.com, David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org,
	Stu Hsieh <stu.hsieh@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 04/15] drm/mediatek: add connection from RDMA2 to DSI0
Date: Tue, 24 Jul 2018 16:17:04 +0800	[thread overview]
Message-ID: <1532420235-22268-5-git-send-email-stu.hsieh@mediatek.com> (raw)
In-Reply-To: <1532420235-22268-1-git-send-email-stu.hsieh@mediatek.com>

This patch add connection from RDMA2 to DSI0

Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 31189fad8d4e..3239f22785fd 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -125,6 +125,7 @@
 #define DPI1_SEL_IN_RDMA1		(0x1 << 8)
 #define DPI1_SEL_IN_RDMA2		(0x3 << 8)
 #define DSI0_SEL_IN_RDMA1		0x1
+#define DSI0_SEL_IN_RDMA2		0x4
 #define DSI1_SEL_IN_RDMA1		0x1
 #define DSI1_SEL_IN_RDMA2		0x4
 #define DSI2_SEL_IN_RDMA1		(0x1 << 16)
@@ -309,6 +310,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
 	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI1) {
 		*addr = DISP_REG_CONFIG_DPI_SEL_IN;
 		value = DPI1_SEL_IN_RDMA2;
+	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI0) {
+		*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
+		value = DSI0_SEL_IN_RDMA2;
 	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI1) {
 		*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
 		value = DSI1_SEL_IN_RDMA2;
-- 
2.12.5

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: stu.hsieh@mediatek.com (Stu Hsieh)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 04/15] drm/mediatek: add connection from RDMA2 to DSI0
Date: Tue, 24 Jul 2018 16:17:04 +0800	[thread overview]
Message-ID: <1532420235-22268-5-git-send-email-stu.hsieh@mediatek.com> (raw)
In-Reply-To: <1532420235-22268-1-git-send-email-stu.hsieh@mediatek.com>

This patch add connection from RDMA2 to DSI0

Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 31189fad8d4e..3239f22785fd 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -125,6 +125,7 @@
 #define DPI1_SEL_IN_RDMA1		(0x1 << 8)
 #define DPI1_SEL_IN_RDMA2		(0x3 << 8)
 #define DSI0_SEL_IN_RDMA1		0x1
+#define DSI0_SEL_IN_RDMA2		0x4
 #define DSI1_SEL_IN_RDMA1		0x1
 #define DSI1_SEL_IN_RDMA2		0x4
 #define DSI2_SEL_IN_RDMA1		(0x1 << 16)
@@ -309,6 +310,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
 	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI1) {
 		*addr = DISP_REG_CONFIG_DPI_SEL_IN;
 		value = DPI1_SEL_IN_RDMA2;
+	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI0) {
+		*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
+		value = DSI0_SEL_IN_RDMA2;
 	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI1) {
 		*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
 		value = DSI1_SEL_IN_RDMA2;
-- 
2.12.5

  parent reply	other threads:[~2018-07-24  8:17 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-24  8:17 [PATCH v1 00/15] Add RDMA memory mode support for mediatek SOC MT2712 Stu Hsieh
2018-07-24  8:17 ` Stu Hsieh
2018-07-24  8:17 ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 01/15] drm/mediatek: add connection from RDMA0 to DPI1 Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 02/15] drm/mediatek: add connection from RDMA0 to DSI1 Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 03/15] drm/mediatek: add connection from RDMA1 to DSI0 Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` Stu Hsieh [this message]
2018-07-24  8:17   ` [PATCH v1 04/15] drm/mediatek: add connection from RDMA2 " Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 05/15] drm/mediatek: add RDMA memory mode for crtc created Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 06/15] drm/mediatek: add memory mode for RDMA Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-25  2:40   ` CK Hu
2018-07-25  2:40     ` CK Hu
2018-07-25  2:40     ` CK Hu
2018-08-02 11:36     ` Stu Hsieh
2018-08-02 11:36       ` Stu Hsieh
2018-08-02 11:36       ` Stu Hsieh
2018-08-03  7:30       ` CK Hu
2018-08-03  7:30         ` CK Hu
2018-08-03  7:30         ` CK Hu
2018-07-24  8:17 ` [PATCH v1 07/15] drm/mediatek: add layer config to set RDMA for plane setting Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 08/15] drm/mediatek: add RGB color format support for RDMA Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 09/15] drm/mediatek: add YUYV/UYVY " Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 10/15] drm/mediatek: add drm_device in RDMA for mamory mode to reaquest buffer Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 11/15] drm/mediatek: add dummy buffer for RDMA memory mode Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-25  5:42   ` CK Hu
2018-07-25  5:42     ` CK Hu
2018-07-25  5:42     ` CK Hu
2018-08-02 11:45     ` Stu Hsieh
2018-08-02 11:45       ` Stu Hsieh
2018-08-02 11:45       ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 12/15] drm/mediatek: add layer number condition for RDMA to control plane Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-25  3:02   ` CK Hu
2018-07-25  3:02     ` CK Hu
2018-07-25  3:02     ` CK Hu
2018-08-02 11:38     ` Stu Hsieh
2018-08-02 11:38       ` Stu Hsieh
2018-08-02 11:38       ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 13/15] drm/mediatek: Update some variable name from ovl to comp Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 14/15] drm/mediatek: fixed the error value for add DSI1 in mutex Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-25  5:10   ` CK Hu
2018-07-25  5:10     ` CK Hu
2018-07-25  5:10     ` CK Hu
2018-08-02 11:39     ` Stu Hsieh
2018-08-02 11:39       ` Stu Hsieh
2018-08-02 11:39       ` Stu Hsieh
2018-07-24  8:17 ` [PATCH v1 15/15] drm/mediatek: fixed connection from RDMA2 to DSI1 Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-24  8:17   ` Stu Hsieh
2018-07-25  1:39 ` [PATCH v1 00/15] Add RDMA memory mode support for mediatek SOC MT2712 CK Hu
2018-07-25  1:39   ` CK Hu
2018-07-25  1:39   ` CK Hu
2018-08-02 11:29   ` Stu Hsieh
2018-08-02 11:29     ` Stu Hsieh
2018-08-02 11:29     ` Stu Hsieh

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