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From: CK Hu <ck.hu@mediatek.com>
To: Bibby Hsieh <bibby.hsieh@mediatek.com>
Cc: David Airlie <airlied@linux.ie>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	Yingjoe Chen <yingjoe.chen@mediatek.com>,
	Cawa Cheng <cawa.cheng@mediatek.com>,
	Daniel Kurtz <djkurtz@chromium.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	YT Shen <yt.shen@mediatek.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	Mao Huang <littlecvr@chromium.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	"Sascha Hauer" <kernel@pengutronix.de>
Subject: Re: [PATCH v2 11/13] drm/mediatek: implement connection from BLS to DPI0
Date: Thu, 6 Sep 2018 13:42:54 +0800	[thread overview]
Message-ID: <1536212574.4618.37.camel@mtksdaap41> (raw)
In-Reply-To: <20180905083146.14727-12-bibby.hsieh@mediatek.com>

Hi, Bibby:

On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote:
> Modify display driver to support connection from BLS to DPI.
> 
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 87e4191c250e..cc8d49e60c7e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -39,6 +39,7 @@
>  #define DISP_REG_CONFIG_DISP_OVL_MOUT_EN	0x030
>  #define DISP_REG_CONFIG_OUT_SEL			0x04c
>  #define DISP_REG_CONFIG_DSI_SEL			0x050
> +#define DISP_REG_CONFIG_DPI_SEL			0x064
>  
>  #define DISP_REG_MUTEX_EN(n)	(0x20 + 0x20 * (n))
>  #define DISP_REG_MUTEX(n)	(0x24 + 0x20 * (n))
> @@ -132,7 +133,11 @@
>  
>  #define OVL_MOUT_EN_RDMA		0x1
>  #define BLS_TO_DSI_RDMA1_TO_DPI1	0x8
> +#define BLS_TO_DPI_RDMA1_TO_DSI		0x2
>  #define DSI_SEL_IN_BLS			0x0
> +#define DPI_SEL_IN_BLS			0x0
> +#define DSI_SEL_IN_RDMA			0x1
> +#define DPI_SEL_IN_RDMA			0x1
>  
>  struct mtk_disp_mutex {
>  	int id;
> @@ -323,9 +328,21 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
>  			     enum mtk_ddp_comp_id cur,
>  			     enum mtk_ddp_comp_id next)
>  {
> -	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
> +	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
>  		writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
>  			       config_regs + DISP_REG_CONFIG_OUT_SEL);
> +		writel_relaxed(DSI_SEL_IN_BLS,
> +			       config_regs + DISP_REG_CONFIG_DSI_SEL);
> +		writel_relaxed(DPI_SEL_IN_RDMA,
> +			       config_regs + DISP_REG_CONFIG_DPI_SEL);
> +	} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
> +		writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
> +			       config_regs + DISP_REG_CONFIG_OUT_SEL);
> +		writel_relaxed(DSI_SEL_IN_RDMA,
> +			       config_regs + DISP_REG_CONFIG_DSI_SEL);
> +		writel_relaxed(DPI_SEL_IN_BLS,
> +			       config_regs + DISP_REG_CONFIG_DPI_SEL);
> +	}
>  }
>  
>  void mtk_ddp_add_comp_to_path(void __iomem *config_regs,



WARNING: multiple messages have this Message-ID (diff)
From: CK Hu <ck.hu@mediatek.com>
To: Bibby Hsieh <bibby.hsieh@mediatek.com>
Cc: linux-kernel@vger.kernel.org,
	Sascha Hauer <kernel@pengutronix.de>,
	David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	Cawa Cheng <cawa.cheng@mediatek.com>,
	dri-devel@lists.freedesktop.org,
	Mao Huang <littlecvr@chromium.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Yingjoe Chen <yingjoe.chen@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 11/13] drm/mediatek: implement connection from BLS to DPI0
Date: Thu, 6 Sep 2018 13:42:54 +0800	[thread overview]
Message-ID: <1536212574.4618.37.camel@mtksdaap41> (raw)
In-Reply-To: <20180905083146.14727-12-bibby.hsieh@mediatek.com>

Hi, Bibby:

On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote:
> Modify display driver to support connection from BLS to DPI.
> 
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 87e4191c250e..cc8d49e60c7e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -39,6 +39,7 @@
>  #define DISP_REG_CONFIG_DISP_OVL_MOUT_EN	0x030
>  #define DISP_REG_CONFIG_OUT_SEL			0x04c
>  #define DISP_REG_CONFIG_DSI_SEL			0x050
> +#define DISP_REG_CONFIG_DPI_SEL			0x064
>  
>  #define DISP_REG_MUTEX_EN(n)	(0x20 + 0x20 * (n))
>  #define DISP_REG_MUTEX(n)	(0x24 + 0x20 * (n))
> @@ -132,7 +133,11 @@
>  
>  #define OVL_MOUT_EN_RDMA		0x1
>  #define BLS_TO_DSI_RDMA1_TO_DPI1	0x8
> +#define BLS_TO_DPI_RDMA1_TO_DSI		0x2
>  #define DSI_SEL_IN_BLS			0x0
> +#define DPI_SEL_IN_BLS			0x0
> +#define DSI_SEL_IN_RDMA			0x1
> +#define DPI_SEL_IN_RDMA			0x1
>  
>  struct mtk_disp_mutex {
>  	int id;
> @@ -323,9 +328,21 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
>  			     enum mtk_ddp_comp_id cur,
>  			     enum mtk_ddp_comp_id next)
>  {
> -	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
> +	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
>  		writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
>  			       config_regs + DISP_REG_CONFIG_OUT_SEL);
> +		writel_relaxed(DSI_SEL_IN_BLS,
> +			       config_regs + DISP_REG_CONFIG_DSI_SEL);
> +		writel_relaxed(DPI_SEL_IN_RDMA,
> +			       config_regs + DISP_REG_CONFIG_DPI_SEL);
> +	} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
> +		writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
> +			       config_regs + DISP_REG_CONFIG_OUT_SEL);
> +		writel_relaxed(DSI_SEL_IN_RDMA,
> +			       config_regs + DISP_REG_CONFIG_DSI_SEL);
> +		writel_relaxed(DPI_SEL_IN_BLS,
> +			       config_regs + DISP_REG_CONFIG_DPI_SEL);
> +	}
>  }
>  
>  void mtk_ddp_add_comp_to_path(void __iomem *config_regs,


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WARNING: multiple messages have this Message-ID (diff)
From: ck.hu@mediatek.com (CK Hu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 11/13] drm/mediatek: implement connection from BLS to DPI0
Date: Thu, 6 Sep 2018 13:42:54 +0800	[thread overview]
Message-ID: <1536212574.4618.37.camel@mtksdaap41> (raw)
In-Reply-To: <20180905083146.14727-12-bibby.hsieh@mediatek.com>

Hi, Bibby:

On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote:
> Modify display driver to support connection from BLS to DPI.
> 
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 87e4191c250e..cc8d49e60c7e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -39,6 +39,7 @@
>  #define DISP_REG_CONFIG_DISP_OVL_MOUT_EN	0x030
>  #define DISP_REG_CONFIG_OUT_SEL			0x04c
>  #define DISP_REG_CONFIG_DSI_SEL			0x050
> +#define DISP_REG_CONFIG_DPI_SEL			0x064
>  
>  #define DISP_REG_MUTEX_EN(n)	(0x20 + 0x20 * (n))
>  #define DISP_REG_MUTEX(n)	(0x24 + 0x20 * (n))
> @@ -132,7 +133,11 @@
>  
>  #define OVL_MOUT_EN_RDMA		0x1
>  #define BLS_TO_DSI_RDMA1_TO_DPI1	0x8
> +#define BLS_TO_DPI_RDMA1_TO_DSI		0x2
>  #define DSI_SEL_IN_BLS			0x0
> +#define DPI_SEL_IN_BLS			0x0
> +#define DSI_SEL_IN_RDMA			0x1
> +#define DPI_SEL_IN_RDMA			0x1
>  
>  struct mtk_disp_mutex {
>  	int id;
> @@ -323,9 +328,21 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
>  			     enum mtk_ddp_comp_id cur,
>  			     enum mtk_ddp_comp_id next)
>  {
> -	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
> +	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
>  		writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
>  			       config_regs + DISP_REG_CONFIG_OUT_SEL);
> +		writel_relaxed(DSI_SEL_IN_BLS,
> +			       config_regs + DISP_REG_CONFIG_DSI_SEL);
> +		writel_relaxed(DPI_SEL_IN_RDMA,
> +			       config_regs + DISP_REG_CONFIG_DPI_SEL);
> +	} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
> +		writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
> +			       config_regs + DISP_REG_CONFIG_OUT_SEL);
> +		writel_relaxed(DSI_SEL_IN_RDMA,
> +			       config_regs + DISP_REG_CONFIG_DSI_SEL);
> +		writel_relaxed(DPI_SEL_IN_BLS,
> +			       config_regs + DISP_REG_CONFIG_DPI_SEL);
> +	}
>  }
>  
>  void mtk_ddp_add_comp_to_path(void __iomem *config_regs,

  reply	other threads:[~2018-09-06  5:43 UTC|newest]

Thread overview: 87+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-05  8:31 [PATCH v2 00/13] drm/mediatek: support hdmi output for mt2701 and mt7623 Bibby Hsieh
2018-09-05  8:31 ` Bibby Hsieh
2018-09-05  8:31 ` Bibby Hsieh
2018-09-05  8:31 ` [PATCH v2 01/13] drm/mediatek: add refcount for DPI power on/off Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  9:30   ` CK Hu
2018-09-05  9:30     ` CK Hu
2018-09-05  9:30     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 02/13] drm/mediatek: move hardware register to node data Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  9:50   ` CK Hu
2018-09-05  9:50     ` CK Hu
2018-09-05  9:50     ` CK Hu
2018-09-05 10:32   ` CK Hu
2018-09-05 10:32     ` CK Hu
2018-09-05 10:32     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 03/13] drm/mediatek: adjust EDGE to match clock and data Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05 10:47   ` CK Hu
2018-09-05 10:47     ` CK Hu
2018-09-05 10:47     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 04/13] drm/mediatek: add clock factor for different IC Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-06  2:11   ` CK Hu
2018-09-06  2:11     ` CK Hu
2018-09-06  2:11     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 05/13] drm/mediatek: dpi use new API for finding bridge Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-06  1:49   ` CK Hu
2018-09-06  1:49     ` CK Hu
2018-09-06  1:49     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 06/13] drm/mediatek: add dpi driver for mt2701 and mt7623 Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-06  2:18   ` CK Hu
2018-09-06  2:18     ` CK Hu
2018-09-06  2:18     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 07/13] drm/mediatek: separae hdmi phy to different file Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-07  1:15   ` CK Hu
2018-09-07  1:15     ` CK Hu
2018-09-07  1:15     ` CK Hu
2018-09-10  1:44   ` CK Hu
2018-09-10  1:44     ` CK Hu
2018-09-10  1:44     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 08/13] drm/mediatek: register hdmi codec more earlier Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-06  5:36   ` CK Hu
2018-09-06  5:36     ` CK Hu
2018-09-06  5:36     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 09/13] drm/mediatek: add support for SPDIF audio in HDMI Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-06  3:37   ` CK Hu
2018-09-06  3:37     ` CK Hu
2018-09-06  3:37     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 10/13] drm/mediatek: add hdmi driver for MT2701 and MT7623 Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-07  2:28   ` CK Hu
2018-09-07  2:28     ` CK Hu
2018-09-07  2:28     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 11/13] drm/mediatek: implement connection from BLS to DPI0 Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-06  5:42   ` CK Hu [this message]
2018-09-06  5:42     ` CK Hu
2018-09-06  5:42     ` CK Hu
2018-09-05  8:31 ` [PATCH v2 12/13] drm/mediatek: add a error return value when clock driver has been prepared Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31 ` [PATCH v2 13/13] drm/mediatek: config component output by device node port Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-05  8:31   ` Bibby Hsieh
2018-09-06  6:03   ` CK Hu
2018-09-06  6:03     ` CK Hu
2018-09-06  6:03     ` CK Hu
2018-09-21  3:02     ` Bibby Hsieh
2018-09-21  3:02       ` Bibby Hsieh
2018-09-21  3:02       ` Bibby Hsieh

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