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From: Atish Patra <atish.patra@wdc.com>
To: palmer@sifive.com, linux-riscv@lists.infradead.org,
	hch@infradead.org, anup@brainfault.org
Cc: mark.rutland@arm.com, atish.patra@wdc.com, tglx@linutronix.de,
	linux-kernel@vger.kernel.org, Damien.LeMoal@wdc.com,
	marc.zyngier@arm.com, jeremy.linton@arm.com,
	gregkh@linuxfoundation.org, jason@lakedaemon.net,
	catalin.marinas@arm.com, dmitriy@oss-tech.org,
	ard.biesheuvel@linaro.org
Subject: [PATCH v3 01/12] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}
Date: Thu,  6 Sep 2018 01:05:24 -0700	[thread overview]
Message-ID: <1536221135-182613-2-git-send-email-atish.patra@wdc.com> (raw)
In-Reply-To: <1536221135-182613-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

These are just hard coded in the RISC-V port, which doesn't make any
sense.  We should probably be setting these from device tree entries
when they exist, but for now I think it's saner to just leave them all
as their default values.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
---
 arch/riscv/kernel/cacheinfo.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
index 0bc86e5f..cb35ffd8 100644
--- a/arch/riscv/kernel/cacheinfo.c
+++ b/arch/riscv/kernel/cacheinfo.c
@@ -22,13 +22,6 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
 {
 	this_leaf->level = level;
 	this_leaf->type = type;
-	/* not a sector cache */
-	this_leaf->physical_line_partition = 1;
-	/* TODO: Add to DTS */
-	this_leaf->attributes =
-		CACHE_WRITE_BACK
-		| CACHE_READ_ALLOCATE
-		| CACHE_WRITE_ALLOCATE;
 }
 
 static int __init_cache_level(unsigned int cpu)
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: atish.patra@wdc.com (Atish Patra)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v3 01/12] RISC-V: Don't set cacheinfo.{physical_line_partition, attributes}
Date: Thu,  6 Sep 2018 01:05:24 -0700	[thread overview]
Message-ID: <1536221135-182613-2-git-send-email-atish.patra@wdc.com> (raw)
In-Reply-To: <1536221135-182613-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

These are just hard coded in the RISC-V port, which doesn't make any
sense.  We should probably be setting these from device tree entries
when they exist, but for now I think it's saner to just leave them all
as their default values.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
---
 arch/riscv/kernel/cacheinfo.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
index 0bc86e5f..cb35ffd8 100644
--- a/arch/riscv/kernel/cacheinfo.c
+++ b/arch/riscv/kernel/cacheinfo.c
@@ -22,13 +22,6 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
 {
 	this_leaf->level = level;
 	this_leaf->type = type;
-	/* not a sector cache */
-	this_leaf->physical_line_partition = 1;
-	/* TODO: Add to DTS */
-	this_leaf->attributes =
-		CACHE_WRITE_BACK
-		| CACHE_READ_ALLOCATE
-		| CACHE_WRITE_ALLOCATE;
 }
 
 static int __init_cache_level(unsigned int cpu)
-- 
2.7.4

  reply	other threads:[~2018-09-06  8:06 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-06  8:05 [PATCH v3 00/12] SMP cleanup and new features Atish Patra
2018-09-06  8:05 ` Atish Patra
2018-09-06  8:05 ` Atish Patra [this message]
2018-09-06  8:05   ` [PATCH v3 01/12] RISC-V: Don't set cacheinfo.{physical_line_partition, attributes} Atish Patra
2018-09-06  8:05 ` [PATCH v3 02/12] RISC-V: Filter ISA and MMU values in cpuinfo Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:24   ` Christoph Hellwig
2018-09-10 11:24     ` Christoph Hellwig
2018-09-11  1:35     ` Atish Patra
2018-09-11  1:35       ` Atish Patra
2018-09-06  8:05 ` [PATCH v3 03/12] RISC-V: Comment on the TLB flush in smp_callin() Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:24   ` Christoph Hellwig
2018-09-10 11:24     ` Christoph Hellwig
2018-09-06  8:05 ` [PATCH v3 04/12] RISC-V: Disable preemption before enabling interrupts Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:24   ` Christoph Hellwig
2018-09-10 11:24     ` Christoph Hellwig
2018-09-06  8:05 ` [PATCH v3 05/12] RISC-V: Provide a cleaner raw_smp_processor_id() Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:25   ` Christoph Hellwig
2018-09-10 11:25     ` Christoph Hellwig
2018-09-06  8:05 ` [PATCH v3 06/12] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:25   ` Christoph Hellwig
2018-09-10 11:25     ` Christoph Hellwig
2018-09-11  1:36     ` Atish Patra
2018-09-11  1:36       ` Atish Patra
2018-09-11  6:17       ` Christoph Hellwig
2018-09-11  6:17         ` Christoph Hellwig
2018-09-06  8:05 ` [PATCH v3 07/12] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:26   ` Christoph Hellwig
2018-09-10 11:26     ` Christoph Hellwig
2018-09-06  8:05 ` [PATCH v3 08/12] RISC-V: Use mmgrab() Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-06  8:05 ` [PATCH v3 09/12] RISC-V: User WRITE_ONCE instead of direct access Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:27   ` Christoph Hellwig
2018-09-10 11:27     ` Christoph Hellwig
2018-09-06  8:05 ` [PATCH v3 10/12] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:27   ` Christoph Hellwig
2018-09-10 11:27     ` Christoph Hellwig
2018-09-06  8:05 ` [PATCH v3 11/12] RISC-V: Use Linux logical cpu number instead of hartid Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-10 11:29   ` Christoph Hellwig
2018-09-10 11:29     ` Christoph Hellwig
2018-09-11  1:35     ` Atish Patra
2018-09-11  1:35       ` Atish Patra
2018-09-06  8:05 ` [PATCH v3 12/12] RISC-V: Support cpu hotplug Atish Patra
2018-09-06  8:05   ` Atish Patra
2018-09-06 10:20   ` Mark Rutland
2018-09-06 10:20     ` Mark Rutland
2018-09-06 18:25     ` Atish Patra
2018-09-06 18:25       ` Atish Patra
2018-09-11 18:36       ` Atish Patra
2018-09-11 18:36         ` Atish Patra

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