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* [PATCH 1/3] config: use one single config option for C11 memory model
@ 2018-09-19 13:30 Phil, Yang <phil.yang
  2018-09-19 13:30 ` [PATCH 2/3] kni: fix kni fifo synchronization Phil, Yang <phil.yang
                   ` (2 more replies)
  0 siblings, 3 replies; 30+ messages in thread
From: Phil, Yang <phil.yang @ 2018-09-19 13:30 UTC (permalink / raw)
  To: dev
  Cc: nd, jerin.jacob, kkokkilagadda, Honnappa.Nagarahalli, Gavin.Hu,
	Phil Yang

From: Phil Yang <phil.yang@arm.com>

Keep only single config option RTE_USE_C11_MEM_MODEL for C11 memory
model, so all modules can leverage C11 atomic extension by enable this
option.

Fixes: 39368eb ("ring: introduce C11 memory model barrier option")
Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
Reviewed-by: Gavin Hu <Gavin.Hu@arm.com>
---
 config/arm/meson.build                       | 2 +-
 config/common_armv8a_linuxapp                | 2 +-
 config/common_base                           | 2 +-
 config/defconfig_arm64-thunderx-linuxapp-gcc | 2 +-
 lib/librte_ring/rte_ring.h                   | 4 ++--
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 94cca49..4b23b39 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -53,7 +53,7 @@ flags_cavium = [
 	['RTE_MAX_NUMA_NODES', 2],
 	['RTE_MAX_LCORE', 96],
 	['RTE_MAX_VFIO_GROUPS', 128],
-	['RTE_RING_USE_C11_MEM_MODEL', false]]
+	['RTE_USE_C11_MEM_MODEL', false]]
 flags_dpaa = [
 	['RTE_MACHINE', '"dpaa"'],
 	['RTE_CACHE_LINE_SIZE', 64],
diff --git a/config/common_armv8a_linuxapp b/config/common_armv8a_linuxapp
index 111c005..54e6987 100644
--- a/config/common_armv8a_linuxapp
+++ b/config/common_armv8a_linuxapp
@@ -29,7 +29,7 @@ CONFIG_RTE_ARCH_ARM64_MEMCPY=n
 #CONFIG_RTE_ARM64_MEMCPY_ALIGN_MASK=0xF
 #CONFIG_RTE_ARM64_MEMCPY_STRICT_ALIGN=n
 
-CONFIG_RTE_RING_USE_C11_MEM_MODEL=y
+CONFIG_RTE_USE_C11_MEM_MODEL=y
 
 CONFIG_RTE_LIBRTE_FM10K_PMD=n
 CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
diff --git a/config/common_base b/config/common_base
index 155c7d4..ccd2670 100644
--- a/config/common_base
+++ b/config/common_base
@@ -661,7 +661,7 @@ CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y
 # Compile librte_ring
 #
 CONFIG_RTE_LIBRTE_RING=y
-CONFIG_RTE_RING_USE_C11_MEM_MODEL=n
+CONFIG_RTE_USE_C11_MEM_MODEL=n
 
 #
 # Compile librte_mempool
diff --git a/config/defconfig_arm64-thunderx-linuxapp-gcc b/config/defconfig_arm64-thunderx-linuxapp-gcc
index 2bed66c..f11e758 100644
--- a/config/defconfig_arm64-thunderx-linuxapp-gcc
+++ b/config/defconfig_arm64-thunderx-linuxapp-gcc
@@ -10,7 +10,7 @@ CONFIG_RTE_CACHE_LINE_SIZE=128
 CONFIG_RTE_MAX_NUMA_NODES=2
 CONFIG_RTE_MAX_LCORE=96
 CONFIG_RTE_MAX_VFIO_GROUPS=128
-CONFIG_RTE_RING_USE_C11_MEM_MODEL=n
+CONFIG_RTE_USE_C11_MEM_MODEL=n
 
 #
 # Compile PMD for octeontx sso event device
diff --git a/lib/librte_ring/rte_ring.h b/lib/librte_ring/rte_ring.h
index 7a731d0..af5444a 100644
--- a/lib/librte_ring/rte_ring.h
+++ b/lib/librte_ring/rte_ring.h
@@ -303,11 +303,11 @@ void rte_ring_dump(FILE *f, const struct rte_ring *r);
  * There are 2 choices for the users
  * 1.use rmb() memory barrier
  * 2.use one-direcion load_acquire/store_release barrier,defined by
- * CONFIG_RTE_RING_USE_C11_MEM_MODEL=y
+ * CONFIG_RTE_USE_C11_MEM_MODEL=y
  * It depends on performance test results.
  * By default, move common functions to rte_ring_generic.h
  */
-#ifdef RTE_RING_USE_C11_MEM_MODEL
+#ifdef RTE_USE_C11_MEM_MODEL
 #include "rte_ring_c11_mem.h"
 #else
 #include "rte_ring_generic.h"
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 30+ messages in thread

end of thread, other threads:[~2018-10-26 15:56 UTC | newest]

Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-19 13:30 [PATCH 1/3] config: use one single config option for C11 memory model Phil, Yang <phil.yang
2018-09-19 13:30 ` [PATCH 2/3] kni: fix kni fifo synchronization Phil, Yang <phil.yang
2018-09-19 13:30 ` [PATCH 3/3] kni: fix kni kernel " Phil, Yang <phil.yang
2018-09-19 13:42 ` [PATCH v2 1/3] config: use one single config option for C11 memory model Phil Yang
2018-09-19 13:42   ` [PATCH v2 2/3] kni: fix kni fifo synchronization Phil Yang
2018-09-20  8:28     ` Jerin Jacob
2018-09-20 15:20       ` Honnappa Nagarahalli
2018-09-20 15:37         ` Jerin Jacob
2018-09-21  5:48           ` Honnappa Nagarahalli
2018-09-21  5:55             ` Jerin Jacob
2018-09-21  6:37               ` Honnappa Nagarahalli
2018-09-21  9:00                 ` Phil Yang (Arm Technology China)
2018-09-25  4:44                 ` Honnappa Nagarahalli
2018-09-26 11:42                 ` Ferruh Yigit
2018-09-27  9:06                   ` Phil Yang (Arm Technology China)
2018-09-26 11:45     ` Ferruh Yigit
2018-10-01  4:52       ` Honnappa Nagarahalli
2018-09-19 13:42   ` [PATCH v2 3/3] kni: fix kni kernel " Phil Yang
2018-09-20  8:21   ` [PATCH v2 1/3] config: use one single config option for C11 memory model Jerin Jacob
2018-10-08  9:11   ` [PATCH v3 1/4] " Phil Yang
2018-10-08  9:11     ` [PATCH v3 2/4] kni: fix kni fifo synchronization Phil Yang
2018-10-08 21:53       ` Stephen Hemminger
2018-10-10  9:58         ` Phil Yang (Arm Technology China)
2018-10-10 10:06           ` Gavin Hu (Arm Technology China)
2018-10-10 14:42             ` Ferruh Yigit
2018-10-08  9:11     ` [PATCH v3 3/4] kni: fix kni kernel " Phil Yang
2018-10-08  9:11     ` [PATCH v3 4/4] kni: introduce c11 atomic into kni " Phil Yang
2018-10-10 14:48     ` [PATCH v3 1/4] config: use one single config option for C11 memory model Ferruh Yigit
2018-10-12  9:17       ` Phil Yang (Arm Technology China)
2018-10-26 15:56       ` Thomas Monjalon

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