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From: Trent Piepho <tpiepho@impinj.com>
To: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"andrew.smirnov@gmail.com" <andrew.smirnov@gmail.com>
Cc: "linux-imx@nxp.com" <linux-imx@nxp.com>,
	"hongxing.zhu@nxp.com" <hongxing.zhu@nxp.com>,
	"cphealy@gmail.com" <cphealy@gmail.com>,
	"aisheng.dong@nxp.com" <aisheng.dong@nxp.com>,
	"fabio.estevam@nxp.com" <fabio.estevam@nxp.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"l.stach@pengutronix.de" <l.stach@pengutronix.de>,
	"leonard.crestez@nxp.com" <leonard.crestez@nxp.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Subject: Re: [PATCH 2/3] PCI: imx: No-op imx6_pcie_reset_phy() on i.MX7D
Date: Tue, 20 Nov 2018 01:22:19 +0000	[thread overview]
Message-ID: <1542676938.30311.581.camel@impinj.com> (raw)
In-Reply-To: <20181117181225.10737-3-andrew.smirnov@gmail.com>

On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote:
> PCIE PHY IP block on i.MX7D differs from the one used on i.MX6 family,
> so none of the code in current implementation of imx6_pcie_reset_phy()
> is applicable.

Tested on IMX7d, still appears to work.

Note that your patches will collide with Stefan Agner's patch, "PCI:
imx6: limit DBI register length", which was recently posted.

He changed the way the variants are handled.  That method would allow
some of the IMX7D || IMX8MQ checks to be re-written as

 imx6_pcie->drvdata->boolean_attribute

Where the attribute can be set in a table and be re-used in every place
it comes into play and updated for new devices in one spot, instead of
keeping piles of this version or that version or this other version
checks up to date.

WARNING: multiple messages have this Message-ID (diff)
From: tpiepho@impinj.com (Trent Piepho)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] PCI: imx: No-op imx6_pcie_reset_phy() on i.MX7D
Date: Tue, 20 Nov 2018 01:22:19 +0000	[thread overview]
Message-ID: <1542676938.30311.581.camel@impinj.com> (raw)
In-Reply-To: <20181117181225.10737-3-andrew.smirnov@gmail.com>

On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote:
> PCIE PHY IP block on i.MX7D differs from the one used on i.MX6 family,
> so none of the code in current implementation of imx6_pcie_reset_phy()
> is applicable.

Tested on IMX7d, still appears to work.

Note that your patches will collide with Stefan Agner's patch, "PCI:
imx6: limit DBI register length", which was recently posted.

He changed the way the variants are handled.  That method would allow
some of the IMX7D || IMX8MQ checks to be re-written as

 imx6_pcie->drvdata->boolean_attribute

Where the attribute can be set in a table and be re-used in every place
it comes into play and updated for new devices in one spot, instead of
keeping piles of this version or that version or this other version
checks up to date.

  reply	other threads:[~2018-11-20  1:22 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-17 18:12 [PATCH 0/3] PCIE support for i.MX8MQ Andrey Smirnov
2018-11-17 18:12 ` Andrey Smirnov
2018-11-17 18:12 ` [PATCH 1/3] PCI: imx: No-op imx6_setup_phy_mpll() on i.MX7D Andrey Smirnov
2018-11-17 18:12   ` Andrey Smirnov
2018-11-17 18:12 ` [PATCH 2/3] PCI: imx: No-op imx6_pcie_reset_phy() " Andrey Smirnov
2018-11-17 18:12   ` Andrey Smirnov
2018-11-20  1:22   ` Trent Piepho [this message]
2018-11-20  1:22     ` Trent Piepho
2018-11-26 18:32     ` Andrey Smirnov
2018-11-26 18:32       ` Andrey Smirnov
2018-11-17 18:12 ` [PATCH 3/3] PCI: imx: Add support for i.MX8MQ Andrey Smirnov
2018-11-17 18:12   ` Andrey Smirnov
2018-11-19  7:07   ` Richard Zhu
2018-11-19  7:07     ` Richard Zhu
2018-11-26 18:09     ` Andrey Smirnov
2018-11-26 18:09       ` Andrey Smirnov
2018-11-29 10:52       ` Richard Zhu
2018-11-29 10:52         ` Richard Zhu
2018-11-20 10:48   ` Leonard Crestez
2018-11-20 10:48     ` Leonard Crestez
2018-11-20 10:48     ` Leonard Crestez
2018-11-26 18:24     ` Andrey Smirnov
2018-11-26 18:24       ` Andrey Smirnov
2018-11-26 18:24       ` Andrey Smirnov
2018-11-27 10:06       ` Lucas Stach
2018-11-27 10:06         ` Lucas Stach
2018-11-27 10:06         ` Lucas Stach
2018-11-27 10:46         ` Leonard Crestez
2018-11-27 10:46           ` Leonard Crestez
2018-11-27 10:46           ` Leonard Crestez
2018-11-27 21:14           ` Andrey Smirnov
2018-11-27 21:14             ` Andrey Smirnov
2018-11-27 21:14             ` Andrey Smirnov
2018-11-28 10:55             ` Leonard Crestez
2018-11-28 10:55               ` Leonard Crestez
2018-11-28 10:55               ` Leonard Crestez
2018-11-29 11:15               ` Lucas Stach
2018-11-29 11:15                 ` Lucas Stach
2018-11-29 11:15                 ` Lucas Stach
2018-11-29 11:12             ` Lucas Stach
2018-11-29 11:12               ` Lucas Stach
2018-11-29 11:12               ` Lucas Stach
2018-11-27 10:16       ` Leonard Crestez
2018-11-27 10:16         ` Leonard Crestez
2018-11-27 10:16         ` Leonard Crestez
2018-11-27 21:03         ` Andrey Smirnov
2018-11-27 21:03           ` Andrey Smirnov
2018-11-27 21:03           ` Andrey Smirnov
2018-12-03 12:20 ` [PATCH 0/3] PCIE " Lorenzo Pieralisi
2018-12-03 12:20   ` Lorenzo Pieralisi
2018-12-07 11:37 ` Lorenzo Pieralisi
2018-12-07 11:37   ` Lorenzo Pieralisi

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