From: thor.thayer@linux.intel.com To: bp@alien8.de, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org, james.morse@arm.com Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-edac@vger.kernel.org, stable@vger.kernel.org Subject: [PATCHv2,1/4] EDAC, altera: Fix S10 persistent register offset Date: Tue, 22 Jan 2019 11:48:04 -0600 [thread overview] Message-ID: <1548179287-21760-2-git-send-email-thor.thayer@linux.intel.com> (raw) From: Thor Thayer <thor.thayer@linux.intel.com> Correct the persistent register offset where address and status are stored. Fixes: 08f08bfb7b4c ("EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine") Cc: stable@vger.kernel.org Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> --- v2 Fixes tag should be on one line instead of wrapped. --- drivers/edac/altera_edac.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 4213cb0bb2a7..f8664bac9fa8 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -295,8 +295,8 @@ struct altr_sdram_mc_data { #define S10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xA0 /* Sticky registers for Uncorrected Errors */ -#define S10_SYSMGR_UE_VAL_OFST 0x120 -#define S10_SYSMGR_UE_ADDR_OFST 0x124 +#define S10_SYSMGR_UE_VAL_OFST 0x220 +#define S10_SYSMGR_UE_ADDR_OFST 0x224 #define S10_DDR0_IRQ_MASK BIT(16)
WARNING: multiple messages have this Message-ID (diff)
From: thor.thayer@linux.intel.com To: bp@alien8.de, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org, james.morse@arm.com Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-edac@vger.kernel.org, stable@vger.kernel.org Subject: [PATCHv2 1/4] EDAC, altera: Fix S10 persistent register offset Date: Tue, 22 Jan 2019 11:48:04 -0600 [thread overview] Message-ID: <1548179287-21760-2-git-send-email-thor.thayer@linux.intel.com> (raw) In-Reply-To: <1548179287-21760-1-git-send-email-thor.thayer@linux.intel.com> From: Thor Thayer <thor.thayer@linux.intel.com> Correct the persistent register offset where address and status are stored. Fixes: 08f08bfb7b4c ("EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine") Cc: stable@vger.kernel.org Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> --- v2 Fixes tag should be on one line instead of wrapped. --- drivers/edac/altera_edac.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 4213cb0bb2a7..f8664bac9fa8 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -295,8 +295,8 @@ struct altr_sdram_mc_data { #define S10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xA0 /* Sticky registers for Uncorrected Errors */ -#define S10_SYSMGR_UE_VAL_OFST 0x120 -#define S10_SYSMGR_UE_ADDR_OFST 0x124 +#define S10_SYSMGR_UE_VAL_OFST 0x220 +#define S10_SYSMGR_UE_ADDR_OFST 0x224 #define S10_DDR0_IRQ_MASK BIT(16) -- 2.7.4
next reply other threads:[~2019-01-22 17:48 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-01-22 17:48 thor.thayer [this message] 2019-01-22 17:48 ` [PATCHv2 1/4] EDAC, altera: Fix S10 persistent register offset thor.thayer -- strict thread matches above, loose matches on Subject: below -- 2019-01-24 15:42 [PATCHv2,4/4] arm64: dts: stratix10: Add OCRAM EDAC node thor.thayer 2019-01-24 15:42 ` [PATCHv2 4/4] " Thor Thayer 2019-01-23 16:56 [PATCHv2,4/4] " Dinh Nguyen 2019-01-23 16:56 ` [PATCHv2 4/4] " Dinh Nguyen 2019-01-22 17:48 [PATCHv2,4/4] " thor.thayer 2019-01-22 17:48 ` [PATCHv2 4/4] " thor.thayer 2019-01-22 17:48 [PATCHv2,3/4] EDAC, altera: Add Stratix10 OCRAM ECC support thor.thayer 2019-01-22 17:48 ` [PATCHv2 3/4] " thor.thayer 2019-01-22 17:48 [PATCHv2,2/4] EDAC, altera: Less Intrusive Error Injection thor.thayer 2019-01-22 17:48 ` [PATCHv2 2/4] " thor.thayer 2019-01-22 17:48 [PATCHv2 0/4] Stratix10 EDAC Improvements thor.thayer 2019-01-23 12:22 ` Borislav Petkov
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