From: Gerald BAEZA <gerald.baeza@st.com>
To: "will.deacon@arm.com" <will.deacon@arm.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
Alexandre TORGUE <alexandre.torgue@st.com>,
"corbet@lwn.net" <corbet@lwn.net>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"olof@lixom.net" <olof@lixom.net>,
"horms+renesas@verge.net.au" <horms+renesas@verge.net.au>,
"arnd@arndb.de" <arnd@arndb.de>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
Gerald BAEZA <gerald.baeza@st.com>
Subject: [PATCH v2 0/5] stm32-ddr-pmu driver creation
Date: Mon, 20 May 2019 15:27:15 +0000 [thread overview]
Message-ID: <1558366019-24214-1-git-send-email-gerald.baeza@st.com> (raw)
The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC.
This series adds support for the DDRPERFM via a new stm32-ddr-pmu driver,
registered into the perf framework.
This driver is inspired from arch/arm/mm/cache-l2x0-pmu.c
---
Changes from v1:
- add 'resets' description (bindings) and using (driver). Thanks Rob.
- rebase on 5.2-rc1 (that includes the ddrperfm clock control patch).
Gerald Baeza (5):
Documentation: perf: stm32: ddrperfm support
dt-bindings: perf: stm32: ddrperfm support
perf: stm32: ddrperfm driver creation
ARM: configs: enable STM32_DDR_PMU
ARM: dts: stm32: add ddrperfm on stm32mp157c
.../devicetree/bindings/perf/stm32-ddr-pmu.txt | 20 +
Documentation/perf/stm32-ddr-pmu.txt | 41 ++
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
arch/arm/configs/multi_v7_defconfig | 1 +
drivers/perf/Kconfig | 6 +
drivers/perf/Makefile | 1 +
drivers/perf/stm32_ddr_pmu.c | 512 +++++++++++++++++++++
7 files changed, 590 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt
create mode 100644 Documentation/perf/stm32-ddr-pmu.txt
create mode 100644 drivers/perf/stm32_ddr_pmu.c
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Gerald BAEZA <gerald.baeza@st.com>
To: "will.deacon@arm.com" <will.deacon@arm.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
Alexandre TORGUE <alexandre.torgue@st.com>,
"corbet@lwn.net" <corbet@lwn.net>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"olof@lixom.net" <olof@lixom.net>,
"horms+renesas@verge.net.au" <horms+renesas@verge.net.au>,
"arnd@arndb.de" <arnd@arndb.de>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Gerald BAEZA <gerald.baeza@st.com>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v2 0/5] stm32-ddr-pmu driver creation
Date: Mon, 20 May 2019 15:27:15 +0000 [thread overview]
Message-ID: <1558366019-24214-1-git-send-email-gerald.baeza@st.com> (raw)
The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC.
This series adds support for the DDRPERFM via a new stm32-ddr-pmu driver,
registered into the perf framework.
This driver is inspired from arch/arm/mm/cache-l2x0-pmu.c
---
Changes from v1:
- add 'resets' description (bindings) and using (driver). Thanks Rob.
- rebase on 5.2-rc1 (that includes the ddrperfm clock control patch).
Gerald Baeza (5):
Documentation: perf: stm32: ddrperfm support
dt-bindings: perf: stm32: ddrperfm support
perf: stm32: ddrperfm driver creation
ARM: configs: enable STM32_DDR_PMU
ARM: dts: stm32: add ddrperfm on stm32mp157c
.../devicetree/bindings/perf/stm32-ddr-pmu.txt | 20 +
Documentation/perf/stm32-ddr-pmu.txt | 41 ++
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
arch/arm/configs/multi_v7_defconfig | 1 +
drivers/perf/Kconfig | 6 +
drivers/perf/Makefile | 1 +
drivers/perf/stm32_ddr_pmu.c | 512 +++++++++++++++++++++
7 files changed, 590 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt
create mode 100644 Documentation/perf/stm32-ddr-pmu.txt
create mode 100644 drivers/perf/stm32_ddr_pmu.c
--
2.7.4
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next reply other threads:[~2019-05-20 15:28 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-20 15:27 Gerald BAEZA [this message]
2019-05-20 15:27 ` [PATCH v2 0/5] stm32-ddr-pmu driver creation Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` [PATCH v2 1/5] Documentation: perf: stm32: ddrperfm support Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` [PATCH v2 2/5] dt-bindings: " Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-06-13 23:04 ` Rob Herring
2019-06-13 23:04 ` Rob Herring
2019-06-13 23:04 ` Rob Herring
2019-05-20 15:27 ` [PATCH v2 4/5] ARM: configs: enable STM32_DDR_PMU Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` [PATCH v2 3/5] perf: stm32: ddrperfm driver creation Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-06-26 12:22 ` Mark Rutland
2019-06-26 12:22 ` Mark Rutland
2019-06-26 12:22 ` Mark Rutland
2019-06-26 12:25 ` Mark Rutland
2019-06-26 12:25 ` Mark Rutland
2019-06-26 12:25 ` Mark Rutland
2019-07-12 10:00 ` Gerald BAEZA
2019-07-12 10:00 ` Gerald BAEZA
2019-07-12 10:00 ` Gerald BAEZA
2019-05-20 15:27 ` [PATCH v2 5/5] ARM: dts: stm32: add ddrperfm on stm32mp157c Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-05-20 15:27 ` Gerald BAEZA
2019-06-06 12:14 ` [PATCH v2 0/5] stm32-ddr-pmu driver creation Gerald BAEZA
2019-06-06 12:14 ` Gerald BAEZA
2019-06-06 12:14 ` Gerald BAEZA
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