From: <tony.nguyen@bt.com> To: <qemu-devel@nongnu.org> Cc: peter.maydell@linaro.org, walling@linux.ibm.com, sagark@eecs.berkeley.edu, mst@redhat.com, palmer@sifive.com, mark.cave-ayland@ilande.co.uk, laurent@vivier.eu, Alistair.Francis@wdc.com, edgar.iglesias@gmail.com, arikalo@wavecomp.com, david@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com, ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, stefanha@redhat.com, shorne@gmail.com, david@gibson.dropbear.id.au, qemu-riscv@nongnu.org, kbastian@mail.uni-paderborn.de, cohuck@redhat.com, alex.williamson@redhat.com, qemu-ppc@nongnu.org, amarkovic@wavecomp.com, pbonzini@redhat.com, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH v5 02/15] memory: Access MemoryRegion with MemOp Date: Fri, 26 Jul 2019 06:43:55 +0000 [thread overview] Message-ID: <1564123434793.89101@bt.com> (raw) In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> Change memory_region_dispatch_{read|write} parameter "unsigned size" to "MemOp op". The endianness encoded in MemOp will enable the collapse of two byte swaps, adjust_endianness and handle_bswap, along the I/O path. Interfaces will be converted in two steps: first syntactically then semantically. The syntax change is usage of no-op MEMOP_SIZE and SIZE_MEMOP macros. Being no-op there are no logical change, and we rely on coercion between unsigned and MemOp. The semantic change is implementing MEMOP_SIZE and SIZE_MEMOP to logically convert an unsigned size to and from a size+sign+endianness encoded MemOp. Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> --- include/exec/memop.h | 4 ++++ include/exec/memory.h | 9 +++++---- memory.c | 7 +++++-- 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/include/exec/memop.h b/include/exec/memop.h index ac58066..09c8d20 100644 --- a/include/exec/memop.h +++ b/include/exec/memop.h @@ -106,4 +106,8 @@ typedef enum MemOp { MO_SSIZE = MO_SIZE | MO_SIGN, } MemOp; +/* No-op while memory_region_dispatch_[read|write] is converted to MemOp */ +#define MEMOP_SIZE(op) (op) /* MemOp to size. */ +#define SIZE_MEMOP(ul) (ul) /* Size to MemOp. */ + #endif diff --git a/include/exec/memory.h b/include/exec/memory.h index bb0961d..0ea4843 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -19,6 +19,7 @@ #include "exec/cpu-common.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" +#include "exec/memop.h" #include "exec/ramlist.h" #include "qemu/queue.h" #include "qemu/int128.h" @@ -1731,13 +1732,13 @@ void mtree_info(bool flatview, bool dispatch_tree, bool owner); * @mr: #MemoryRegion to access * @addr: address within that region * @pval: pointer to uint64_t which the data is written to - * @size: size of the access in bytes + * @op: size of the access in bytes * @attrs: memory transaction attributes to use for the access */ MemTxResult memory_region_dispatch_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, - unsigned size, + MemOp op, MemTxAttrs attrs); /** * memory_region_dispatch_write: perform a write directly to the specified @@ -1746,13 +1747,13 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr, * @mr: #MemoryRegion to access * @addr: address within that region * @data: data to write - * @size: size of the access in bytes + * @op: size of the access in bytes * @attrs: memory transaction attributes to use for the access */ MemTxResult memory_region_dispatch_write(MemoryRegion *mr, hwaddr addr, uint64_t data, - unsigned size, + MemOp op, MemTxAttrs attrs); /** diff --git a/memory.c b/memory.c index 5d8c9a9..6982e19 100644 --- a/memory.c +++ b/memory.c @@ -1439,10 +1439,11 @@ static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, MemTxResult memory_region_dispatch_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, - unsigned size, + MemOp op, MemTxAttrs attrs) { MemTxResult r; + unsigned size = MEMOP_SIZE(op); if (!memory_region_access_valid(mr, addr, size, false, attrs)) { *pval = unassigned_mem_read(mr, addr, size); @@ -1483,9 +1484,11 @@ static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, MemTxResult memory_region_dispatch_write(MemoryRegion *mr, hwaddr addr, uint64_t data, - unsigned size, + MemOp op, MemTxAttrs attrs) { + unsigned size = MEMOP_SIZE(op); + if (!memory_region_access_valid(mr, addr, size, true, attrs)) { unassigned_mem_write(mr, addr, data, size); return MEMTX_DECODE_ERROR; -- 1.8.3.1
WARNING: multiple messages have this Message-ID (diff)
From: <tony.nguyen@bt.com> To: <qemu-devel@nongnu.org> Cc: <peter.maydell@linaro.org>, <walling@linux.ibm.com>, <sagark@eecs.berkeley.edu>, <david@redhat.com>, <palmer@sifive.com>, <mark.cave-ayland@ilande.co.uk>, <Alistair.Francis@wdc.com>, <edgar.iglesias@gmail.com>, <arikalo@wavecomp.com>, <mst@redhat.com>, <pasic@linux.ibm.com>, <borntraeger@de.ibm.com>, <rth@twiddle.net>, <atar4qemu@gmail.com>, <ehabkost@redhat.com>, <alex.williamson@redhat.com>, <qemu-arm@nongnu.org>, <stefanha@redhat.com>, <shorne@gmail.com>, <david@gibson.dropbear.id.au>, <qemu-riscv@nongnu.org>, <qemu-s390x@nongnu.org>, <kbastian@mail.uni-paderborn.de>, <cohuck@redhat.com>, <laurent@vivier.eu>, <qemu-ppc@nongnu.org>, <amarkovic@wavecomp.com>, <pbonzini@redhat.com>, <aurelien@aurel32.net> Subject: [Qemu-riscv] [Qemu-devel] [PATCH v5 02/15] memory: Access MemoryRegion with MemOp Date: Fri, 26 Jul 2019 06:43:55 +0000 [thread overview] Message-ID: <1564123434793.89101@bt.com> (raw) In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> [-- Attachment #1: Type: text/plain, Size: 4518 bytes --] Change memory_region_dispatch_{read|write} parameter "unsigned size" to "MemOp op". The endianness encoded in MemOp will enable the collapse of two byte swaps, adjust_endianness and handle_bswap, along the I/O path. Interfaces will be converted in two steps: first syntactically then semantically. The syntax change is usage of no-op MEMOP_SIZE and SIZE_MEMOP macros. Being no-op there are no logical change, and we rely on coercion between unsigned and MemOp. The semantic change is implementing MEMOP_SIZE and SIZE_MEMOP to logically convert an unsigned size to and from a size+sign+endianness encoded MemOp. Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> --- include/exec/memop.h | 4 ++++ include/exec/memory.h | 9 +++++---- memory.c | 7 +++++-- 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/include/exec/memop.h b/include/exec/memop.h index ac58066..09c8d20 100644 --- a/include/exec/memop.h +++ b/include/exec/memop.h @@ -106,4 +106,8 @@ typedef enum MemOp { MO_SSIZE = MO_SIZE | MO_SIGN, } MemOp; +/* No-op while memory_region_dispatch_[read|write] is converted to MemOp */ +#define MEMOP_SIZE(op) (op) /* MemOp to size. */ +#define SIZE_MEMOP(ul) (ul) /* Size to MemOp. */ + #endif diff --git a/include/exec/memory.h b/include/exec/memory.h index bb0961d..0ea4843 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -19,6 +19,7 @@ #include "exec/cpu-common.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" +#include "exec/memop.h" #include "exec/ramlist.h" #include "qemu/queue.h" #include "qemu/int128.h" @@ -1731,13 +1732,13 @@ void mtree_info(bool flatview, bool dispatch_tree, bool owner); * @mr: #MemoryRegion to access * @addr: address within that region * @pval: pointer to uint64_t which the data is written to - * @size: size of the access in bytes + * @op: size of the access in bytes * @attrs: memory transaction attributes to use for the access */ MemTxResult memory_region_dispatch_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, - unsigned size, + MemOp op, MemTxAttrs attrs); /** * memory_region_dispatch_write: perform a write directly to the specified @@ -1746,13 +1747,13 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr, * @mr: #MemoryRegion to access * @addr: address within that region * @data: data to write - * @size: size of the access in bytes + * @op: size of the access in bytes * @attrs: memory transaction attributes to use for the access */ MemTxResult memory_region_dispatch_write(MemoryRegion *mr, hwaddr addr, uint64_t data, - unsigned size, + MemOp op, MemTxAttrs attrs); /** diff --git a/memory.c b/memory.c index 5d8c9a9..6982e19 100644 --- a/memory.c +++ b/memory.c @@ -1439,10 +1439,11 @@ static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, MemTxResult memory_region_dispatch_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, - unsigned size, + MemOp op, MemTxAttrs attrs) { MemTxResult r; + unsigned size = MEMOP_SIZE(op); if (!memory_region_access_valid(mr, addr, size, false, attrs)) { *pval = unassigned_mem_read(mr, addr, size); @@ -1483,9 +1484,11 @@ static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, MemTxResult memory_region_dispatch_write(MemoryRegion *mr, hwaddr addr, uint64_t data, - unsigned size, + MemOp op, MemTxAttrs attrs) { + unsigned size = MEMOP_SIZE(op); + if (!memory_region_access_valid(mr, addr, size, true, attrs)) { unassigned_mem_write(mr, addr, data, size); return MEMTX_DECODE_ERROR; -- 1.8.3.1 [-- Attachment #2: Type: text/html, Size: 9125 bytes --]
next prev parent reply other threads:[~2019-07-26 6:44 UTC|newest] Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-07-26 6:42 [Qemu-devel] [PATCH v5 00/15] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen 2019-07-26 6:42 ` [Qemu-riscv] " tony.nguyen 2019-07-26 6:43 ` [Qemu-devel] [PATCH v5 01/15] tcg: TCGMemOp is now accelerator independent MemOp tony.nguyen 2019-07-26 6:43 ` [Qemu-riscv] " tony.nguyen 2019-07-26 7:43 ` David Gibson 2019-07-26 7:43 ` [Qemu-riscv] " David Gibson 2019-07-26 13:27 ` Richard Henderson 2019-07-26 13:27 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:43 ` tony.nguyen [this message] 2019-07-26 6:43 ` [Qemu-riscv] [Qemu-devel] [PATCH v5 02/15] memory: Access MemoryRegion with MemOp tony.nguyen 2019-07-26 13:36 ` Richard Henderson 2019-07-26 13:36 ` [Qemu-riscv] " Richard Henderson 2019-07-26 14:04 ` Richard Henderson 2019-07-26 14:04 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:44 ` [Qemu-devel] [PATCH v5 03/15] target/mips: " tony.nguyen 2019-07-26 6:44 ` [Qemu-riscv] " tony.nguyen 2019-07-26 13:40 ` Richard Henderson 2019-07-26 13:40 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:44 ` [Qemu-devel] [PATCH v5 04/15] hw/s390x: " tony.nguyen 2019-07-26 6:44 ` [Qemu-riscv] " tony.nguyen 2019-07-26 13:42 ` Richard Henderson 2019-07-26 13:42 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:45 ` [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: " tony.nguyen 2019-07-26 6:45 ` [Qemu-riscv] " tony.nguyen 2019-07-26 13:43 ` Richard Henderson 2019-07-26 13:43 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:45 ` [Qemu-devel] [PATCH v5 06/15] hw/virtio: " tony.nguyen 2019-07-26 6:45 ` [Qemu-riscv] " tony.nguyen 2019-07-26 13:43 ` Richard Henderson 2019-07-26 13:43 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:46 ` [Qemu-devel] [PATCH v5 07/15] hw/vfio: " tony.nguyen 2019-07-26 6:46 ` [Qemu-riscv] " tony.nguyen 2019-07-26 13:43 ` Richard Henderson 2019-07-26 13:43 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:46 ` [Qemu-devel] [PATCH v5 08/15] exec: " tony.nguyen 2019-07-26 6:46 ` [Qemu-riscv] " tony.nguyen 2019-07-26 13:46 ` Richard Henderson 2019-07-26 13:46 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:46 ` [Qemu-devel] [PATCH v5 09/15] cputlb: " tony.nguyen 2019-07-26 6:46 ` [Qemu-riscv] " tony.nguyen 2019-07-26 11:03 ` Philippe Mathieu-Daudé 2019-07-26 11:03 ` [Qemu-riscv] " Philippe Mathieu-Daudé 2019-07-26 11:16 ` [Qemu-devel] [EXTERNAL]Re: " Aleksandar Markovic 2019-07-26 11:16 ` [Qemu-riscv] [EXTERNAL]Re: [Qemu-devel] " Aleksandar Markovic 2019-07-26 11:23 ` [Qemu-devel] [EXTERNAL]Re: " Aleksandar Markovic 2019-07-26 11:23 ` [Qemu-riscv] [EXTERNAL]Re: [Qemu-devel] " Aleksandar Markovic 2019-07-26 14:14 ` Richard Henderson 2019-07-26 14:14 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:47 ` [Qemu-devel] [PATCH v5 10/15] memory: Access MemoryRegion with MemOp semantics tony.nguyen 2019-07-26 6:47 ` [Qemu-riscv] " tony.nguyen 2019-07-26 14:24 ` Richard Henderson 2019-07-26 14:24 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:47 ` [Qemu-devel] [PATCH v5 11/15] memory: Single byte swap along the I/O path tony.nguyen 2019-07-26 6:47 ` [Qemu-riscv] " tony.nguyen 2019-07-26 9:26 ` Paolo Bonzini 2019-07-26 9:26 ` [Qemu-riscv] " Paolo Bonzini 2019-07-26 14:29 ` Richard Henderson 2019-07-26 14:29 ` [Qemu-riscv] " Richard Henderson 2019-07-26 9:39 ` Paolo Bonzini 2019-07-26 9:39 ` [Qemu-riscv] " Paolo Bonzini 2019-07-26 14:45 ` Richard Henderson 2019-07-26 14:45 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:48 ` [Qemu-devel] [PATCH v5 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen 2019-07-26 6:48 ` [Qemu-riscv] " tony.nguyen 2019-07-26 14:48 ` Richard Henderson 2019-07-26 14:48 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:48 ` [Qemu-devel] [PATCH v5 13/15] cputlb: Byte swap memory transaction attribute tony.nguyen 2019-07-26 6:48 ` [Qemu-riscv] " tony.nguyen 2019-07-26 14:52 ` Richard Henderson 2019-07-26 14:52 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:48 ` [Qemu-devel] [PATCH v5 14/15] target/sparc: Add TLB entry with attributes tony.nguyen 2019-07-26 6:48 ` [Qemu-riscv] " tony.nguyen 2019-07-26 14:55 ` Richard Henderson 2019-07-26 14:55 ` [Qemu-riscv] " Richard Henderson 2019-07-26 6:49 ` [Qemu-devel] [PATCH v5 15/15] target/sparc: sun4u Invert Endian TTE bit tony.nguyen 2019-07-26 6:49 ` [Qemu-riscv] " tony.nguyen 2019-07-26 14:56 ` Richard Henderson 2019-07-26 14:56 ` [Qemu-riscv] " Richard Henderson
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