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From: <tony.nguyen@bt.com>
To: <qemu-devel@nongnu.org>
Cc: peter.maydell@linaro.org, walling@linux.ibm.com,
	sagark@eecs.berkeley.edu, mst@redhat.com, palmer@sifive.com,
	mark.cave-ayland@ilande.co.uk, laurent@vivier.eu,
	Alistair.Francis@wdc.com, edgar.iglesias@gmail.com,
	arikalo@wavecomp.com, david@redhat.com, pasic@linux.ibm.com,
	borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com,
	ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
	stefanha@redhat.com, shorne@gmail.com,
	david@gibson.dropbear.id.au, qemu-riscv@nongnu.org,
	kbastian@mail.uni-paderborn.de, cohuck@redhat.com,
	alex.williamson@redhat.com, qemu-ppc@nongnu.org,
	amarkovic@wavecomp.com, pbonzini@redhat.com,
	aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH v5 15/15] target/sparc: sun4u Invert Endian TTE bit
Date: Fri, 26 Jul 2019 06:49:19 +0000	[thread overview]
Message-ID: <1564123758372.45776@bt.com> (raw)
In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net>

This bit configures endianness of PCI MMIO devices. It is used by
Solaris and OpenBSD sunhme drivers.

Tested working on OpenBSD.

Unfortunately Solaris 10 had a unrelated keyboard issue blocking
testing... another inch towards Solaris 10 on SPARC64 =)

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
---
 target/sparc/cpu.h        | 2 ++
 target/sparc/mmu_helper.c | 8 +++++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 8ed2250..77e8e07 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -277,6 +277,7 @@ enum {

 #define TTE_VALID_BIT       (1ULL << 63)
 #define TTE_NFO_BIT         (1ULL << 60)
+#define TTE_IE_BIT          (1ULL << 59)
 #define TTE_USED_BIT        (1ULL << 41)
 #define TTE_LOCKED_BIT      (1ULL <<  6)
 #define TTE_SIDEEFFECT_BIT  (1ULL <<  3)
@@ -293,6 +294,7 @@ enum {

 #define TTE_IS_VALID(tte)   ((tte) & TTE_VALID_BIT)
 #define TTE_IS_NFO(tte)     ((tte) & TTE_NFO_BIT)
+#define TTE_IS_IE(tte)      ((tte) & TTE_IE_BIT)
 #define TTE_IS_USED(tte)    ((tte) & TTE_USED_BIT)
 #define TTE_IS_LOCKED(tte)  ((tte) & TTE_LOCKED_BIT)
 #define TTE_IS_SIDEEFFECT(tte) ((tte) & TTE_SIDEEFFECT_BIT)
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 826e14b..77dc86a 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -537,6 +537,10 @@ static int get_physical_address_data(CPUSPARCState *env, hwaddr *physical,
         if (ultrasparc_tag_match(&env->dtlb[i], address, context, physical)) {
             int do_fault = 0;

+            if (TTE_IS_IE(env->dtlb[i].tte)) {
+                attrs->byte_swap = true;
+            }
+
             /* access ok? */
             /* multiple bits in SFSR.FT may be set on TT_DFAULT */
             if (TTE_IS_PRIV(env->dtlb[i].tte) && is_user) {
@@ -792,7 +796,7 @@ void dump_mmu(CPUSPARCState *env)
             }
             if (TTE_IS_VALID(env->dtlb[i].tte)) {
                 qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx"
-                            ", %s, %s, %s, %s, ctx %" PRId64 " %s\n",
+                            ", %s, %s, %s, %s, ie %s, ctx %" PRId64 " %s\n",
                             i,
                             env->dtlb[i].tag & (uint64_t)~0x1fffULL,
                             TTE_PA(env->dtlb[i].tte),
@@ -801,6 +805,8 @@ void dump_mmu(CPUSPARCState *env)
                             TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO",
                             TTE_IS_LOCKED(env->dtlb[i].tte) ?
                             "locked" : "unlocked",
+                            TTE_IS_IE(env->dtlb[i].tte) ?
+                            "yes" : "no",
                             env->dtlb[i].tag & (uint64_t)0x1fffULL,
                             TTE_IS_GLOBAL(env->dtlb[i].tte) ?
                             "global" : "local");
--
1.8.3.1




WARNING: multiple messages have this Message-ID (diff)
From: <tony.nguyen@bt.com>
To: <qemu-devel@nongnu.org>
Cc: <peter.maydell@linaro.org>, <walling@linux.ibm.com>,
	<sagark@eecs.berkeley.edu>, <david@redhat.com>,
	<palmer@sifive.com>, <mark.cave-ayland@ilande.co.uk>,
	<Alistair.Francis@wdc.com>, <edgar.iglesias@gmail.com>,
	<arikalo@wavecomp.com>, <mst@redhat.com>, <pasic@linux.ibm.com>,
	<borntraeger@de.ibm.com>, <rth@twiddle.net>,
	<atar4qemu@gmail.com>, <ehabkost@redhat.com>,
	<alex.williamson@redhat.com>, <qemu-arm@nongnu.org>,
	<stefanha@redhat.com>, <shorne@gmail.com>,
	<david@gibson.dropbear.id.au>, <qemu-riscv@nongnu.org>,
	<qemu-s390x@nongnu.org>, <kbastian@mail.uni-paderborn.de>,
	<cohuck@redhat.com>, <laurent@vivier.eu>, <qemu-ppc@nongnu.org>,
	<amarkovic@wavecomp.com>, <pbonzini@redhat.com>,
	<aurelien@aurel32.net>
Subject: [Qemu-riscv] [Qemu-devel] [PATCH v5 15/15] target/sparc: sun4u Invert Endian TTE bit
Date: Fri, 26 Jul 2019 06:49:19 +0000	[thread overview]
Message-ID: <1564123758372.45776@bt.com> (raw)
In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net>

[-- Attachment #1: Type: text/plain, Size: 2930 bytes --]

This bit configures endianness of PCI MMIO devices. It is used by
Solaris and OpenBSD sunhme drivers.

Tested working on OpenBSD.

Unfortunately Solaris 10 had a unrelated keyboard issue blocking
testing... another inch towards Solaris 10 on SPARC64 =)

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
---
 target/sparc/cpu.h        | 2 ++
 target/sparc/mmu_helper.c | 8 +++++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 8ed2250..77e8e07 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -277,6 +277,7 @@ enum {

 #define TTE_VALID_BIT       (1ULL << 63)
 #define TTE_NFO_BIT         (1ULL << 60)
+#define TTE_IE_BIT          (1ULL << 59)
 #define TTE_USED_BIT        (1ULL << 41)
 #define TTE_LOCKED_BIT      (1ULL <<  6)
 #define TTE_SIDEEFFECT_BIT  (1ULL <<  3)
@@ -293,6 +294,7 @@ enum {

 #define TTE_IS_VALID(tte)   ((tte) & TTE_VALID_BIT)
 #define TTE_IS_NFO(tte)     ((tte) & TTE_NFO_BIT)
+#define TTE_IS_IE(tte)      ((tte) & TTE_IE_BIT)
 #define TTE_IS_USED(tte)    ((tte) & TTE_USED_BIT)
 #define TTE_IS_LOCKED(tte)  ((tte) & TTE_LOCKED_BIT)
 #define TTE_IS_SIDEEFFECT(tte) ((tte) & TTE_SIDEEFFECT_BIT)
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 826e14b..77dc86a 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -537,6 +537,10 @@ static int get_physical_address_data(CPUSPARCState *env, hwaddr *physical,
         if (ultrasparc_tag_match(&env->dtlb[i], address, context, physical)) {
             int do_fault = 0;

+            if (TTE_IS_IE(env->dtlb[i].tte)) {
+                attrs->byte_swap = true;
+            }
+
             /* access ok? */
             /* multiple bits in SFSR.FT may be set on TT_DFAULT */
             if (TTE_IS_PRIV(env->dtlb[i].tte) && is_user) {
@@ -792,7 +796,7 @@ void dump_mmu(CPUSPARCState *env)
             }
             if (TTE_IS_VALID(env->dtlb[i].tte)) {
                 qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx"
-                            ", %s, %s, %s, %s, ctx %" PRId64 " %s\n",
+                            ", %s, %s, %s, %s, ie %s, ctx %" PRId64 " %s\n",
                             i,
                             env->dtlb[i].tag & (uint64_t)~0x1fffULL,
                             TTE_PA(env->dtlb[i].tte),
@@ -801,6 +805,8 @@ void dump_mmu(CPUSPARCState *env)
                             TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO",
                             TTE_IS_LOCKED(env->dtlb[i].tte) ?
                             "locked" : "unlocked",
+                            TTE_IS_IE(env->dtlb[i].tte) ?
+                            "yes" : "no",
                             env->dtlb[i].tag & (uint64_t)0x1fffULL,
                             TTE_IS_GLOBAL(env->dtlb[i].tte) ?
                             "global" : "local");
--
1.8.3.1




[-- Attachment #2: Type: text/html, Size: 6268 bytes --]

  parent reply	other threads:[~2019-07-26  6:50 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-26  6:42 [Qemu-devel] [PATCH v5 00/15] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-07-26  6:42 ` [Qemu-riscv] " tony.nguyen
2019-07-26  6:43 ` [Qemu-devel] [PATCH v5 01/15] tcg: TCGMemOp is now accelerator independent MemOp tony.nguyen
2019-07-26  6:43   ` [Qemu-riscv] " tony.nguyen
2019-07-26  7:43   ` David Gibson
2019-07-26  7:43     ` [Qemu-riscv] " David Gibson
2019-07-26 13:27   ` Richard Henderson
2019-07-26 13:27     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:43 ` [Qemu-devel] [PATCH v5 02/15] memory: Access MemoryRegion with MemOp tony.nguyen
2019-07-26  6:43   ` [Qemu-riscv] " tony.nguyen
2019-07-26 13:36   ` Richard Henderson
2019-07-26 13:36     ` [Qemu-riscv] " Richard Henderson
2019-07-26 14:04     ` Richard Henderson
2019-07-26 14:04       ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:44 ` [Qemu-devel] [PATCH v5 03/15] target/mips: " tony.nguyen
2019-07-26  6:44   ` [Qemu-riscv] " tony.nguyen
2019-07-26 13:40   ` Richard Henderson
2019-07-26 13:40     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:44 ` [Qemu-devel] [PATCH v5 04/15] hw/s390x: " tony.nguyen
2019-07-26  6:44   ` [Qemu-riscv] " tony.nguyen
2019-07-26 13:42   ` Richard Henderson
2019-07-26 13:42     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:45 ` [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: " tony.nguyen
2019-07-26  6:45   ` [Qemu-riscv] " tony.nguyen
2019-07-26 13:43   ` Richard Henderson
2019-07-26 13:43     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:45 ` [Qemu-devel] [PATCH v5 06/15] hw/virtio: " tony.nguyen
2019-07-26  6:45   ` [Qemu-riscv] " tony.nguyen
2019-07-26 13:43   ` Richard Henderson
2019-07-26 13:43     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:46 ` [Qemu-devel] [PATCH v5 07/15] hw/vfio: " tony.nguyen
2019-07-26  6:46   ` [Qemu-riscv] " tony.nguyen
2019-07-26 13:43   ` Richard Henderson
2019-07-26 13:43     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:46 ` [Qemu-devel] [PATCH v5 08/15] exec: " tony.nguyen
2019-07-26  6:46   ` [Qemu-riscv] " tony.nguyen
2019-07-26 13:46   ` Richard Henderson
2019-07-26 13:46     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:46 ` [Qemu-devel] [PATCH v5 09/15] cputlb: " tony.nguyen
2019-07-26  6:46   ` [Qemu-riscv] " tony.nguyen
2019-07-26 11:03   ` Philippe Mathieu-Daudé
2019-07-26 11:03     ` [Qemu-riscv] " Philippe Mathieu-Daudé
2019-07-26 11:16     ` [Qemu-devel] [EXTERNAL]Re: " Aleksandar Markovic
2019-07-26 11:16       ` [Qemu-riscv] [EXTERNAL]Re: [Qemu-devel] " Aleksandar Markovic
2019-07-26 11:23     ` [Qemu-devel] [EXTERNAL]Re: " Aleksandar Markovic
2019-07-26 11:23       ` [Qemu-riscv] [EXTERNAL]Re: [Qemu-devel] " Aleksandar Markovic
2019-07-26 14:14   ` Richard Henderson
2019-07-26 14:14     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:47 ` [Qemu-devel] [PATCH v5 10/15] memory: Access MemoryRegion with MemOp semantics tony.nguyen
2019-07-26  6:47   ` [Qemu-riscv] " tony.nguyen
2019-07-26 14:24   ` Richard Henderson
2019-07-26 14:24     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:47 ` [Qemu-devel] [PATCH v5 11/15] memory: Single byte swap along the I/O path tony.nguyen
2019-07-26  6:47   ` [Qemu-riscv] " tony.nguyen
2019-07-26  9:26   ` Paolo Bonzini
2019-07-26  9:26     ` [Qemu-riscv] " Paolo Bonzini
2019-07-26 14:29     ` Richard Henderson
2019-07-26 14:29       ` [Qemu-riscv] " Richard Henderson
2019-07-26  9:39   ` Paolo Bonzini
2019-07-26  9:39     ` [Qemu-riscv] " Paolo Bonzini
2019-07-26 14:45     ` Richard Henderson
2019-07-26 14:45       ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:48 ` [Qemu-devel] [PATCH v5 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
2019-07-26  6:48   ` [Qemu-riscv] " tony.nguyen
2019-07-26 14:48   ` Richard Henderson
2019-07-26 14:48     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:48 ` [Qemu-devel] [PATCH v5 13/15] cputlb: Byte swap memory transaction attribute tony.nguyen
2019-07-26  6:48   ` [Qemu-riscv] " tony.nguyen
2019-07-26 14:52   ` Richard Henderson
2019-07-26 14:52     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:48 ` [Qemu-devel] [PATCH v5 14/15] target/sparc: Add TLB entry with attributes tony.nguyen
2019-07-26  6:48   ` [Qemu-riscv] " tony.nguyen
2019-07-26 14:55   ` Richard Henderson
2019-07-26 14:55     ` [Qemu-riscv] " Richard Henderson
2019-07-26  6:49 ` tony.nguyen [this message]
2019-07-26  6:49   ` [Qemu-riscv] [Qemu-devel] [PATCH v5 15/15] target/sparc: sun4u Invert Endian TTE bit tony.nguyen
2019-07-26 14:56   ` Richard Henderson
2019-07-26 14:56     ` [Qemu-riscv] " Richard Henderson

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