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From: Liu Yi L <yi.l.liu@intel.com>
To: qemu-devel@nongnu.org, mst@redhat.com, pbonzini@redhat.com,
	alex.williamson@redhat.com, peterx@redhat.com
Cc: eric.auger@redhat.com, david@gibson.dropbear.id.au,
	tianyu.lan@intel.com, kevin.tian@intel.com, yi.l.liu@intel.com,
	jun.j.tian@intel.com, yi.y.sun@intel.com,
	jacob.jun.pan@linux.intel.com, kvm@vger.kernel.org,
	Yi Sun <yi.y.sun@linux.intel.com>
Subject: [RFC v2 16/22] intel_iommu: replay guest pasid bindings to host
Date: Thu, 24 Oct 2019 08:34:37 -0400	[thread overview]
Message-ID: <1571920483-3382-17-git-send-email-yi.l.liu@intel.com> (raw)
In-Reply-To: <1571920483-3382-1-git-send-email-yi.l.liu@intel.com>

This patch adds guest pasid bindings replay for domain-selective(dsi)
pasid cache invalidation and global pasid cache invalidation by walking
guest pasid table.

Reason:
Guest OS may flush the pasid cache with wrong granularity. e.g. guest
does a svm_bind() but flush the pasid cache with global or domain
selective pasid cache invalidation instead of pasid selective(psi)
pasid cache invalidation. Regards to such case, it works in host.
Per spec, a global or domain selective pasid cache invalidation should
be able to cover what a pasid selective invalidation does. The only
concern is performance deduction since dsi and global cache invalidation
will flush more than psi. To align with native, vIOMMU needs emulator
needs to do replay for the two invalidation granularity to reflect the
latest pasid bindings in guest pasid table.

Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>
Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
---
 hw/i386/intel_iommu.c          | 160 +++++++++++++++++++++++++++++++++++++----
 hw/i386/intel_iommu_internal.h |   1 +
 2 files changed, 149 insertions(+), 12 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 793b0de..a9e660c 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -68,6 +68,8 @@ static void vtd_address_space_refresh_all(IntelIOMMUState *s);
 static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n);
 
 static void vtd_pasid_cache_reset(IntelIOMMUState *s);
+static int vtd_update_pe_cache_for_dev(IntelIOMMUState *s,
+              VTDBus *vtd_bus, int devfn, int pasid, VTDPASIDEntry *pe);
 
 static void vtd_panic_require_caching_mode(void)
 {
@@ -2618,6 +2620,111 @@ static gboolean vtd_flush_pasid(gpointer key, gpointer value,
     return remove;
 }
 
+/**
+ * Constant information used during pasid table walk
+ * @ic: iommu_context
+ * @flags: indicates if it is domain selective walk
+ * @did: domain ID of the pasid table walk
+ */
+typedef struct {
+    VTDIOMMUContext *ic;
+#define VTD_PASID_TABLE_DID_SEL_WALK   (1ULL << 0);
+    uint32_t flags;
+    uint16_t did;
+} vtd_pt_walk_info;
+
+static bool vtd_sm_pasid_table_walk_one(IntelIOMMUState *s,
+                                       dma_addr_t pt_base,
+                                       int start,
+                                       int end,
+                                       vtd_pt_walk_info *info)
+{
+    VTDPASIDEntry pe;
+    int pasid = start;
+    int pasid_next;
+    VTDIOMMUContext *ic = info->ic;
+
+    while (pasid < end) {
+        pasid_next = pasid + 1;
+
+        if (!vtd_get_pe_in_pasid_leaf_table(s, pasid, pt_base, &pe)
+            && vtd_pe_present(&pe)) {
+            if (vtd_update_pe_cache_for_dev(s,
+                                      ic->vtd_bus, ic->devfn, pasid, &pe)) {
+                error_report_once("%s, bus: %d, devfn: %d, pasid: %d",
+                  __func__, pci_bus_num(ic->vtd_bus->bus), ic->devfn, pasid);
+                return false;
+            }
+        }
+        pasid = pasid_next;
+    }
+    return true;
+}
+
+/*
+ * Currently, VT-d scalable mode pasid table is a two level table, this
+ * function aims to loop a range of PASIDs in a given pasid table to
+ * identify the pasid config in guest.
+ */
+static void vtd_sm_pasid_table_walk(IntelIOMMUState *s, dma_addr_t pdt_base,
+                                  int start, int end, vtd_pt_walk_info *info)
+{
+    VTDPASIDDirEntry pdire;
+    int pasid = start;
+    int pasid_next;
+    dma_addr_t pt_base;
+
+    while (pasid < end) {
+        pasid_next = pasid + VTD_PASID_TBL_ENTRY_NUM;
+        if (!vtd_get_pdire_from_pdir_table(pdt_base, pasid, &pdire)
+            && vtd_pdire_present(&pdire)) {
+            pt_base = pdire.val & VTD_PASID_TABLE_BASE_ADDR_MASK;
+            if (!vtd_sm_pasid_table_walk_one(s,
+                              pt_base, pasid, pasid_next, info)) {
+                break;
+            }
+        }
+        pasid = pasid_next;
+    }
+}
+
+/**
+ * This function replay the guest pasid bindings to hots by
+ * walking the guest PASID table. This ensures host will have
+ * latest guest pasid bindings.
+ */
+static void vtd_replay_guest_pasid_bindings(IntelIOMMUState *s,
+                                           uint16_t *did, bool is_dsi)
+{
+    VTDContextEntry ce;
+    vtd_pt_walk_info info;
+    VTDIOMMUContext *vtd_ic;
+
+    if (is_dsi) {
+        info.flags = VTD_PASID_TABLE_DID_SEL_WALK;
+        info.did = *did;
+    }
+
+    /*
+     * In this replay, only needs to care about the devices which
+     * has iommu_context created. For the one not have iommu_context,
+     * it is not necessary to replay the bindings since their cache
+     * could be re-created in the next DMA address transaltion.
+     */
+    QLIST_FOREACH(vtd_ic, &s->vtd_dev_ic_list, next) {
+        if (!vtd_dev_to_context_entry(s,
+                                      pci_bus_num(vtd_ic->vtd_bus->bus),
+                                      vtd_ic->devfn, &ce)) {
+            info.ic = vtd_ic;
+            vtd_sm_pasid_table_walk(s,
+                                    VTD_CE_GET_PASID_DIR_TABLE(&ce),
+                                    0,
+                                    VTD_MAX_HPASID,
+                                    &info);
+        }
+    }
+}
+
 static int vtd_pasid_cache_dsi(IntelIOMMUState *s, uint16_t domain_id)
 {
     VTDPASIDCacheInfo pc_info;
@@ -2632,15 +2739,17 @@ static int vtd_pasid_cache_dsi(IntelIOMMUState *s, uint16_t domain_id)
      */
     vtd_iommu_lock(s);
     g_hash_table_foreach_remove(s->vtd_pasid_as, vtd_flush_pasid, &pc_info);
-    vtd_iommu_unlock(s);
 
     /*
-     * TODO: Domain selective PASID cache invalidation
-     * may be issued wrongly by programmer, to be safe,
-     * after invalidating the pasid caches, emulator
-     * needs to replay the pasid bindings by walking guest
-     * pasid dir and pasid table.
+     * Domain selective PASID cache invalidation may be
+     * issued wrongly by programmer, to be safe, after
+     * invalidating the pasid caches, emulator needs to
+     * replay the pasid bindings by walking guest pasid
+     * dir and pasid table.
      */
+    vtd_replay_guest_pasid_bindings(s, &domain_id, true);
+
+    vtd_iommu_unlock(s);
     return 0;
 }
 
@@ -2706,6 +2815,31 @@ static inline void vtd_fill_in_pe_cache(
                          pe, VTD_PASID_UPDATE);
 }
 
+/**
+ * This function updates the pasid entry cached in &vtd_pasid_as.
+ * Caller of this function should hold iommu_lock.
+ */
+static int vtd_update_pe_cache_for_dev(IntelIOMMUState *s, VTDBus *vtd_bus,
+                               int devfn, int pasid, VTDPASIDEntry *pe)
+{
+    VTDPASIDAddressSpace *vtd_pasid_as;
+
+    vtd_pasid_as = vtd_add_find_pasid_as(s, vtd_bus,
+                                        devfn, pasid, true);
+    if (!vtd_pasid_as) {
+        error_report_once("%s, fatal error happened!\n", __func__);
+        return -1;
+    }
+
+    if (vtd_pasid_as->pasid_cache_entry.pasid_cache_gen ==
+                                               s->pasid_cache_gen) {
+        return 0;
+    }
+
+    vtd_fill_in_pe_cache(vtd_pasid_as, pe);
+    return 0;
+}
+
 static int vtd_pasid_cache_psi(IntelIOMMUState *s,
                                uint16_t domain_id, uint32_t pasid)
 {
@@ -2825,15 +2959,17 @@ static int vtd_pasid_cache_gsi(IntelIOMMUState *s)
 
     vtd_iommu_lock(s);
     vtd_pasid_cache_reset(s);
-    vtd_iommu_unlock(s);
 
     /*
-     * TODO: Global PASID cache invalidation may be
-     * issued wrongly by programmer, to be safe, after
-     * invalidating the pasid caches, emulator needs
-     * to replay the pasid bindings by walking guest
-     * pasid dir and pasid table.
+     * Global PASID cache invalidation may be issued
+     * wrongly by programmer, to be safe, after invalidating
+     * the pasid caches, emulator needs to replay the
+     * pasid bindings by walking guest pasid dir and
+     * pasid table.
      */
+    vtd_replay_guest_pasid_bindings(s, NULL, false);
+
+    vtd_iommu_unlock(s);
     return 0;
 }
 
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index 13e02e8..eab65ef 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -545,6 +545,7 @@ typedef struct VTDPASIDCacheInfo VTDPASIDCacheInfo;
 #define VTD_PASID_TABLE_BITS_MASK     (0x3fULL)
 #define VTD_PASID_TABLE_INDEX(pasid)  ((pasid) & VTD_PASID_TABLE_BITS_MASK)
 #define VTD_PASID_ENTRY_FPD           (1ULL << 1) /* Fault Processing Disable */
+#define VTD_PASID_TBL_ENTRY_NUM       (1ULL << 6)
 
 /* PASID Granular Translation Type Mask */
 #define VTD_PASID_ENTRY_P              1ULL
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Liu Yi L <yi.l.liu@intel.com>
To: qemu-devel@nongnu.org, mst@redhat.com, pbonzini@redhat.com,
	alex.williamson@redhat.com, peterx@redhat.com
Cc: tianyu.lan@intel.com, kevin.tian@intel.com, yi.l.liu@intel.com,
	Yi Sun <yi.y.sun@linux.intel.com>,
	kvm@vger.kernel.org, jun.j.tian@intel.com, eric.auger@redhat.com,
	yi.y.sun@intel.com, jacob.jun.pan@linux.intel.com,
	david@gibson.dropbear.id.au
Subject: [RFC v2 16/22] intel_iommu: replay guest pasid bindings to host
Date: Thu, 24 Oct 2019 08:34:37 -0400	[thread overview]
Message-ID: <1571920483-3382-17-git-send-email-yi.l.liu@intel.com> (raw)
In-Reply-To: <1571920483-3382-1-git-send-email-yi.l.liu@intel.com>

This patch adds guest pasid bindings replay for domain-selective(dsi)
pasid cache invalidation and global pasid cache invalidation by walking
guest pasid table.

Reason:
Guest OS may flush the pasid cache with wrong granularity. e.g. guest
does a svm_bind() but flush the pasid cache with global or domain
selective pasid cache invalidation instead of pasid selective(psi)
pasid cache invalidation. Regards to such case, it works in host.
Per spec, a global or domain selective pasid cache invalidation should
be able to cover what a pasid selective invalidation does. The only
concern is performance deduction since dsi and global cache invalidation
will flush more than psi. To align with native, vIOMMU needs emulator
needs to do replay for the two invalidation granularity to reflect the
latest pasid bindings in guest pasid table.

Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>
Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
---
 hw/i386/intel_iommu.c          | 160 +++++++++++++++++++++++++++++++++++++----
 hw/i386/intel_iommu_internal.h |   1 +
 2 files changed, 149 insertions(+), 12 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 793b0de..a9e660c 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -68,6 +68,8 @@ static void vtd_address_space_refresh_all(IntelIOMMUState *s);
 static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n);
 
 static void vtd_pasid_cache_reset(IntelIOMMUState *s);
+static int vtd_update_pe_cache_for_dev(IntelIOMMUState *s,
+              VTDBus *vtd_bus, int devfn, int pasid, VTDPASIDEntry *pe);
 
 static void vtd_panic_require_caching_mode(void)
 {
@@ -2618,6 +2620,111 @@ static gboolean vtd_flush_pasid(gpointer key, gpointer value,
     return remove;
 }
 
+/**
+ * Constant information used during pasid table walk
+ * @ic: iommu_context
+ * @flags: indicates if it is domain selective walk
+ * @did: domain ID of the pasid table walk
+ */
+typedef struct {
+    VTDIOMMUContext *ic;
+#define VTD_PASID_TABLE_DID_SEL_WALK   (1ULL << 0);
+    uint32_t flags;
+    uint16_t did;
+} vtd_pt_walk_info;
+
+static bool vtd_sm_pasid_table_walk_one(IntelIOMMUState *s,
+                                       dma_addr_t pt_base,
+                                       int start,
+                                       int end,
+                                       vtd_pt_walk_info *info)
+{
+    VTDPASIDEntry pe;
+    int pasid = start;
+    int pasid_next;
+    VTDIOMMUContext *ic = info->ic;
+
+    while (pasid < end) {
+        pasid_next = pasid + 1;
+
+        if (!vtd_get_pe_in_pasid_leaf_table(s, pasid, pt_base, &pe)
+            && vtd_pe_present(&pe)) {
+            if (vtd_update_pe_cache_for_dev(s,
+                                      ic->vtd_bus, ic->devfn, pasid, &pe)) {
+                error_report_once("%s, bus: %d, devfn: %d, pasid: %d",
+                  __func__, pci_bus_num(ic->vtd_bus->bus), ic->devfn, pasid);
+                return false;
+            }
+        }
+        pasid = pasid_next;
+    }
+    return true;
+}
+
+/*
+ * Currently, VT-d scalable mode pasid table is a two level table, this
+ * function aims to loop a range of PASIDs in a given pasid table to
+ * identify the pasid config in guest.
+ */
+static void vtd_sm_pasid_table_walk(IntelIOMMUState *s, dma_addr_t pdt_base,
+                                  int start, int end, vtd_pt_walk_info *info)
+{
+    VTDPASIDDirEntry pdire;
+    int pasid = start;
+    int pasid_next;
+    dma_addr_t pt_base;
+
+    while (pasid < end) {
+        pasid_next = pasid + VTD_PASID_TBL_ENTRY_NUM;
+        if (!vtd_get_pdire_from_pdir_table(pdt_base, pasid, &pdire)
+            && vtd_pdire_present(&pdire)) {
+            pt_base = pdire.val & VTD_PASID_TABLE_BASE_ADDR_MASK;
+            if (!vtd_sm_pasid_table_walk_one(s,
+                              pt_base, pasid, pasid_next, info)) {
+                break;
+            }
+        }
+        pasid = pasid_next;
+    }
+}
+
+/**
+ * This function replay the guest pasid bindings to hots by
+ * walking the guest PASID table. This ensures host will have
+ * latest guest pasid bindings.
+ */
+static void vtd_replay_guest_pasid_bindings(IntelIOMMUState *s,
+                                           uint16_t *did, bool is_dsi)
+{
+    VTDContextEntry ce;
+    vtd_pt_walk_info info;
+    VTDIOMMUContext *vtd_ic;
+
+    if (is_dsi) {
+        info.flags = VTD_PASID_TABLE_DID_SEL_WALK;
+        info.did = *did;
+    }
+
+    /*
+     * In this replay, only needs to care about the devices which
+     * has iommu_context created. For the one not have iommu_context,
+     * it is not necessary to replay the bindings since their cache
+     * could be re-created in the next DMA address transaltion.
+     */
+    QLIST_FOREACH(vtd_ic, &s->vtd_dev_ic_list, next) {
+        if (!vtd_dev_to_context_entry(s,
+                                      pci_bus_num(vtd_ic->vtd_bus->bus),
+                                      vtd_ic->devfn, &ce)) {
+            info.ic = vtd_ic;
+            vtd_sm_pasid_table_walk(s,
+                                    VTD_CE_GET_PASID_DIR_TABLE(&ce),
+                                    0,
+                                    VTD_MAX_HPASID,
+                                    &info);
+        }
+    }
+}
+
 static int vtd_pasid_cache_dsi(IntelIOMMUState *s, uint16_t domain_id)
 {
     VTDPASIDCacheInfo pc_info;
@@ -2632,15 +2739,17 @@ static int vtd_pasid_cache_dsi(IntelIOMMUState *s, uint16_t domain_id)
      */
     vtd_iommu_lock(s);
     g_hash_table_foreach_remove(s->vtd_pasid_as, vtd_flush_pasid, &pc_info);
-    vtd_iommu_unlock(s);
 
     /*
-     * TODO: Domain selective PASID cache invalidation
-     * may be issued wrongly by programmer, to be safe,
-     * after invalidating the pasid caches, emulator
-     * needs to replay the pasid bindings by walking guest
-     * pasid dir and pasid table.
+     * Domain selective PASID cache invalidation may be
+     * issued wrongly by programmer, to be safe, after
+     * invalidating the pasid caches, emulator needs to
+     * replay the pasid bindings by walking guest pasid
+     * dir and pasid table.
      */
+    vtd_replay_guest_pasid_bindings(s, &domain_id, true);
+
+    vtd_iommu_unlock(s);
     return 0;
 }
 
@@ -2706,6 +2815,31 @@ static inline void vtd_fill_in_pe_cache(
                          pe, VTD_PASID_UPDATE);
 }
 
+/**
+ * This function updates the pasid entry cached in &vtd_pasid_as.
+ * Caller of this function should hold iommu_lock.
+ */
+static int vtd_update_pe_cache_for_dev(IntelIOMMUState *s, VTDBus *vtd_bus,
+                               int devfn, int pasid, VTDPASIDEntry *pe)
+{
+    VTDPASIDAddressSpace *vtd_pasid_as;
+
+    vtd_pasid_as = vtd_add_find_pasid_as(s, vtd_bus,
+                                        devfn, pasid, true);
+    if (!vtd_pasid_as) {
+        error_report_once("%s, fatal error happened!\n", __func__);
+        return -1;
+    }
+
+    if (vtd_pasid_as->pasid_cache_entry.pasid_cache_gen ==
+                                               s->pasid_cache_gen) {
+        return 0;
+    }
+
+    vtd_fill_in_pe_cache(vtd_pasid_as, pe);
+    return 0;
+}
+
 static int vtd_pasid_cache_psi(IntelIOMMUState *s,
                                uint16_t domain_id, uint32_t pasid)
 {
@@ -2825,15 +2959,17 @@ static int vtd_pasid_cache_gsi(IntelIOMMUState *s)
 
     vtd_iommu_lock(s);
     vtd_pasid_cache_reset(s);
-    vtd_iommu_unlock(s);
 
     /*
-     * TODO: Global PASID cache invalidation may be
-     * issued wrongly by programmer, to be safe, after
-     * invalidating the pasid caches, emulator needs
-     * to replay the pasid bindings by walking guest
-     * pasid dir and pasid table.
+     * Global PASID cache invalidation may be issued
+     * wrongly by programmer, to be safe, after invalidating
+     * the pasid caches, emulator needs to replay the
+     * pasid bindings by walking guest pasid dir and
+     * pasid table.
      */
+    vtd_replay_guest_pasid_bindings(s, NULL, false);
+
+    vtd_iommu_unlock(s);
     return 0;
 }
 
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index 13e02e8..eab65ef 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -545,6 +545,7 @@ typedef struct VTDPASIDCacheInfo VTDPASIDCacheInfo;
 #define VTD_PASID_TABLE_BITS_MASK     (0x3fULL)
 #define VTD_PASID_TABLE_INDEX(pasid)  ((pasid) & VTD_PASID_TABLE_BITS_MASK)
 #define VTD_PASID_ENTRY_FPD           (1ULL << 1) /* Fault Processing Disable */
+#define VTD_PASID_TBL_ENTRY_NUM       (1ULL << 6)
 
 /* PASID Granular Translation Type Mask */
 #define VTD_PASID_ENTRY_P              1ULL
-- 
2.7.4



  parent reply	other threads:[~2019-10-24 13:01 UTC|newest]

Thread overview: 150+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-24 12:34 [RFC v2 00/22] intel_iommu: expose Shared Virtual Addressing to VM Liu Yi L
2019-10-24 12:34 ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 01/22] update-linux-headers: Import iommu.h Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 02/22] header update VFIO/IOMMU vSVA APIs against 5.4.0-rc3+ Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 03/22] intel_iommu: modify x-scalable-mode to be string option Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-01 14:57   ` Peter Xu
2019-11-01 14:57     ` Peter Xu
2019-11-05  9:14     ` Liu, Yi L
2019-11-05  9:14       ` Liu, Yi L
2019-11-05 12:50       ` Peter Xu
2019-11-05 12:50         ` Peter Xu
2019-11-06  9:50         ` Liu, Yi L
2019-11-06  9:50           ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 04/22] hw/iommu: introduce IOMMUContext Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-27 17:39   ` David Gibson
2019-10-27 17:39     ` David Gibson
2019-11-06 11:18     ` Liu, Yi L
2019-11-06 11:18       ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 05/22] vfio/common: add iommu_ctx_notifier in container Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-01 14:58   ` Peter Xu
2019-11-01 14:58     ` Peter Xu
2019-11-06 11:08     ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 06/22] hw/pci: modify pci_setup_iommu() to set PCIIOMMUOps Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-27 17:43   ` David Gibson
2019-10-27 17:43     ` David Gibson
2019-11-06  8:18     ` Liu, Yi L
2019-11-06  8:18       ` Liu, Yi L
2019-11-01 18:09   ` Peter Xu
2019-11-01 18:09     ` Peter Xu
2019-11-06  8:15     ` Liu, Yi L
2019-11-06  8:15       ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 07/22] hw/pci: introduce pci_device_iommu_context() Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-29 11:50   ` David Gibson
2019-10-29 11:50     ` David Gibson
2019-11-06  8:20     ` Liu, Yi L
2019-11-06  8:20       ` Liu, Yi L
2019-11-01 18:09   ` Peter Xu
2019-11-01 18:09     ` Peter Xu
2019-11-06  8:14     ` Liu, Yi L
2019-11-06  8:14       ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 08/22] intel_iommu: provide get_iommu_context() callback Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-01 14:55   ` Peter Xu
2019-11-01 14:55     ` Peter Xu
2019-11-06 11:07     ` Liu, Yi L
2019-11-06 11:07       ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 09/22] vfio/pci: add iommu_context notifier for pasid alloc/free Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-29 12:15   ` David Gibson
2019-10-29 12:15     ` David Gibson
2019-11-01 17:26     ` Peter Xu
2019-11-01 17:26       ` Peter Xu
2019-11-06 12:46       ` Liu, Yi L
2019-11-06 12:46         ` Liu, Yi L
2019-11-06 12:14     ` Liu, Yi L
2019-11-06 12:14       ` Liu, Yi L
2019-11-20  4:27       ` David Gibson
2019-11-20  4:27         ` David Gibson
2019-11-26  7:07         ` Liu, Yi L
2019-11-26  7:07           ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 10/22] intel_iommu: add virtual command capability support Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-01 18:05   ` Peter Xu
2019-11-01 18:05     ` Peter Xu
2019-11-06 12:40     ` Liu, Yi L
2019-11-06 12:40       ` Liu, Yi L
2019-11-06 14:00       ` Peter Xu
2019-11-06 14:00         ` Peter Xu
2019-11-12  6:27         ` Liu, Yi L
2019-11-12  6:27           ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 11/22] intel_iommu: process pasid cache invalidation Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-02 16:05   ` Peter Xu
2019-11-02 16:05     ` Peter Xu
2019-11-06  5:55     ` Liu, Yi L
2019-11-06  5:55       ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 12/22] intel_iommu: add present bit check for pasid table entries Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-02 16:20   ` Peter Xu
2019-11-02 16:20     ` Peter Xu
2019-11-06  8:14     ` Liu, Yi L
2019-11-06  8:14       ` Liu, Yi L
2019-10-24 12:34 ` [RFC v2 13/22] intel_iommu: add PASID cache management infrastructure Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-04 17:08   ` Peter Xu
2019-11-04 17:08     ` Peter Xu
2019-11-04 20:06   ` Peter Xu
2019-11-04 20:06     ` Peter Xu
2019-11-06  7:56     ` Liu, Yi L
2019-11-06  7:56       ` Liu, Yi L
2019-11-07 15:46       ` Peter Xu
2019-11-07 15:46         ` Peter Xu
2019-10-24 12:34 ` [RFC v2 14/22] vfio/pci: add iommu_context notifier for pasid bind/unbind Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-04 16:02   ` David Gibson
2019-11-04 16:02     ` David Gibson
2019-11-06 12:22     ` Liu, Yi L
2019-11-06 12:22       ` Liu, Yi L
2019-11-06 14:25       ` Peter Xu
2019-11-06 14:25         ` Peter Xu
2019-10-24 12:34 ` [RFC v2 15/22] intel_iommu: bind/unbind guest page table to host Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-11-04 20:25   ` Peter Xu
2019-11-04 20:25     ` Peter Xu
2019-11-06  8:10     ` Liu, Yi L
2019-11-06  8:10       ` Liu, Yi L
2019-11-06 14:27       ` Peter Xu
2019-11-06 14:27         ` Peter Xu
2019-10-24 12:34 ` Liu Yi L [this message]
2019-10-24 12:34   ` [RFC v2 16/22] intel_iommu: replay guest pasid bindings " Liu Yi L
2019-10-24 12:34 ` [RFC v2 17/22] intel_iommu: replay pasid binds after context cache invalidation Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 18/22] intel_iommu: do not passdown pasid bind for PASID #0 Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 19/22] vfio/pci: add iommu_context notifier for PASID-based iotlb flush Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 20/22] intel_iommu: process PASID-based iotlb invalidation Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 21/22] intel_iommu: propagate PASID-based iotlb invalidation to host Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-24 12:34 ` [RFC v2 22/22] intel_iommu: process PASID-based Device-TLB invalidation Liu Yi L
2019-10-24 12:34   ` Liu Yi L
2019-10-25  6:21 ` [RFC v2 00/22] intel_iommu: expose Shared Virtual Addressing to VM no-reply
2019-10-25  6:21   ` no-reply
2019-10-25  6:30 ` no-reply
2019-10-25  6:30   ` no-reply
2019-10-25  9:49 ` Jason Wang
2019-10-25  9:49   ` Jason Wang
2019-10-25 10:12   ` Tian, Kevin
2019-10-25 10:12     ` Tian, Kevin
2019-10-31  4:33     ` Jason Wang
2019-10-31  5:39       ` Tian, Kevin
2019-10-31 14:07       ` Liu, Yi L
2019-11-01  7:29         ` Jason Wang
2019-11-01  7:46           ` Tian, Kevin
2019-11-01  8:04             ` Jason Wang
2019-11-01  8:04               ` Jason Wang
2019-11-01  8:09               ` Jason Wang
2019-11-02  7:35                 ` Tian, Kevin
2019-11-04 17:22 ` Peter Xu
2019-11-04 17:22   ` Peter Xu
2019-11-05  9:09   ` Liu, Yi L
2019-11-05  9:09     ` Liu, Yi L

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