From: Sowjanya Komatineni <skomatineni@nvidia.com> To: skomatineni@nvidia.com, thierry.reding@gmail.com, jonathanh@nvidia.com, broonie@kernel.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, digetx@gmail.com, mperttunen@nvidia.com, gregkh@linuxfoundation.org, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: pdeschrijver@nvidia.com, pgaikwad@nvidia.com, spujar@nvidia.com, josephl@nvidia.com, daniel.lezcano@linaro.org, mmaddireddy@nvidia.com, markz@nvidia.com, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 01/19] dt-bindings: clock: tegra: Change CLK_M_DIV to OSC_DIV clocks Date: Fri, 20 Dec 2019 14:26:47 -0800 [thread overview] Message-ID: <1576880825-15010-2-git-send-email-skomatineni@nvidia.com> (raw) In-Reply-To: <1576880825-15010-1-git-send-email-skomatineni@nvidia.com> Tegra has no CLK_M_DIV2 and CLK_M_DIV4 clocks and instead it has OSC_DIV2 and OSC_DIV4 clocks from OSC pads. This patch changes CLK_M_DIV2 and CLK_M_DIV4 clock ids to OSC_DIV2 and OSC_DIV4 clock ids for Tegra30 through Tegra210. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- include/dt-bindings/clock/tegra114-car.h | 4 ++-- include/dt-bindings/clock/tegra124-car-common.h | 4 ++-- include/dt-bindings/clock/tegra210-car.h | 4 ++-- include/dt-bindings/clock/tegra30-car.h | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h index bb5c2c999c05..f4880959b094 100644 --- a/include/dt-bindings/clock/tegra114-car.h +++ b/include/dt-bindings/clock/tegra114-car.h @@ -226,8 +226,8 @@ #define TEGRA114_CLK_FUSE_BURN 199 #define TEGRA114_CLK_CLK_32K 200 #define TEGRA114_CLK_CLK_M 201 -#define TEGRA114_CLK_CLK_M_DIV2 202 -#define TEGRA114_CLK_CLK_M_DIV4 203 +#define TEGRA114_CLK_OSC_DIV2 202 +#define TEGRA114_CLK_OSC_DIV4 203 #define TEGRA114_CLK_PLL_REF 204 #define TEGRA114_CLK_PLL_C 205 #define TEGRA114_CLK_PLL_C_OUT1 206 diff --git a/include/dt-bindings/clock/tegra124-car-common.h b/include/dt-bindings/clock/tegra124-car-common.h index 0c4f5be0a742..e7e601a88d3d 100644 --- a/include/dt-bindings/clock/tegra124-car-common.h +++ b/include/dt-bindings/clock/tegra124-car-common.h @@ -225,8 +225,8 @@ #define TEGRA124_CLK_FUSE_BURN 199 #define TEGRA124_CLK_CLK_32K 200 #define TEGRA124_CLK_CLK_M 201 -#define TEGRA124_CLK_CLK_M_DIV2 202 -#define TEGRA124_CLK_CLK_M_DIV4 203 +#define TEGRA124_CLK_OSC_DIV2 202 +#define TEGRA124_CLK_OSC_DIV4 203 #define TEGRA124_CLK_PLL_REF 204 #define TEGRA124_CLK_PLL_C 205 #define TEGRA124_CLK_PLL_C_OUT1 206 diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h index 44f60623f99b..6f65c14bf013 100644 --- a/include/dt-bindings/clock/tegra210-car.h +++ b/include/dt-bindings/clock/tegra210-car.h @@ -260,8 +260,8 @@ #define TEGRA210_CLK_FUSE_BURN 231 #define TEGRA210_CLK_CLK_32K 232 #define TEGRA210_CLK_CLK_M 233 -#define TEGRA210_CLK_CLK_M_DIV2 234 -#define TEGRA210_CLK_CLK_M_DIV4 235 +#define TEGRA210_CLK_OSC_DIV2 234 +#define TEGRA210_CLK_OSC_DIV4 235 #define TEGRA210_CLK_PLL_REF 236 #define TEGRA210_CLK_PLL_C 237 #define TEGRA210_CLK_PLL_C_OUT1 238 diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h index 3c90f1535551..907a8a04c280 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -194,8 +194,8 @@ #define TEGRA30_CLK_TVO 169 #define TEGRA30_CLK_CLK_32K 170 #define TEGRA30_CLK_CLK_M 171 -#define TEGRA30_CLK_CLK_M_DIV2 172 -#define TEGRA30_CLK_CLK_M_DIV4 173 +#define TEGRA30_CLK_OSC_DIV2 172 +#define TEGRA30_CLK_OSC_DIV4 173 #define TEGRA30_CLK_PLL_REF 174 #define TEGRA30_CLK_PLL_C 175 #define TEGRA30_CLK_PLL_C_OUT1 176 -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Sowjanya Komatineni <skomatineni@nvidia.com> To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <broonie@kernel.org>, <lgirdwood@gmail.com>, <perex@perex.cz>, <tiwai@suse.com>, <digetx@gmail.com>, <mperttunen@nvidia.com>, <gregkh@linuxfoundation.org>, <sboyd@kernel.org>, <robh+dt@kernel.org>, <mark.rutland@arm.com> Cc: <pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>, <spujar@nvidia.com>, <josephl@nvidia.com>, <daniel.lezcano@linaro.org>, <mmaddireddy@nvidia.com>, <markz@nvidia.com>, <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v5 01/19] dt-bindings: clock: tegra: Change CLK_M_DIV to OSC_DIV clocks Date: Fri, 20 Dec 2019 14:26:47 -0800 [thread overview] Message-ID: <1576880825-15010-2-git-send-email-skomatineni@nvidia.com> (raw) In-Reply-To: <1576880825-15010-1-git-send-email-skomatineni@nvidia.com> Tegra has no CLK_M_DIV2 and CLK_M_DIV4 clocks and instead it has OSC_DIV2 and OSC_DIV4 clocks from OSC pads. This patch changes CLK_M_DIV2 and CLK_M_DIV4 clock ids to OSC_DIV2 and OSC_DIV4 clock ids for Tegra30 through Tegra210. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- include/dt-bindings/clock/tegra114-car.h | 4 ++-- include/dt-bindings/clock/tegra124-car-common.h | 4 ++-- include/dt-bindings/clock/tegra210-car.h | 4 ++-- include/dt-bindings/clock/tegra30-car.h | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h index bb5c2c999c05..f4880959b094 100644 --- a/include/dt-bindings/clock/tegra114-car.h +++ b/include/dt-bindings/clock/tegra114-car.h @@ -226,8 +226,8 @@ #define TEGRA114_CLK_FUSE_BURN 199 #define TEGRA114_CLK_CLK_32K 200 #define TEGRA114_CLK_CLK_M 201 -#define TEGRA114_CLK_CLK_M_DIV2 202 -#define TEGRA114_CLK_CLK_M_DIV4 203 +#define TEGRA114_CLK_OSC_DIV2 202 +#define TEGRA114_CLK_OSC_DIV4 203 #define TEGRA114_CLK_PLL_REF 204 #define TEGRA114_CLK_PLL_C 205 #define TEGRA114_CLK_PLL_C_OUT1 206 diff --git a/include/dt-bindings/clock/tegra124-car-common.h b/include/dt-bindings/clock/tegra124-car-common.h index 0c4f5be0a742..e7e601a88d3d 100644 --- a/include/dt-bindings/clock/tegra124-car-common.h +++ b/include/dt-bindings/clock/tegra124-car-common.h @@ -225,8 +225,8 @@ #define TEGRA124_CLK_FUSE_BURN 199 #define TEGRA124_CLK_CLK_32K 200 #define TEGRA124_CLK_CLK_M 201 -#define TEGRA124_CLK_CLK_M_DIV2 202 -#define TEGRA124_CLK_CLK_M_DIV4 203 +#define TEGRA124_CLK_OSC_DIV2 202 +#define TEGRA124_CLK_OSC_DIV4 203 #define TEGRA124_CLK_PLL_REF 204 #define TEGRA124_CLK_PLL_C 205 #define TEGRA124_CLK_PLL_C_OUT1 206 diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h index 44f60623f99b..6f65c14bf013 100644 --- a/include/dt-bindings/clock/tegra210-car.h +++ b/include/dt-bindings/clock/tegra210-car.h @@ -260,8 +260,8 @@ #define TEGRA210_CLK_FUSE_BURN 231 #define TEGRA210_CLK_CLK_32K 232 #define TEGRA210_CLK_CLK_M 233 -#define TEGRA210_CLK_CLK_M_DIV2 234 -#define TEGRA210_CLK_CLK_M_DIV4 235 +#define TEGRA210_CLK_OSC_DIV2 234 +#define TEGRA210_CLK_OSC_DIV4 235 #define TEGRA210_CLK_PLL_REF 236 #define TEGRA210_CLK_PLL_C 237 #define TEGRA210_CLK_PLL_C_OUT1 238 diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h index 3c90f1535551..907a8a04c280 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -194,8 +194,8 @@ #define TEGRA30_CLK_TVO 169 #define TEGRA30_CLK_CLK_32K 170 #define TEGRA30_CLK_CLK_M 171 -#define TEGRA30_CLK_CLK_M_DIV2 172 -#define TEGRA30_CLK_CLK_M_DIV4 173 +#define TEGRA30_CLK_OSC_DIV2 172 +#define TEGRA30_CLK_OSC_DIV4 173 #define TEGRA30_CLK_PLL_REF 174 #define TEGRA30_CLK_PLL_C 175 #define TEGRA30_CLK_PLL_C_OUT1 176 -- 2.7.4
next prev parent reply other threads:[~2019-12-20 22:26 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-20 22:26 [PATCH v5 00/19] Move PMC clocks into Tegra PMC driver Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni [this message] 2019-12-20 22:26 ` [PATCH v5 01/19] dt-bindings: clock: tegra: Change CLK_M_DIV to OSC_DIV clocks Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 02/19] clk: tegra: Change CLK_M_DIV clocks " Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 03/19] clk: tegra: Fix Tegra PMC clock out parents Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 04/19] dt-bindings: tegra: Convert Tegra PMC bindings to YAML Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-26 23:23 ` Rob Herring 2019-12-20 22:26 ` [PATCH v5 05/19] dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-26 23:24 ` Rob Herring 2019-12-26 23:24 ` Rob Herring 2019-12-20 22:26 ` [PATCH v5 06/19] soc: tegra: Add Tegra PMC clocks registration into PMC driver Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 07/19] dt-bindings: soc: tegra-pmc: Add id for Tegra PMC 32KHz blink clock Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-22 21:55 ` Dmitry Osipenko 2019-12-27 21:30 ` Sowjanya Komatineni 2019-12-27 21:30 ` Sowjanya Komatineni 2019-12-30 19:39 ` Dmitry Osipenko 2019-12-26 18:17 ` Rob Herring 2019-12-26 18:17 ` Rob Herring 2019-12-27 21:35 ` Sowjanya Komatineni 2019-12-27 21:35 ` Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 08/19] soc: tegra: Add support for " Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 09/19] clk: tegra: Remove tegra_pmc_clk_init along with clk ids Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 10/19] dt-bindings: clock: tegra: Remove pmc clock ids from clock dt-bindings Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:26 ` [PATCH v5 11/19] ASoC: tegra: Use device managed resource APIs to get the clock Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-22 21:14 ` Dmitry Osipenko 2019-12-20 22:26 ` [PATCH v5 12/19] ASoC: tegra: Add initial parent configuration for audio mclk Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-22 21:14 ` Dmitry Osipenko 2019-12-22 21:18 ` Dmitry Osipenko 2019-12-27 21:25 ` Sowjanya Komatineni 2019-12-27 21:25 ` Sowjanya Komatineni 2019-12-28 14:28 ` Dmitry Osipenko 2019-12-25 17:57 ` Mark Brown 2019-12-27 14:56 ` Dmitry Osipenko 2019-12-27 21:19 ` Sowjanya Komatineni 2019-12-27 21:19 ` Sowjanya Komatineni [not found] ` <b6ec6cfd-d883-ea28-00f8-884fa80cfee1@nvidia.com> 2020-01-02 16:12 ` Dmitry Osipenko [not found] ` <fb252096-e101-7d21-9717-c23607ae6edd@nvidia.com> 2020-01-05 1:05 ` Dmitry Osipenko 2020-01-05 5:03 ` Sowjanya Komatineni 2020-01-05 5:03 ` Sowjanya Komatineni 2020-01-06 4:21 ` Sameer Pujar 2020-01-06 4:21 ` Sameer Pujar 2020-01-06 16:09 ` Sowjanya Komatineni 2020-01-06 16:09 ` Sowjanya Komatineni [not found] ` <33eb0b3e-5605-3dfd-a6ea-a50ae1348c86@nvidia.com> 2020-01-06 22:59 ` Dmitry Osipenko 2019-12-27 22:48 ` Mark Brown 2019-12-20 22:26 ` [PATCH v5 13/19] ASoC: tegra: Add fallback implementation " Sowjanya Komatineni 2019-12-20 22:26 ` Sowjanya Komatineni 2019-12-20 22:27 ` [PATCH v5 14/19] clk: tegra: Remove audio related clock enables from init_table Sowjanya Komatineni 2019-12-20 22:27 ` Sowjanya Komatineni 2019-12-20 22:27 ` [PATCH v5 15/19] ARM: dts: tegra: Add clock-cells property to pmc Sowjanya Komatineni 2019-12-20 22:27 ` Sowjanya Komatineni 2019-12-20 22:27 ` [PATCH v5 16/19] arm64: tegra: Add clock-cells property to Tegra PMC node Sowjanya Komatineni 2019-12-20 22:27 ` Sowjanya Komatineni 2019-12-20 22:27 ` [PATCH v5 17/19] ARM: tegra: Update sound node clocks in device tree Sowjanya Komatineni 2019-12-20 22:27 ` Sowjanya Komatineni 2019-12-20 22:27 ` [PATCH v5 18/19] arm64: tegra: smaug: Change clk_out_2 provider to pmc Sowjanya Komatineni 2019-12-20 22:27 ` Sowjanya Komatineni 2019-12-22 22:00 ` Dmitry Osipenko 2019-12-27 21:32 ` Sowjanya Komatineni 2019-12-27 21:32 ` Sowjanya Komatineni 2019-12-20 22:27 ` [PATCH v5 19/19] ASoC: nau8825: change Tegra clk_out_2 provider from tegra_car " Sowjanya Komatineni 2019-12-20 22:27 ` Sowjanya Komatineni
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