[PATCH] x86/apic: mask IOAPIC entries when disable LAPIC

[PATCH] x86/apic: mask IOAPIC entries when disable LAPIC

[Tony W Wang-oc]

When system suspend to S1, LAPIC disabled via soft but some IOAPIC
entries are unmask like IOAPIC 0 pin 9 which is for acpi interrupt.
This state IOAPIC can response external interrupt, but the interrupt
message can not handled by LAPIC.

When wakeup system via keyboard/rtc, level triggered interrupt IOAPIC 0
pin 9 RTE's Remote IRR bit may be set to 1 but LAPIC does not send EOI
for it. So this Remote IRR bit will remain all the time. This cause the
following S1 suspend sequence failed because software lockup in
__synchronize_hardirq.

Mask IOAPIC entries when disable LAPIC to make IOAPIC completely quiet
when LAPIC disabled.

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
---
 arch/x86/kernel/apic/apic.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 28446fa..233239a 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2626,6 +2626,12 @@ static int lapic_suspend(void)
 #endif
 
 	local_irq_save(flags);
+
+	/*
+	 * Make IOAPIC quiet before disable LAPIC
+	 */
+	mask_ioapic_entries();
+
 	disable_local_APIC();
 
 	irq_remapping_disable();
-- 
2.7.4

[tip: x86/urgent] x86/apic: Mask IOAPIC entries when disabling the local APIC

[tip-bot2 for Tony W Wang-oc]

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     0f378d73d429d5f73fe2f00be4c9a15dbe9779ee
Gitweb:        https://git.kernel.org/tip/0f378d73d429d5f73fe2f00be4c9a15dbe9779ee
Author:        Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
AuthorDate:    Wed, 15 Jan 2020 16:22:19 +08:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Fri, 07 Feb 2020 15:32:16 +01:00

x86/apic: Mask IOAPIC entries when disabling the local APIC

When a system suspends, the local APIC is disabled in the suspend sequence,
but the IOAPIC is left in the current state. This means unmasked interrupt
lines stay unmasked. This is usually the case for IOAPIC pin 9 to which the
ACPI interrupt is connected.

That means that in suspended state the IOAPIC can respond to an external
interrupt, e.g. the wakeup via keyboard/RTC/ACPI, but the interrupt message
cannot be handled by the disabled local APIC. As a consequence the Remote
IRR bit is set, but the local APIC does not send an EOI to acknowledge
it. This causes the affected interrupt line to become stale and the stale
Remote IRR bit will cause a hang when __synchronize_hardirq() is invoked
for that interrupt line.

To prevent this, mask all IOAPIC entries before disabling the local
APIC. The resume code already has the unmask operation inside.

[ tglx: Massaged changelog ]

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/1579076539-7267-1-git-send-email-TonyWWang-oc@zhaoxin.com

---
 arch/x86/kernel/apic/apic.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 4b0f911..5f973fe 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2639,6 +2639,13 @@ static int lapic_suspend(void)
 #endif
 
 	local_irq_save(flags);
+
+	/*
+	 * Mask IOAPIC before disabling the local APIC to prevent stale IRR
+	 * entries on some implementations.
+	 */
+	mask_ioapic_entries();
+
 	disable_local_APIC();
 
 	irq_remapping_disable();