* [PATCH 00/10] Add devicetree features and fixes for UniPhier SoCs
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
This series adds new features that includes XDMAC for each SoC,
USB controller for Pro5, SPI for PXs3-ref, and thermal zone for PXs3.
And more, this adds ethernet aliases to determine device name assignments
and fixes for SCSSI clock/reset IDs and stabilization for ethernet.
Kunihiko Hayashi (10):
ARM: dts: uniphier: Add XDMAC node
arm64: dts: uniphier: Add XDMAC node
ARM: dts: uniphier: Add USB3 controller nodes for Pro5
arm64: dts: uniphier: Enable spi node for PXs3 reference board
arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone
for PXs3
ARM: dts: uniphier: Add ethernet aliases
arm64: dts: uniphier: Add ethernet aliases
ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channel
arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel
arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and
PXs3 ref board
arch/arm/boot/dts/uniphier-ld6b-ref.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-ace.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-ref.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-sanji.dts | 1 +
arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++
arch/arm/boot/dts/uniphier-pro5.dtsi | 160 ++++++++++++++++++++-
arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 1 +
arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 1 +
arch/arm/boot/dts/uniphier-pxs2.dtsi | 12 +-
.../boot/dts/socionext/uniphier-ld11-global.dts | 1 +
.../arm64/boot/dts/socionext/uniphier-ld11-ref.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 12 +-
.../boot/dts/socionext/uniphier-ld20-global.dts | 14 ++
.../arm64/boot/dts/socionext/uniphier-ld20-ref.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 20 ++-
.../arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 28 ++++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 55 ++++++-
17 files changed, 304 insertions(+), 14 deletions(-)
--
2.7.4
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^ permalink raw reply [flat|nested] 40+ messages in thread* [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Add external DMA controller support implemented in UniPhier SoCs.
This supports for Pro4, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
3 files changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 2ec04d7..a1bfe0f 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -426,6 +426,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pro4-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index ea3961f..ecab061 100644
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -408,6 +408,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pro5-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 13b0d4a..6e60154 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -508,6 +508,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pxs2-aidet";
reg = <0x5fc20000 0x200>;
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Add external DMA controller support implemented in UniPhier SoCs.
This supports for Pro4, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
3 files changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 2ec04d7..a1bfe0f 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -426,6 +426,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pro4-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index ea3961f..ecab061 100644
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -408,6 +408,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pro5-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 13b0d4a..6e60154 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -508,6 +508,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pxs2-aidet";
reg = <0x5fc20000 0x200>;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-14 2:14 ` Masahiro Yamada
-1 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-14 2:14 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> Add external DMA controller support implemented in UniPhier SoCs.
> This supports for Pro4, Pro5 and PXs2.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> 3 files changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> index 2ec04d7..a1bfe0f 100644
> --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> @@ -426,6 +426,14 @@
> };
> };
>
> + xdmac: dma-controller@5fc10000 {
> + compatible = "socionext,uniphier-xdmac";
> + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
This is odd.
<0x5fc20000 0x800> causes reg overwrap with
aidet@5fc20000 below.
> + interrupts = <0 188 4>;
> + dma-channels = <16>;
> + #dma-cells = <2>;
> + };
> +
> aidet: aidet@5fc20000 {
> compatible = "socionext,uniphier-pro4-aidet";
> reg = <0x5fc20000 0x200>;
> diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
> index ea3961f..ecab061 100644
> --- a/arch/arm/boot/dts/uniphier-pro5.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
> @@ -408,6 +408,14 @@
> };
> };
>
> + xdmac: dma-controller@5fc10000 {
> + compatible = "socionext,uniphier-xdmac";
> + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> + interrupts = <0 188 4>;
> + dma-channels = <16>;
> + #dma-cells = <2>;
> + };
> +
> aidet: aidet@5fc20000 {
> compatible = "socionext,uniphier-pro5-aidet";
> reg = <0x5fc20000 0x200>;
> diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> index 13b0d4a..6e60154 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> @@ -508,6 +508,14 @@
> };
> };
>
> + xdmac: dma-controller@5fc10000 {
> + compatible = "socionext,uniphier-xdmac";
> + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> + interrupts = <0 188 4>;
> + dma-channels = <16>;
> + #dma-cells = <2>;
> + };
> +
> aidet: aidet@5fc20000 {
> compatible = "socionext,uniphier-pxs2-aidet";
> reg = <0x5fc20000 0x200>;
> --
> 2.7.4
>
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
@ 2020-03-14 2:14 ` Masahiro Yamada
0 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-14 2:14 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> Add external DMA controller support implemented in UniPhier SoCs.
> This supports for Pro4, Pro5 and PXs2.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> 3 files changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> index 2ec04d7..a1bfe0f 100644
> --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> @@ -426,6 +426,14 @@
> };
> };
>
> + xdmac: dma-controller@5fc10000 {
> + compatible = "socionext,uniphier-xdmac";
> + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
This is odd.
<0x5fc20000 0x800> causes reg overwrap with
aidet@5fc20000 below.
> + interrupts = <0 188 4>;
> + dma-channels = <16>;
> + #dma-cells = <2>;
> + };
> +
> aidet: aidet@5fc20000 {
> compatible = "socionext,uniphier-pro4-aidet";
> reg = <0x5fc20000 0x200>;
> diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
> index ea3961f..ecab061 100644
> --- a/arch/arm/boot/dts/uniphier-pro5.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
> @@ -408,6 +408,14 @@
> };
> };
>
> + xdmac: dma-controller@5fc10000 {
> + compatible = "socionext,uniphier-xdmac";
> + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> + interrupts = <0 188 4>;
> + dma-channels = <16>;
> + #dma-cells = <2>;
> + };
> +
> aidet: aidet@5fc20000 {
> compatible = "socionext,uniphier-pro5-aidet";
> reg = <0x5fc20000 0x200>;
> diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> index 13b0d4a..6e60154 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> @@ -508,6 +508,14 @@
> };
> };
>
> + xdmac: dma-controller@5fc10000 {
> + compatible = "socionext,uniphier-xdmac";
> + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> + interrupts = <0 188 4>;
> + dma-channels = <16>;
> + #dma-cells = <2>;
> + };
> +
> aidet: aidet@5fc20000 {
> compatible = "socionext,uniphier-pxs2-aidet";
> reg = <0x5fc20000 0x200>;
> --
> 2.7.4
>
--
Best Regards
Masahiro Yamada
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
2020-03-14 2:14 ` Masahiro Yamada
@ 2020-03-16 10:43 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-16 10:43 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Sat, 14 Mar 2020 11:14:09 +0900 <yamada.masahiro@socionext.com> wrote:
> On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > Add external DMA controller support implemented in UniPhier SoCs.
> > This supports for Pro4, Pro5 and PXs2.
> >
> > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> > ---
> > arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> > arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> > arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> > 3 files changed, 24 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > index 2ec04d7..a1bfe0f 100644
> > --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> > +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > @@ -426,6 +426,14 @@
> > };
> > };
> >
> > + xdmac: dma-controller@5fc10000 {
> > + compatible = "socionext,uniphier-xdmac";
> > + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
>
>
>
> This is odd.
> <0x5fc20000 0x800> causes reg overwrap with
> aidet@5fc20000 below.
Thank you for pointing out.
Indeed, the address is wrong. I'll fix it.
And I'll also fix the example of dt-bindings.
Thank you,
---
Best Regards,
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
@ 2020-03-16 10:43 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-16 10:43 UTC (permalink / raw)
To: Masahiro Yamada
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Sat, 14 Mar 2020 11:14:09 +0900 <yamada.masahiro@socionext.com> wrote:
> On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > Add external DMA controller support implemented in UniPhier SoCs.
> > This supports for Pro4, Pro5 and PXs2.
> >
> > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> > ---
> > arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> > arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> > arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> > 3 files changed, 24 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > index 2ec04d7..a1bfe0f 100644
> > --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> > +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > @@ -426,6 +426,14 @@
> > };
> > };
> >
> > + xdmac: dma-controller@5fc10000 {
> > + compatible = "socionext,uniphier-xdmac";
> > + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
>
>
>
> This is odd.
> <0x5fc20000 0x800> causes reg overwrap with
> aidet@5fc20000 below.
Thank you for pointing out.
Indeed, the address is wrong. I'll fix it.
And I'll also fix the example of dt-bindings.
Thank you,
---
Best Regards,
Kunihiko Hayashi
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
2020-03-16 10:43 ` Kunihiko Hayashi
@ 2020-03-16 12:06 ` Masahiro Yamada
-1 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 12:06 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Mon, Mar 16, 2020 at 7:43 PM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> On Sat, 14 Mar 2020 11:14:09 +0900 <yamada.masahiro@socionext.com> wrote:
>
> > On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> > <hayashi.kunihiko@socionext.com> wrote:
> > >
> > > Add external DMA controller support implemented in UniPhier SoCs.
> > > This supports for Pro4, Pro5 and PXs2.
> > >
> > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> > > ---
> > > arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> > > arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> > > arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> > > 3 files changed, 24 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > index 2ec04d7..a1bfe0f 100644
> > > --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > @@ -426,6 +426,14 @@
> > > };
> > > };
> > >
> > > + xdmac: dma-controller@5fc10000 {
> > > + compatible = "socionext,uniphier-xdmac";
> > > + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> >
> >
> >
> > This is odd.
> > <0x5fc20000 0x800> causes reg overwrap with
> > aidet@5fc20000 below.
>
> Thank you for pointing out.
>
> Indeed, the address is wrong. I'll fix it.
> And I'll also fix the example of dt-bindings.
>
> Thank you,
You did not notice the over-wrap
because the second region is not used
from the driver.
Why did you define the unused region?
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
@ 2020-03-16 12:06 ` Masahiro Yamada
0 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 12:06 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Mon, Mar 16, 2020 at 7:43 PM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> On Sat, 14 Mar 2020 11:14:09 +0900 <yamada.masahiro@socionext.com> wrote:
>
> > On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> > <hayashi.kunihiko@socionext.com> wrote:
> > >
> > > Add external DMA controller support implemented in UniPhier SoCs.
> > > This supports for Pro4, Pro5 and PXs2.
> > >
> > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> > > ---
> > > arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> > > arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> > > arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> > > 3 files changed, 24 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > index 2ec04d7..a1bfe0f 100644
> > > --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > @@ -426,6 +426,14 @@
> > > };
> > > };
> > >
> > > + xdmac: dma-controller@5fc10000 {
> > > + compatible = "socionext,uniphier-xdmac";
> > > + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> >
> >
> >
> > This is odd.
> > <0x5fc20000 0x800> causes reg overwrap with
> > aidet@5fc20000 below.
>
> Thank you for pointing out.
>
> Indeed, the address is wrong. I'll fix it.
> And I'll also fix the example of dt-bindings.
>
> Thank you,
You did not notice the over-wrap
because the second region is not used
from the driver.
Why did you define the unused region?
--
Best Regards
Masahiro Yamada
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
2020-03-16 12:06 ` Masahiro Yamada
@ 2020-03-17 11:09 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-17 11:09 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Mon, 16 Mar 2020 21:06:40 +0900 <masahiroy@kernel.org> wrote:
> On Mon, Mar 16, 2020 at 7:43 PM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > On Sat, 14 Mar 2020 11:14:09 +0900 <yamada.masahiro@socionext.com> wrote:
> >
> > > On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> > > <hayashi.kunihiko@socionext.com> wrote:
> > > >
> > > > Add external DMA controller support implemented in UniPhier SoCs.
> > > > This supports for Pro4, Pro5 and PXs2.
> > > >
> > > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> > > > ---
> > > > arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> > > > arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> > > > arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> > > > 3 files changed, 24 insertions(+)
> > > >
> > > > diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > > index 2ec04d7..a1bfe0f 100644
> > > > --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > > +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > > @@ -426,6 +426,14 @@
> > > > };
> > > > };
> > > >
> > > > + xdmac: dma-controller@5fc10000 {
> > > > + compatible = "socionext,uniphier-xdmac";
> > > > + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> > >
> > >
> > >
> > > This is odd.
> > > <0x5fc20000 0x800> causes reg overwrap with
> > > aidet@5fc20000 below.
> >
> > Thank you for pointing out.
> >
> > Indeed, the address is wrong. I'll fix it.
> > And I'll also fix the example of dt-bindings.
> >
> > Thank you,
>
>
>
> You did not notice the over-wrap
> because the second region is not used
> from the driver.
>
> Why did you define the unused region?
There is an extention register area for xdmac, however, the current driver
doesn't have any features using this area.
The description of the area will be suppressed until some features that uses
the area are implemented.
Thank you,
---
Best Regards,
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 01/10] ARM: dts: uniphier: Add XDMAC node
@ 2020-03-17 11:09 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-17 11:09 UTC (permalink / raw)
To: Masahiro Yamada
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Mon, 16 Mar 2020 21:06:40 +0900 <masahiroy@kernel.org> wrote:
> On Mon, Mar 16, 2020 at 7:43 PM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > On Sat, 14 Mar 2020 11:14:09 +0900 <yamada.masahiro@socionext.com> wrote:
> >
> > > On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> > > <hayashi.kunihiko@socionext.com> wrote:
> > > >
> > > > Add external DMA controller support implemented in UniPhier SoCs.
> > > > This supports for Pro4, Pro5 and PXs2.
> > > >
> > > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> > > > ---
> > > > arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++++++++
> > > > arch/arm/boot/dts/uniphier-pro5.dtsi | 8 ++++++++
> > > > arch/arm/boot/dts/uniphier-pxs2.dtsi | 8 ++++++++
> > > > 3 files changed, 24 insertions(+)
> > > >
> > > > diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > > index 2ec04d7..a1bfe0f 100644
> > > > --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > > +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> > > > @@ -426,6 +426,14 @@
> > > > };
> > > > };
> > > >
> > > > + xdmac: dma-controller@5fc10000 {
> > > > + compatible = "socionext,uniphier-xdmac";
> > > > + reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
> > >
> > >
> > >
> > > This is odd.
> > > <0x5fc20000 0x800> causes reg overwrap with
> > > aidet@5fc20000 below.
> >
> > Thank you for pointing out.
> >
> > Indeed, the address is wrong. I'll fix it.
> > And I'll also fix the example of dt-bindings.
> >
> > Thank you,
>
>
>
> You did not notice the over-wrap
> because the second region is not used
> from the driver.
>
> Why did you define the unused region?
There is an extention register area for xdmac, however, the current driver
doesn't have any features using this area.
The description of the area will be suppressed until some features that uses
the area are implemented.
Thank you,
---
Best Regards,
Kunihiko Hayashi
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 02/10] arm64: dts: uniphier: Add XDMAC node
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 8 ++++++++
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 8 ++++++++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 8 ++++++++
3 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5b18bda..5aeb3cc 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -566,6 +566,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-ld11-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index f2dc5f6..c2868d8 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -664,6 +664,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-ld20-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 73e7e12..ffe57c6 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -462,6 +462,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pxs3-aidet";
reg = <0x5fc20000 0x200>;
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 02/10] arm64: dts: uniphier: Add XDMAC node
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 8 ++++++++
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 8 ++++++++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 8 ++++++++
3 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5b18bda..5aeb3cc 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -566,6 +566,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-ld11-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index f2dc5f6..c2868d8 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -664,6 +664,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-ld20-aidet";
reg = <0x5fc20000 0x200>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 73e7e12..ffe57c6 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -462,6 +462,14 @@
};
};
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ dma-channels = <16>;
+ #dma-cells = <2>;
+ };
+
aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pxs3-aidet";
reg = <0x5fc20000 0x200>;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 03/10] ARM: dts: uniphier: Add USB3 controller nodes for Pro5
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Add USB3 controller nodes for Pro5 SoC and the boards.
Pro5 SoC has 2 controllers. USB0 includes 1 SS-PHY and 1 HS-PHY, and USB1
includes 1 SS-PHY and 2 HS-PHY.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro5.dtsi | 148 +++++++++++++++++++++++++++++++++++
1 file changed, 148 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index ecab061..fe8d306 100644
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -461,6 +461,154 @@
};
};
+ usb0: usb@65a00000 {
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+ status = "disabled";
+ reg = <0x65a00000 0xcd00>;
+ interrupt-names = "host";
+ interrupts = <0 134 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ clock-names = "ref", "bus_early", "suspend";
+ clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+ resets = <&usb0_rst 15>;
+ phys = <&usb0_hsphy0>, <&usb0_ssphy0>;
+ dr_mode = "host";
+ };
+
+ usb-glue@65b00000 {
+ compatible = "socionext,uniphier-pro5-dwc3-glue",
+ "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x65b00000 0x400>;
+
+ usb0_rst: reset@0 {
+ compatible = "socionext,uniphier-pro5-usb3-reset";
+ reg = <0x0 0x4>;
+ #reset-cells = <1>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ };
+
+ usb0_vbus0: regulator@100 {
+ compatible = "socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x100 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ };
+
+ usb0_hsphy0: hs-phy@280 {
+ compatible = "socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x280 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ vbus-supply = <&usb0_vbus0>;
+ };
+
+ usb0_ssphy0: ss-phy@380 {
+ compatible = "socionext,uniphier-pro5-usb3-ssphy";
+ reg = <0x380 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ vbus-supply = <&usb0_vbus0>;
+ };
+ };
+
+ usb1: usb@65c00000 {
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+ status = "disabled";
+ reg = <0x65c00000 0xcd00>;
+ interrupt-names = "host";
+ interrupts = <0 137 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
+ clock-names = "ref", "bus_early", "suspend";
+ clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+ resets = <&usb1_rst 15>;
+ phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>;
+ dr_mode = "host";
+ };
+
+ usb-glue@65d00000 {
+ compatible = "socionext,uniphier-pro5-dwc3-glue",
+ "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x65d00000 0x400>;
+
+ usb1_rst: reset@0 {
+ compatible = "socionext,uniphier-pro5-usb3-reset";
+ reg = <0x0 0x4>;
+ #reset-cells = <1>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_vbus0: regulator@100 {
+ compatible = "socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x100 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_vbus1: regulator@110 {
+ compatible = "socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x110 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_hsphy0: hs-phy@280 {
+ compatible = "socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x280 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus0>;
+ };
+
+ usb1_hsphy1: hs-phy@290 {
+ compatible = "socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x290 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus1>;
+ };
+
+ usb1_ssphy0: ss-phy@380 {
+ compatible = "socionext,uniphier-pro5-usb3-ssphy";
+ reg = <0x380 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus0>;
+ };
+ };
+
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 03/10] ARM: dts: uniphier: Add USB3 controller nodes for Pro5
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Add USB3 controller nodes for Pro5 SoC and the boards.
Pro5 SoC has 2 controllers. USB0 includes 1 SS-PHY and 1 HS-PHY, and USB1
includes 1 SS-PHY and 2 HS-PHY.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro5.dtsi | 148 +++++++++++++++++++++++++++++++++++
1 file changed, 148 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index ecab061..fe8d306 100644
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -461,6 +461,154 @@
};
};
+ usb0: usb@65a00000 {
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+ status = "disabled";
+ reg = <0x65a00000 0xcd00>;
+ interrupt-names = "host";
+ interrupts = <0 134 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ clock-names = "ref", "bus_early", "suspend";
+ clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+ resets = <&usb0_rst 15>;
+ phys = <&usb0_hsphy0>, <&usb0_ssphy0>;
+ dr_mode = "host";
+ };
+
+ usb-glue@65b00000 {
+ compatible = "socionext,uniphier-pro5-dwc3-glue",
+ "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x65b00000 0x400>;
+
+ usb0_rst: reset@0 {
+ compatible = "socionext,uniphier-pro5-usb3-reset";
+ reg = <0x0 0x4>;
+ #reset-cells = <1>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ };
+
+ usb0_vbus0: regulator@100 {
+ compatible = "socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x100 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ };
+
+ usb0_hsphy0: hs-phy@280 {
+ compatible = "socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x280 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ vbus-supply = <&usb0_vbus0>;
+ };
+
+ usb0_ssphy0: ss-phy@380 {
+ compatible = "socionext,uniphier-pro5-usb3-ssphy";
+ reg = <0x380 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ vbus-supply = <&usb0_vbus0>;
+ };
+ };
+
+ usb1: usb@65c00000 {
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+ status = "disabled";
+ reg = <0x65c00000 0xcd00>;
+ interrupt-names = "host";
+ interrupts = <0 137 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
+ clock-names = "ref", "bus_early", "suspend";
+ clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+ resets = <&usb1_rst 15>;
+ phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>;
+ dr_mode = "host";
+ };
+
+ usb-glue@65d00000 {
+ compatible = "socionext,uniphier-pro5-dwc3-glue",
+ "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x65d00000 0x400>;
+
+ usb1_rst: reset@0 {
+ compatible = "socionext,uniphier-pro5-usb3-reset";
+ reg = <0x0 0x4>;
+ #reset-cells = <1>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_vbus0: regulator@100 {
+ compatible = "socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x100 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_vbus1: regulator@110 {
+ compatible = "socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x110 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_hsphy0: hs-phy@280 {
+ compatible = "socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x280 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus0>;
+ };
+
+ usb1_hsphy1: hs-phy@290 {
+ compatible = "socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x290 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus1>;
+ };
+
+ usb1_ssphy0: ss-phy@380 {
+ compatible = "socionext,uniphier-pro5-usb3-ssphy";
+ reg = <0x380 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus0>;
+ };
+ };
+
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 04/10] arm64: dts: uniphier: Enable spi node for PXs3 reference board
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
PXs3 reference board has 2 spi connectors. This enables spi0 and spi1,
and add aliases properties for each spi to determine device name
assignments.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index 754315b..d887835 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -27,6 +27,8 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c6 = &i2c6;
+ spi0 = &spi0;
+ spi1 = &spi1;
};
memory@80000000 {
@@ -75,6 +77,14 @@
status = "okay";
};
+&spi0 {
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+};
+
&sd {
status = "okay";
};
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 04/10] arm64: dts: uniphier: Enable spi node for PXs3 reference board
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
PXs3 reference board has 2 spi connectors. This enables spi0 and spi1,
and add aliases properties for each spi to determine device name
assignments.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index 754315b..d887835 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -27,6 +27,8 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c6 = &i2c6;
+ spi0 = &spi0;
+ spi1 = &spi1;
};
memory@80000000 {
@@ -75,6 +77,14 @@
status = "okay";
};
+&spi0 {
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+};
+
&sd {
status = "okay";
};
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 05/10] arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone for PXs3
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Add nodes of thermal monitor and thermal zone for UniPhier PXs3 SoC.
The thermal monitor node is included in sysctrl. This patch gives the
default value for PXs3 in the same way as LD20.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 43 ++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index ffe57c6..0d4283c 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "socionext,uniphier-pxs3";
@@ -42,6 +43,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -51,6 +53,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -60,6 +63,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -69,6 +73,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
};
@@ -136,6 +141,37 @@
<1 10 4>;
};
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <250>; /* 250ms */
+ polling-delay = <1000>; /* 1000ms */
+ thermal-sensors = <&pvtctl>;
+
+ trips {
+ cpu_crit: cpu-crit {
+ temperature = <110000>; /* 110C */
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ cpu_alert: cpu-alert {
+ temperature = <100000>; /* 100C */
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -504,6 +540,13 @@
watchdog {
compatible = "socionext,uniphier-wdt";
};
+
+ pvtctl: pvtctl {
+ compatible = "socionext,uniphier-pxs3-thermal";
+ interrupts = <0 3 4>;
+ #thermal-sensor-cells = <0>;
+ socionext,tmod-calibration = <0x0f22 0x68ee>;
+ };
};
eth0: ethernet@65000000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 05/10] arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone for PXs3
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Add nodes of thermal monitor and thermal zone for UniPhier PXs3 SoC.
The thermal monitor node is included in sysctrl. This patch gives the
default value for PXs3 in the same way as LD20.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 43 ++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index ffe57c6..0d4283c 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "socionext,uniphier-pxs3";
@@ -42,6 +43,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -51,6 +53,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -60,6 +63,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -69,6 +73,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
};
@@ -136,6 +141,37 @@
<1 10 4>;
};
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <250>; /* 250ms */
+ polling-delay = <1000>; /* 1000ms */
+ thermal-sensors = <&pvtctl>;
+
+ trips {
+ cpu_crit: cpu-crit {
+ temperature = <110000>; /* 110C */
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ cpu_alert: cpu-alert {
+ temperature = <100000>; /* 100C */
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -504,6 +540,13 @@
watchdog {
compatible = "socionext,uniphier-wdt";
};
+
+ pvtctl: pvtctl {
+ compatible = "socionext,uniphier-pxs3-thermal";
+ interrupts = <0 3 4>;
+ #thermal-sensor-cells = <0>;
+ socionext,tmod-calibration = <0x0f22 0x68ee>;
+ };
};
eth0: ethernet@65000000 {
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 06/10] ARM: dts: uniphier: Add ethernet aliases
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Add an aliases property for ethernet to determine device name assignments.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-ld6b-ref.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-ace.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-ref.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-sanji.dts | 1 +
arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 1 +
arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 1 +
6 files changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
index 60994b6..079cadc 100644
--- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
@@ -29,6 +29,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/uniphier-pro4-ace.dts
index 92cc48d..64246fa 100644
--- a/arch/arm/boot/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts
@@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts
index 854f2eb..181442c 100644
--- a/arch/arm/boot/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts
@@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
index dda1a2f..5396556 100644
--- a/arch/arm/boot/dts/uniphier-pro4-sanji.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
@@ -25,6 +25,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
index e27fd4f..8e9ac57 100644
--- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
@@ -26,6 +26,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
index 23fe42b..8eacc7b 100644
--- a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
@@ -24,6 +24,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 06/10] ARM: dts: uniphier: Add ethernet aliases
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Add an aliases property for ethernet to determine device name assignments.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-ld6b-ref.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-ace.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-ref.dts | 1 +
arch/arm/boot/dts/uniphier-pro4-sanji.dts | 1 +
arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 1 +
arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 1 +
6 files changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
index 60994b6..079cadc 100644
--- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
@@ -29,6 +29,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/uniphier-pro4-ace.dts
index 92cc48d..64246fa 100644
--- a/arch/arm/boot/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts
@@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts
index 854f2eb..181442c 100644
--- a/arch/arm/boot/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts
@@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
index dda1a2f..5396556 100644
--- a/arch/arm/boot/dts/uniphier-pro4-sanji.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
@@ -25,6 +25,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
index e27fd4f..8e9ac57 100644
--- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
@@ -26,6 +26,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
index 23fe42b..8eacc7b 100644
--- a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
@@ -24,6 +24,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread* Re: [PATCH 06/10] ARM: dts: uniphier: Add ethernet aliases
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-16 12:31 ` Masahiro Yamada
-1 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 12:31 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> Add an aliases property for ethernet to determine device name assignments.
There is no call-site of of_alias_get_*() for this device.
Why don't you describe the reason correctly?
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> arch/arm/boot/dts/uniphier-ld6b-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ace.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-sanji.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 1 +
> 6 files changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
> index 60994b6..079cadc 100644
> --- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts
> +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
> @@ -29,6 +29,7 @@
> i2c4 = &i2c4;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/uniphier-pro4-ace.dts
> index 92cc48d..64246fa 100644
> --- a/arch/arm/boot/dts/uniphier-pro4-ace.dts
> +++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts
> @@ -26,6 +26,7 @@
> i2c3 = &i2c3;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts
> index 854f2eb..181442c 100644
> --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts
> +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts
> @@ -29,6 +29,7 @@
> i2c3 = &i2c3;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
> index dda1a2f..5396556 100644
> --- a/arch/arm/boot/dts/uniphier-pro4-sanji.dts
> +++ b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
> @@ -25,6 +25,7 @@
> i2c3 = &i2c3;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
> index e27fd4f..8e9ac57 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
> +++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
> @@ -26,6 +26,7 @@
> i2c4 = &i2c4;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
> index 23fe42b..8eacc7b 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
> +++ b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
> @@ -24,6 +24,7 @@
> i2c4 = &i2c4;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> --
> 2.7.4
>
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 06/10] ARM: dts: uniphier: Add ethernet aliases
@ 2020-03-16 12:31 ` Masahiro Yamada
0 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 12:31 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> Add an aliases property for ethernet to determine device name assignments.
There is no call-site of of_alias_get_*() for this device.
Why don't you describe the reason correctly?
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> arch/arm/boot/dts/uniphier-ld6b-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ace.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-sanji.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 1 +
> 6 files changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
> index 60994b6..079cadc 100644
> --- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts
> +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
> @@ -29,6 +29,7 @@
> i2c4 = &i2c4;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/uniphier-pro4-ace.dts
> index 92cc48d..64246fa 100644
> --- a/arch/arm/boot/dts/uniphier-pro4-ace.dts
> +++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts
> @@ -26,6 +26,7 @@
> i2c3 = &i2c3;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts
> index 854f2eb..181442c 100644
> --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts
> +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts
> @@ -29,6 +29,7 @@
> i2c3 = &i2c3;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
> index dda1a2f..5396556 100644
> --- a/arch/arm/boot/dts/uniphier-pro4-sanji.dts
> +++ b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
> @@ -25,6 +25,7 @@
> i2c3 = &i2c3;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
> index e27fd4f..8e9ac57 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
> +++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
> @@ -26,6 +26,7 @@
> i2c4 = &i2c4;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> diff --git a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
> index 23fe42b..8eacc7b 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
> +++ b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
> @@ -24,6 +24,7 @@
> i2c4 = &i2c4;
> i2c5 = &i2c5;
> i2c6 = &i2c6;
> + ethernet0 = ð
> };
>
> memory@80000000 {
> --
> 2.7.4
>
--
Best Regards
Masahiro Yamada
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread* Re: [PATCH 06/10] ARM: dts: uniphier: Add ethernet aliases
2020-03-16 12:31 ` Masahiro Yamada
@ 2020-03-17 11:09 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-17 11:09 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Mon, 16 Mar 2020 21:31:02 +0900 <masahiroy@kernel.org> wrote:
> On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > Add an aliases property for ethernet to determine device name assignments.
>
>
> There is no call-site of of_alias_get_*() for this device.
>
> Why don't you describe the reason correctly?
I thought that defining aliases automatically assigned the device name,
but I found the driver needed to manage the aliases.
In case of booting up the kernel from U-boot, the ethernet alias of
the devicetree is referred by U-boot, and mac-address in an aliased
ethernet node inherits that of U-boot.
I'll correctly rewriten the reason next.
Thank you,
---
Best Regards,
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 06/10] ARM: dts: uniphier: Add ethernet aliases
@ 2020-03-17 11:09 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-17 11:09 UTC (permalink / raw)
To: Masahiro Yamada
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Mon, 16 Mar 2020 21:31:02 +0900 <masahiroy@kernel.org> wrote:
> On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > Add an aliases property for ethernet to determine device name assignments.
>
>
> There is no call-site of of_alias_get_*() for this device.
>
> Why don't you describe the reason correctly?
I thought that defining aliases automatically assigned the device name,
but I found the driver needed to manage the aliases.
In case of booting up the kernel from U-boot, the ethernet alias of
the devicetree is referred by U-boot, and mac-address in an aliased
ethernet node inherits that of U-boot.
I'll correctly rewriten the reason next.
Thank you,
---
Best Regards,
Kunihiko Hayashi
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 07/10] arm64: dts: uniphier: Add ethernet aliases
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Add an aliases property for ethernet to determine device name assignments.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 2 ++
5 files changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
index f72f048..816ac25 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
@@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
index b8f6273..693171f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
@@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
index 9ca692e..2c00008 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
@@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
index 406244a..eeb976e 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
@@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index d887835..fcab6d1 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -29,6 +29,8 @@
i2c6 = &i2c6;
spi0 = &spi0;
spi1 = &spi1;
+ ethernet0 = ð0;
+ ethernet1 = ð1;
};
memory@80000000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 07/10] arm64: dts: uniphier: Add ethernet aliases
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Add an aliases property for ethernet to determine device name assignments.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts | 1 +
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 2 ++
5 files changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
index f72f048..816ac25 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
@@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
index b8f6273..693171f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
@@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
index 9ca692e..2c00008 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
@@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
index 406244a..eeb976e 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
@@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ ethernet0 = ð
};
memory@80000000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index d887835..fcab6d1 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -29,6 +29,8 @@
i2c6 = &i2c6;
spi0 = &spi0;
spi1 = &spi1;
+ ethernet0 = ð0;
+ ethernet1 = ð1;
};
memory@80000000 {
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 08/10] ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channel
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.
Pro5 and PXs2 are affected by this fix, but the SCSSI clock gate of Pro5 is
common to all channels.
Fixes: 92fa4f4cc2cd ("ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro5.dtsi | 4 ++--
arch/arm/boot/dts/uniphier-pxs2.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index fe8d306..d2256a3 100644
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -174,8 +174,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 11>; /* common with spi0 */
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 6e60154..267ff82 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -187,8 +187,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 08/10] ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channel
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.
Pro5 and PXs2 are affected by this fix, but the SCSSI clock gate of Pro5 is
common to all channels.
Fixes: 92fa4f4cc2cd ("ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro5.dtsi | 4 ++--
arch/arm/boot/dts/uniphier-pxs2.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index fe8d306..d2256a3 100644
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -174,8 +174,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 11>; /* common with spi0 */
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 6e60154..267ff82 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -187,8 +187,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 09/10] arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.
Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 4 ++--
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 12 ++++++------
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5aeb3cc..cd6e159 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -143,8 +143,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index c2868d8..794c0d2 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -248,8 +248,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
spi2: spi@54006200 {
@@ -259,8 +259,8 @@
interrupts = <0 229 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 13>;
+ resets = <&peri_rst 13>;
};
spi3: spi@54006300 {
@@ -270,8 +270,8 @@
interrupts = <0 230 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi3>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 14>;
+ resets = <&peri_rst 14>;
};
serial0: serial@54006800 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 0d4283c..a365fc4 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -207,8 +207,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 09/10] arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.
Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 4 ++--
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 12 ++++++------
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5aeb3cc..cd6e159 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -143,8 +143,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index c2868d8..794c0d2 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -248,8 +248,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
spi2: spi@54006200 {
@@ -259,8 +259,8 @@
interrupts = <0 229 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 13>;
+ resets = <&peri_rst 13>;
};
spi3: spi@54006300 {
@@ -270,8 +270,8 @@
interrupts = <0 230 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi3>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 14>;
+ resets = <&peri_rst 14>;
};
serial0: serial@54006800 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 0d4283c..a365fc4 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -207,8 +207,8 @@
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
- clocks = <&peri_clk 11>;
- resets = <&peri_rst 11>;
+ clocks = <&peri_clk 12>;
+ resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 10/10] arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and PXs3 ref board
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-13 0:58 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, linux-arm-kernel, Masami Hiramatsu, Jassi Brar,
Kunihiko Hayashi
The RGMII PHY needs to change drive-strength properties of the Ethernet
Tx pins to stabilize the PHY.
The devicetree for LD20 global board specifies RMII PHY in the ethernet
node as default, however, there is also another board that has RGMII PHY.
The devicetree for the board doesn't exist, so the users should change
the ethernet properties by outside way.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts | 13 +++++++++++++
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 16 ++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
index 2c00008..89b133f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
@@ -146,6 +146,19 @@
};
};
+&pinctrl_ether_rgmii {
+ tx {
+ pins = "RGMII_TXD0", "RGMII_TXD1", "RGMII_TXD2",
+ "RGMII_TXD3", "RGMII_TXCTL";
+ drive-strength = <12>;
+ };
+
+ txclk {
+ pins = "RGMII_TXCLK";
+ drive-strength = <9>;
+ };
+};
+
&usb {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index fcab6d1..d74a6c6 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -132,3 +132,19 @@
reg = <0>;
};
};
+
+&pinctrl_ether_rgmii {
+ tx {
+ pins = "RGMII0_TXCLK", "RGMII0_TXD0", "RGMII0_TXD1",
+ "RGMII0_TXD2", "RGMII0_TXD3", "RGMII0_TXCTL";
+ drive-strength = <9>;
+ };
+};
+
+&pinctrl_ether1_rgmii {
+ tx {
+ pins = "RGMII1_TXCLK", "RGMII1_TXD0", "RGMII1_TXD1",
+ "RGMII1_TXD2", "RGMII1_TXD3", "RGMII1_TXCTL";
+ drive-strength = <9>;
+ };
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 40+ messages in thread* [PATCH 10/10] arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and PXs3 ref board
@ 2020-03-13 0:58 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-13 0:58 UTC (permalink / raw)
To: Masahiro Yamada, Rob Herring
Cc: devicetree, Kunihiko Hayashi, Masami Hiramatsu, linux-arm-kernel,
Jassi Brar
The RGMII PHY needs to change drive-strength properties of the Ethernet
Tx pins to stabilize the PHY.
The devicetree for LD20 global board specifies RMII PHY in the ethernet
node as default, however, there is also another board that has RGMII PHY.
The devicetree for the board doesn't exist, so the users should change
the ethernet properties by outside way.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts | 13 +++++++++++++
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 16 ++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
index 2c00008..89b133f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
@@ -146,6 +146,19 @@
};
};
+&pinctrl_ether_rgmii {
+ tx {
+ pins = "RGMII_TXD0", "RGMII_TXD1", "RGMII_TXD2",
+ "RGMII_TXD3", "RGMII_TXCTL";
+ drive-strength = <12>;
+ };
+
+ txclk {
+ pins = "RGMII_TXCLK";
+ drive-strength = <9>;
+ };
+};
+
&usb {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index fcab6d1..d74a6c6 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -132,3 +132,19 @@
reg = <0>;
};
};
+
+&pinctrl_ether_rgmii {
+ tx {
+ pins = "RGMII0_TXCLK", "RGMII0_TXD0", "RGMII0_TXD1",
+ "RGMII0_TXD2", "RGMII0_TXD3", "RGMII0_TXCTL";
+ drive-strength = <9>;
+ };
+};
+
+&pinctrl_ether1_rgmii {
+ tx {
+ pins = "RGMII1_TXCLK", "RGMII1_TXD0", "RGMII1_TXD1",
+ "RGMII1_TXD2", "RGMII1_TXD3", "RGMII1_TXCTL";
+ drive-strength = <9>;
+ };
+};
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 40+ messages in thread* Re: [PATCH 10/10] arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and PXs3 ref board
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-16 12:55 ` Masahiro Yamada
-1 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 12:55 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> The RGMII PHY needs to change drive-strength properties of the Ethernet
> Tx pins to stabilize the PHY.
>
> The devicetree for LD20 global board specifies RMII PHY in the ethernet
> node as default, however, there is also another board that has RGMII PHY.
> The devicetree for the board doesn't exist, so the users should change
> the ethernet properties by outside way.
Probably, users should change pinctrl_ether_rgmii
by the same means.
The change to uniphier-pxs3-ref.dts looks OK to me.
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 10/10] arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and PXs3 ref board
@ 2020-03-16 12:55 ` Masahiro Yamada
0 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 12:55 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> The RGMII PHY needs to change drive-strength properties of the Ethernet
> Tx pins to stabilize the PHY.
>
> The devicetree for LD20 global board specifies RMII PHY in the ethernet
> node as default, however, there is also another board that has RGMII PHY.
> The devicetree for the board doesn't exist, so the users should change
> the ethernet properties by outside way.
Probably, users should change pinctrl_ether_rgmii
by the same means.
The change to uniphier-pxs3-ref.dts looks OK to me.
--
Best Regards
Masahiro Yamada
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 10/10] arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and PXs3 ref board
2020-03-16 12:55 ` Masahiro Yamada
@ 2020-03-17 11:09 ` Kunihiko Hayashi
-1 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-17 11:09 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Mon, 16 Mar 2020 21:55:09 +0900 <masahiroy@kernel.org> wrote:
> On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > The RGMII PHY needs to change drive-strength properties of the Ethernet
> > Tx pins to stabilize the PHY.
> >
> > The devicetree for LD20 global board specifies RMII PHY in the ethernet
> > node as default, however, there is also another board that has RGMII PHY.
> > The devicetree for the board doesn't exist, so the users should change
> > the ethernet properties by outside way.
>
> Probably, users should change pinctrl_ether_rgmii
> by the same means.
I think that it's reasonable to have a devicetree for another board with
RGMII PHY.
> The change to uniphier-pxs3-ref.dts looks OK to me.
I'll split this patch for uniphier-pxs3-ref.dts.
Thank you,
---
Best Regards,
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 10/10] arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and PXs3 ref board
@ 2020-03-17 11:09 ` Kunihiko Hayashi
0 siblings, 0 replies; 40+ messages in thread
From: Kunihiko Hayashi @ 2020-03-17 11:09 UTC (permalink / raw)
To: Masahiro Yamada
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Mon, 16 Mar 2020 21:55:09 +0900 <masahiroy@kernel.org> wrote:
> On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
> <hayashi.kunihiko@socionext.com> wrote:
> >
> > The RGMII PHY needs to change drive-strength properties of the Ethernet
> > Tx pins to stabilize the PHY.
> >
> > The devicetree for LD20 global board specifies RMII PHY in the ethernet
> > node as default, however, there is also another board that has RGMII PHY.
> > The devicetree for the board doesn't exist, so the users should change
> > the ethernet properties by outside way.
>
> Probably, users should change pinctrl_ether_rgmii
> by the same means.
I think that it's reasonable to have a devicetree for another board with
RGMII PHY.
> The change to uniphier-pxs3-ref.dts looks OK to me.
I'll split this patch for uniphier-pxs3-ref.dts.
Thank you,
---
Best Regards,
Kunihiko Hayashi
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/10] Add devicetree features and fixes for UniPhier SoCs
2020-03-13 0:58 ` Kunihiko Hayashi
@ 2020-03-16 15:06 ` Masahiro Yamada
-1 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 15:06 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: Rob Herring, DTML, linux-arm-kernel, Masami Hiramatsu, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> This series adds new features that includes XDMAC for each SoC,
> USB controller for Pro5, SPI for PXs3-ref, and thermal zone for PXs3.
>
> And more, this adds ethernet aliases to determine device name assignments
> and fixes for SCSSI clock/reset IDs and stabilization for ethernet.
>
> Kunihiko Hayashi (10):
> ARM: dts: uniphier: Add XDMAC node
> arm64: dts: uniphier: Add XDMAC node
> ARM: dts: uniphier: Add USB3 controller nodes for Pro5
> arm64: dts: uniphier: Enable spi node for PXs3 reference board
> arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone
> for PXs3
> ARM: dts: uniphier: Add ethernet aliases
> arm64: dts: uniphier: Add ethernet aliases
> ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channel
> arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel
> arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and
> PXs3 ref board
I applied 3, 4, 5, 8, 9.
Thanks.
> arch/arm/boot/dts/uniphier-ld6b-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ace.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-sanji.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++
> arch/arm/boot/dts/uniphier-pro5.dtsi | 160 ++++++++++++++++++++-
> arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2.dtsi | 12 +-
> .../boot/dts/socionext/uniphier-ld11-global.dts | 1 +
> .../arm64/boot/dts/socionext/uniphier-ld11-ref.dts | 1 +
> arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 12 +-
> .../boot/dts/socionext/uniphier-ld20-global.dts | 14 ++
> .../arm64/boot/dts/socionext/uniphier-ld20-ref.dts | 1 +
> arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 20 ++-
> .../arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 28 ++++
> arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 55 ++++++-
> 17 files changed, 304 insertions(+), 14 deletions(-)
>
> --
> 2.7.4
>
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/10] Add devicetree features and fixes for UniPhier SoCs
@ 2020-03-16 15:06 ` Masahiro Yamada
0 siblings, 0 replies; 40+ messages in thread
From: Masahiro Yamada @ 2020-03-16 15:06 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: DTML, Rob Herring, Masami Hiramatsu, linux-arm-kernel, Jassi Brar
On Fri, Mar 13, 2020 at 9:58 AM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> This series adds new features that includes XDMAC for each SoC,
> USB controller for Pro5, SPI for PXs3-ref, and thermal zone for PXs3.
>
> And more, this adds ethernet aliases to determine device name assignments
> and fixes for SCSSI clock/reset IDs and stabilization for ethernet.
>
> Kunihiko Hayashi (10):
> ARM: dts: uniphier: Add XDMAC node
> arm64: dts: uniphier: Add XDMAC node
> ARM: dts: uniphier: Add USB3 controller nodes for Pro5
> arm64: dts: uniphier: Enable spi node for PXs3 reference board
> arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone
> for PXs3
> ARM: dts: uniphier: Add ethernet aliases
> arm64: dts: uniphier: Add ethernet aliases
> ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channel
> arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel
> arm64: dts: uniphier: Stabilize Ethernet RGMII mode of LD20 global and
> PXs3 ref board
I applied 3, 4, 5, 8, 9.
Thanks.
> arch/arm/boot/dts/uniphier-ld6b-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ace.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-ref.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4-sanji.dts | 1 +
> arch/arm/boot/dts/uniphier-pro4.dtsi | 8 ++
> arch/arm/boot/dts/uniphier-pro5.dtsi | 160 ++++++++++++++++++++-
> arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 1 +
> arch/arm/boot/dts/uniphier-pxs2.dtsi | 12 +-
> .../boot/dts/socionext/uniphier-ld11-global.dts | 1 +
> .../arm64/boot/dts/socionext/uniphier-ld11-ref.dts | 1 +
> arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 12 +-
> .../boot/dts/socionext/uniphier-ld20-global.dts | 14 ++
> .../arm64/boot/dts/socionext/uniphier-ld20-ref.dts | 1 +
> arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 20 ++-
> .../arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 28 ++++
> arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 55 ++++++-
> 17 files changed, 304 insertions(+), 14 deletions(-)
>
> --
> 2.7.4
>
--
Best Regards
Masahiro Yamada
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 40+ messages in thread