[Intel-gfx] [PATCH 00/12] drm/i915/guc: Update to GuC v49

[Intel-gfx] [PATCH 00/12] drm/i915/guc: Update to GuC v49

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Update to the latest GuC firmware and enable by default.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>


Daniele Ceraolo Spurio (1):
  drm/i915/uc: turn on GuC/HuC auto mode by default

John Harrison (5):
  drm/i915/guc: ADS changes for GuC v42
  drm/i915/guc: Increased engine classes in ADS
  drm/i915/guc: Update firmware to v49.0.1
  drm/i915/guc: Improved reporting when GuC fails to load
  drm/i915/guc: Clear pointers on free

Matthew Brost (3):
  drm/i915/guc: Support logical engine mapping table in ADS
  drm/i915/guc: Setup private_data pointer in GuC ADS
  drm/i915/guc: Remove GUC_CTL_CTXINFO init param

Michal Wajdeczko (3):
  drm/i915/guc: New GuC IDs based on engine class and instance
  drm/i915/guc: Kill guc_ads.reg_state_buffer
  drm/i915/guc: Setup doorbells data in ADS

 drivers/gpu/drm/i915/gt/intel_engine_cs.c    |   3 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.c       |  18 ---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c   | 132 +++++++++++++++----
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c    |   1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c    |  27 +++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h  |  82 +++++++-----
 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h   |   5 +
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c     |  27 ++--
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h     |   2 +
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h |   6 +-
 drivers/gpu/drm/i915/i915_params.h           |   2 +-
 11 files changed, 207 insertions(+), 98 deletions(-)

-- 
2.25.1

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[Intel-gfx] [PATCH 01/12] drm/i915/guc: New GuC IDs based on engine class and instance

[John.C.Harrison]

From: Michal Wajdeczko <michal.wajdeczko@intel.com>

Starting from Gen11, the ID to be provided to GuC needs to contain
the engine class in bits [0..2] and the instance in bits [3..6].

NOTE: this patch breaks pointer dereferences in some existing GuC
functions that use the guc_id to dereference arrays but these functions
are not used for now as we have GuC submission disabled and we will
update these functions in follow up patch which requires new IDs.

Bspec: 20944

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c   |  3 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 19 +++++++++++++++++++
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 5bfb5f7ed02c..1f1c9032ed71 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -305,8 +305,9 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
 	engine->i915 = i915;
 	engine->gt = gt;
 	engine->uncore = gt->uncore;
-	engine->hw_id = engine->guc_id = info->hw_id;
 	engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases);
+	engine->hw_id = info->hw_id;
+	engine->guc_id = MAKE_GUC_ID(info->class, info->instance);
 
 	engine->class = info->class;
 	engine->instance = info->instance;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index a6b733c146c9..8b3684c6a9a1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -103,6 +103,25 @@
 
 #define GUC_CTL_MAX_DWORDS		(SOFT_SCRATCH_COUNT - 2) /* [1..14] */
 
+/*
+ * The class goes in bits [0..2] of the GuC ID, the instance in bits [3..6].
+ * Bit 7 can be used for operations that apply to all engine classes&instances.
+ */
+#define GUC_ENGINE_CLASS_SHIFT		0
+#define GUC_ENGINE_CLASS_MASK		(0x7 << GUC_ENGINE_CLASS_SHIFT)
+#define GUC_ENGINE_INSTANCE_SHIFT	3
+#define GUC_ENGINE_INSTANCE_MASK	(0xf << GUC_ENGINE_INSTANCE_SHIFT)
+#define GUC_ENGINE_ALL_INSTANCES	BIT(7)
+
+#define MAKE_GUC_ID(class, instance) \
+	(((class) << GUC_ENGINE_CLASS_SHIFT) | \
+	 ((instance) << GUC_ENGINE_INSTANCE_SHIFT))
+
+#define GUC_ID_TO_ENGINE_CLASS(guc_id) \
+	(((guc_id) & GUC_ENGINE_CLASS_MASK) >> GUC_ENGINE_CLASS_SHIFT)
+#define GUC_ID_TO_ENGINE_INSTANCE(guc_id) \
+	(((guc_id) & GUC_ENGINE_INSTANCE_MASK) >> GUC_ENGINE_INSTANCE_SHIFT)
+
 /* Work item for submitting workloads into work queue of GuC. */
 struct guc_wq_item {
 	u32 header;
-- 
2.25.1

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[Intel-gfx] [PATCH 02/12] drm/i915/guc: Support logical engine mapping table in ADS

[John.C.Harrison]

From: Matthew Brost <matthew.brost@intel.com>

The new GuC FW introduces a physical to logical engine mapping table in
the GuC additional data structures which needs to be configured in order
for the firmware to load. This patch initializes the table with a 1 to 1
mapping.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
CC: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 23 +++++++++++++++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h |  4 +++-
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index d44061033f23..57954c6360e0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -48,6 +48,27 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
 	memset(pool, 0, num * sizeof(*pool));
 }
 
+static void guc_mapping_table_init(struct intel_gt *gt,
+				   struct guc_gt_system_info *system_info)
+{
+	unsigned int i, j;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+
+	/* Table must be set to invalid values for entries not used */
+	for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
+		for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
+			system_info->mapping_table[i][j] =
+				GUC_MAX_INSTANCES_PER_CLASS;
+
+	for_each_engine(engine, gt, id) {
+		u8 guc_class = engine->class;
+
+		system_info->mapping_table[guc_class][engine->instance] =
+			engine->instance;
+	}
+}
+
 /*
  * The first 80 dwords of the register state context, containing the
  * execlists and ppgtt registers.
@@ -107,6 +128,8 @@ static void __guc_ads_init(struct intel_guc *guc)
 	blob->system_info.vebox_enable_mask = VEBOX_MASK(gt);
 	blob->system_info.vdbox_sfc_support_mask = gt->info.vdbox_sfc_access;
 
+	guc_mapping_table_init(guc_to_gt(guc), &blob->system_info);
+
 	base = intel_guc_ggtt_offset(guc, guc->ads_vma);
 
 	/* Clients info  */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index 8b3684c6a9a1..e283156624b5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -388,7 +388,9 @@ struct guc_gt_system_info {
 	u32 vdbox_enable_mask;
 	u32 vdbox_sfc_support_mask;
 	u32 vebox_enable_mask;
-	u32 reserved[9];
+	u32 reserved1;
+	u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
+	u32 reserved2[8];
 } __packed;
 
 /* Clients info */
-- 
2.25.1

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Re: [Intel-gfx] [PATCH 02/12] drm/i915/guc: Support logical engine mapping table in ADS

[Daniele Ceraolo Spurio]

On 9/16/2020 10:16 AM, John.C.Harrison@Intel.com wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> The new GuC FW introduces a physical to logical engine mapping table in
> the GuC additional data structures which needs to be configured in order
> for the firmware to load. This patch initializes the table with a 1 to 1
> mapping.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> CC: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 23 +++++++++++++++++++++
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h |  4 +++-
>   2 files changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index d44061033f23..57954c6360e0 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -48,6 +48,27 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
>   	memset(pool, 0, num * sizeof(*pool));
>   }
>   
> +static void guc_mapping_table_init(struct intel_gt *gt,
> +				   struct guc_gt_system_info *system_info)
> +{
> +	unsigned int i, j;
> +	struct intel_engine_cs *engine;
> +	enum intel_engine_id id;
> +
> +	/* Table must be set to invalid values for entries not used */
> +	for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
> +		for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
> +			system_info->mapping_table[i][j] =
> +				GUC_MAX_INSTANCES_PER_CLASS;
> +
> +	for_each_engine(engine, gt, id) {
> +		u8 guc_class = engine->class;
> +
> +		system_info->mapping_table[guc_class][engine->instance] =
> +			engine->instance;
> +	}
> +}
> +
>   /*
>    * The first 80 dwords of the register state context, containing the
>    * execlists and ppgtt registers.
> @@ -107,6 +128,8 @@ static void __guc_ads_init(struct intel_guc *guc)
>   	blob->system_info.vebox_enable_mask = VEBOX_MASK(gt);
>   	blob->system_info.vdbox_sfc_support_mask = gt->info.vdbox_sfc_access;
>   
> +	guc_mapping_table_init(guc_to_gt(guc), &blob->system_info);
> +
>   	base = intel_guc_ggtt_offset(guc, guc->ads_vma);
>   
>   	/* Clients info  */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index 8b3684c6a9a1..e283156624b5 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -388,7 +388,9 @@ struct guc_gt_system_info {
>   	u32 vdbox_enable_mask;
>   	u32 vdbox_sfc_support_mask;
>   	u32 vebox_enable_mask;
> -	u32 reserved[9];
> +	u32 reserved1;
> +	u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
> +	u32 reserved2[8];

I think this patch should be squashed with patch 8 to move directly to 
the v49 version of guc_gt_system_info.
Apart from this the patch LGTM.

Daniele

>   } __packed;
>   
>   /* Clients info */

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Re: [Intel-gfx] [PATCH 02/12] drm/i915/guc: Support logical engine mapping table in ADS

[John Harrison]

On 9/16/2020 16:27, Daniele Ceraolo Spurio wrote:
> On 9/16/2020 10:16 AM, John.C.Harrison@Intel.com wrote:
>> From: Matthew Brost <matthew.brost@intel.com>
>>
>> The new GuC FW introduces a physical to logical engine mapping table in
>> the GuC additional data structures which needs to be configured in order
>> for the firmware to load. This patch initializes the table with a 1 to 1
>> mapping.
>>
>> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
>> CC: John Harrison <John.C.Harrison@Intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 23 +++++++++++++++++++++
>>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h |  4 +++-
>>   2 files changed, 26 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> index d44061033f23..57954c6360e0 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> @@ -48,6 +48,27 @@ static void guc_ct_pool_entries_init(struct 
>> guc_ct_pool_entry *pool, u32 num)
>>       memset(pool, 0, num * sizeof(*pool));
>>   }
>>   +static void guc_mapping_table_init(struct intel_gt *gt,
>> +                   struct guc_gt_system_info *system_info)
>> +{
>> +    unsigned int i, j;
>> +    struct intel_engine_cs *engine;
>> +    enum intel_engine_id id;
>> +
>> +    /* Table must be set to invalid values for entries not used */
>> +    for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
>> +        for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
>> +            system_info->mapping_table[i][j] =
>> +                GUC_MAX_INSTANCES_PER_CLASS;
>> +
>> +    for_each_engine(engine, gt, id) {
>> +        u8 guc_class = engine->class;
>> +
>> + system_info->mapping_table[guc_class][engine->instance] =
>> +            engine->instance;
>> +    }
>> +}
>> +
>>   /*
>>    * The first 80 dwords of the register state context, containing the
>>    * execlists and ppgtt registers.
>> @@ -107,6 +128,8 @@ static void __guc_ads_init(struct intel_guc *guc)
>>       blob->system_info.vebox_enable_mask = VEBOX_MASK(gt);
>>       blob->system_info.vdbox_sfc_support_mask = 
>> gt->info.vdbox_sfc_access;
>>   +    guc_mapping_table_init(guc_to_gt(guc), &blob->system_info);
>> +
>>       base = intel_guc_ggtt_offset(guc, guc->ads_vma);
>>         /* Clients info  */
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> index 8b3684c6a9a1..e283156624b5 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> @@ -388,7 +388,9 @@ struct guc_gt_system_info {
>>       u32 vdbox_enable_mask;
>>       u32 vdbox_sfc_support_mask;
>>       u32 vebox_enable_mask;
>> -    u32 reserved[9];
>> +    u32 reserved1;
>> +    u8 
>> mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
>> +    u32 reserved2[8];
>
> I think this patch should be squashed with patch 8 to move directly to 
> the v49 version of guc_gt_system_info.
> Apart from this the patch LGTM.
>
> Daniele
The whole set is going to be squashed into a single patch for merging. 
For review purposes, the discussion was that it makes sense to keep each 
as a separate functional change. This patch adds logical engine 
mappings. Patch #8 adds extra engine classes. These are different 
functional changes.

John.



>
>>   } __packed;
>>     /* Clients info */
>

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[Intel-gfx] [PATCH 03/12] drm/i915/guc: Setup private_data pointer in GuC ADS

[John.C.Harrison]

From: Matthew Brost <matthew.brost@intel.com>

The new GuC requires the additional data structure and associated
'private_data' pointer to be setup. This is basically a scratch area
of memory that the GuC owns. The size is read from the CSS header.

Cc: John Harrison <john.c.harrison@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c   | 13 ++++++++++++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h  |  3 ++-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c     |  3 +++
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h     |  2 ++
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h |  6 +++++-
 5 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 57954c6360e0..7c16ade44b2b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -146,6 +146,10 @@ static void __guc_ads_init(struct intel_guc *guc)
 	blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
 	blob->ads.clients_info = base + ptr_offset(blob, clients_info);
 
+	/* Private Data */
+	blob->ads.private_data = base +
+		PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+
 	i915_gem_object_flush_map(guc->ads_vma->obj);
 }
 
@@ -158,11 +162,13 @@ static void __guc_ads_init(struct intel_guc *guc)
  */
 int intel_guc_ads_create(struct intel_guc *guc)
 {
-	const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+	u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
 	int ret;
 
 	GEM_BUG_ON(guc->ads_vma);
 
+	size += PAGE_ALIGN(guc->fw.private_data_size);
+
 	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
 					     (void **)&guc->ads_blob);
 
@@ -192,4 +198,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
 	if (!guc->ads_vma)
 		return;
 	__guc_ads_init(guc);
+
+	if (guc->fw.private_data_size)
+		memset((void *)guc->ads_blob +
+		       PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
+		       PAGE_ALIGN(guc->fw.private_data_size));
 }
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index e283156624b5..fa19c9d248f2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -419,7 +419,8 @@ struct guc_ads {
 	u32 control_data;
 	u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
 	u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
-	u32 reserved[16];
+	u32 private_data;
+	u32 reserved[15];
 } __packed;
 
 /* GuC logging structures */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 80e8b6c3bc8c..1928ce94faf8 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -371,6 +371,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
 		}
 	}
 
+	if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
+		uc_fw->private_data_size = css->private_data_size;
+
 	obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
 	if (IS_ERR(obj)) {
 		err = PTR_ERR(obj);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
index 23d3a423ac0f..99bb1fe1af66 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
@@ -88,6 +88,8 @@ struct intel_uc_fw {
 
 	u32 rsa_size;
 	u32 ucode_size;
+
+	u32 private_data_size;
 };
 
 #ifdef CONFIG_DRM_I915_DEBUG_GUC
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
index 029214cdedd5..e41ffc7a7fbc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
@@ -69,7 +69,11 @@ struct uc_css_header {
 #define CSS_SW_VERSION_UC_MAJOR		(0xFF << 16)
 #define CSS_SW_VERSION_UC_MINOR		(0xFF << 8)
 #define CSS_SW_VERSION_UC_PATCH		(0xFF << 0)
-	u32 reserved[14];
+	u32 reserved0[13];
+	union {
+		u32 private_data_size; /* only applies to GuC */
+		u32 reserved1;
+	};
 	u32 header_info;
 } __packed;
 static_assert(sizeof(struct uc_css_header) == 128);
-- 
2.25.1

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Re: [Intel-gfx] [PATCH 03/12] drm/i915/guc: Setup private_data pointer in GuC ADS

[Daniele Ceraolo Spurio]

On 9/16/2020 10:16 AM, John.C.Harrison@Intel.com wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> The new GuC requires the additional data structure and associated
> 'private_data' pointer to be setup. This is basically a scratch area
> of memory that the GuC owns. The size is read from the CSS header.
>
> Cc: John Harrison <john.c.harrison@intel.com>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c   | 13 ++++++++++++-
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h  |  3 ++-
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c     |  3 +++
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h     |  2 ++
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h |  6 +++++-
>   5 files changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 57954c6360e0..7c16ade44b2b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -146,6 +146,10 @@ static void __guc_ads_init(struct intel_guc *guc)
>   	blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
>   	blob->ads.clients_info = base + ptr_offset(blob, clients_info);
>   
> +	/* Private Data */
> +	blob->ads.private_data = base +
> +		PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> +
>   	i915_gem_object_flush_map(guc->ads_vma->obj);
>   }
>   
> @@ -158,11 +162,13 @@ static void __guc_ads_init(struct intel_guc *guc)
>    */
>   int intel_guc_ads_create(struct intel_guc *guc)
>   {
> -	const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> +	u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
>   	int ret;
>   
>   	GEM_BUG_ON(guc->ads_vma);
>   
> +	size += PAGE_ALIGN(guc->fw.private_data_size);
> +
>   	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
>   					     (void **)&guc->ads_blob);
>   
> @@ -192,4 +198,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
>   	if (!guc->ads_vma)
>   		return;
>   	__guc_ads_init(guc);
> +
> +	if (guc->fw.private_data_size)
> +		memset((void *)guc->ads_blob +
> +		       PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
> +		       PAGE_ALIGN(guc->fw.private_data_size));
>   }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index e283156624b5..fa19c9d248f2 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -419,7 +419,8 @@ struct guc_ads {
>   	u32 control_data;
>   	u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
>   	u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
> -	u32 reserved[16];
> +	u32 private_data;
> +	u32 reserved[15];
>   } __packed;
>   
>   /* GuC logging structures */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 80e8b6c3bc8c..1928ce94faf8 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -371,6 +371,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
>   		}
>   	}
>   
> +	if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
> +		uc_fw->private_data_size = css->private_data_size;
> +
>   	obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
>   	if (IS_ERR(obj)) {
>   		err = PTR_ERR(obj);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> index 23d3a423ac0f..99bb1fe1af66 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> @@ -88,6 +88,8 @@ struct intel_uc_fw {
>   
>   	u32 rsa_size;
>   	u32 ucode_size;
> +
> +	u32 private_data_size;
>   };
>   
>   #ifdef CONFIG_DRM_I915_DEBUG_GUC
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> index 029214cdedd5..e41ffc7a7fbc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> @@ -69,7 +69,11 @@ struct uc_css_header {
>   #define CSS_SW_VERSION_UC_MAJOR		(0xFF << 16)
>   #define CSS_SW_VERSION_UC_MINOR		(0xFF << 8)
>   #define CSS_SW_VERSION_UC_PATCH		(0xFF << 0)
> -	u32 reserved[14];
> +	u32 reserved0[13];
> +	union {
> +		u32 private_data_size; /* only applies to GuC */
> +		u32 reserved1;
> +	};
>   	u32 header_info;
>   } __packed;
>   static_assert(sizeof(struct uc_css_header) == 128);

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[Intel-gfx] [PATCH 04/12] drm/i915/guc: Remove GUC_CTL_CTXINFO init param

[John.C.Harrison]

From: Matthew Brost <matthew.brost@intel.com>

The new GuC interface has removed GUC_CTL_CTXINFO from initialization
params.

Cc: John Harrison <john.c.harrison@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c      | 18 ------------------
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 15 +++++----------
 2 files changed, 5 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 942c7c187adb..6909da1e1a73 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
 	return flags;
 }
 
-static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
-{
-	u32 flags = 0;
-
-	if (intel_guc_submission_is_used(guc)) {
-		u32 ctxnum, base;
-
-		base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
-		ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
-
-		base >>= PAGE_SHIFT;
-		flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
-			(ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
-	}
-	return flags;
-}
-
 static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
 {
 	u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
@@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
 
 	BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
 
-	params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
 	params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
 	params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
 	params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index fa19c9d248f2..d4e2c32f44cf 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -62,12 +62,7 @@
 #define GUC_STAGE_DESC_ATTR_PCH		BIT(6)
 #define GUC_STAGE_DESC_ATTR_TERMINATED	BIT(7)
 
-/* New GuC control data */
-#define GUC_CTL_CTXINFO			0
-#define   GUC_CTL_CTXNUM_IN16_SHIFT	0
-#define   GUC_CTL_BASE_ADDR_SHIFT	12
-
-#define GUC_CTL_LOG_PARAMS		1
+#define GUC_CTL_LOG_PARAMS		0
 #define   GUC_LOG_VALID			(1 << 0)
 #define   GUC_LOG_NOTIFY_ON_HALF_FULL	(1 << 1)
 #define   GUC_LOG_ALLOC_IN_MEGABYTE	(1 << 3)
@@ -79,11 +74,11 @@
 #define   GUC_LOG_ISR_MASK	        (0x7 << GUC_LOG_ISR_SHIFT)
 #define   GUC_LOG_BUF_ADDR_SHIFT	12
 
-#define GUC_CTL_WA			2
-#define GUC_CTL_FEATURE			3
+#define GUC_CTL_WA			1
+#define GUC_CTL_FEATURE			2
 #define   GUC_CTL_DISABLE_SCHEDULER	(1 << 14)
 
-#define GUC_CTL_DEBUG			4
+#define GUC_CTL_DEBUG			3
 #define   GUC_LOG_VERBOSITY_SHIFT	0
 #define   GUC_LOG_VERBOSITY_LOW		(0 << GUC_LOG_VERBOSITY_SHIFT)
 #define   GUC_LOG_VERBOSITY_MED		(1 << GUC_LOG_VERBOSITY_SHIFT)
@@ -97,7 +92,7 @@
 #define   GUC_LOG_DISABLED		(1 << 6)
 #define   GUC_PROFILE_ENABLED		(1 << 7)
 
-#define GUC_CTL_ADS			5
+#define GUC_CTL_ADS			4
 #define   GUC_ADS_ADDR_SHIFT		1
 #define   GUC_ADS_ADDR_MASK		(0xFFFFF << GUC_ADS_ADDR_SHIFT)
 
-- 
2.25.1

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Re: [Intel-gfx] [PATCH 04/12] drm/i915/guc: Remove GUC_CTL_CTXINFO init param

[Daniele Ceraolo Spurio]

On 9/16/2020 10:16 AM, John.C.Harrison@Intel.com wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> The new GuC interface has removed GUC_CTL_CTXINFO from initialization
> params.
>
> Cc: John Harrison <john.c.harrison@intel.com>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc.c      | 18 ------------------
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 15 +++++----------
>   2 files changed, 5 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 942c7c187adb..6909da1e1a73 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
>   	return flags;
>   }
>   
> -static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
> -{
> -	u32 flags = 0;
> -
> -	if (intel_guc_submission_is_used(guc)) {
> -		u32 ctxnum, base;
> -
> -		base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
> -		ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
> -
> -		base >>= PAGE_SHIFT;
> -		flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
> -			(ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
> -	}
> -	return flags;
> -}
> -
>   static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
>   {
>   	u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
> @@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
>   
>   	BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
>   
> -	params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
>   	params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
>   	params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
>   	params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index fa19c9d248f2..d4e2c32f44cf 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -62,12 +62,7 @@
>   #define GUC_STAGE_DESC_ATTR_PCH		BIT(6)
>   #define GUC_STAGE_DESC_ATTR_TERMINATED	BIT(7)
>   
> -/* New GuC control data */
> -#define GUC_CTL_CTXINFO			0
> -#define   GUC_CTL_CTXNUM_IN16_SHIFT	0
> -#define   GUC_CTL_BASE_ADDR_SHIFT	12
> -
> -#define GUC_CTL_LOG_PARAMS		1
> +#define GUC_CTL_LOG_PARAMS		0
>   #define   GUC_LOG_VALID			(1 << 0)
>   #define   GUC_LOG_NOTIFY_ON_HALF_FULL	(1 << 1)
>   #define   GUC_LOG_ALLOC_IN_MEGABYTE	(1 << 3)
> @@ -79,11 +74,11 @@
>   #define   GUC_LOG_ISR_MASK	        (0x7 << GUC_LOG_ISR_SHIFT)
>   #define   GUC_LOG_BUF_ADDR_SHIFT	12
>   
> -#define GUC_CTL_WA			2
> -#define GUC_CTL_FEATURE			3
> +#define GUC_CTL_WA			1
> +#define GUC_CTL_FEATURE			2
>   #define   GUC_CTL_DISABLE_SCHEDULER	(1 << 14)
>   
> -#define GUC_CTL_DEBUG			4
> +#define GUC_CTL_DEBUG			3
>   #define   GUC_LOG_VERBOSITY_SHIFT	0
>   #define   GUC_LOG_VERBOSITY_LOW		(0 << GUC_LOG_VERBOSITY_SHIFT)
>   #define   GUC_LOG_VERBOSITY_MED		(1 << GUC_LOG_VERBOSITY_SHIFT)
> @@ -97,7 +92,7 @@
>   #define   GUC_LOG_DISABLED		(1 << 6)
>   #define   GUC_PROFILE_ENABLED		(1 << 7)
>   
> -#define GUC_CTL_ADS			5
> +#define GUC_CTL_ADS			4
>   #define   GUC_ADS_ADDR_SHIFT		1
>   #define   GUC_ADS_ADDR_MASK		(0xFFFFF << GUC_ADS_ADDR_SHIFT)
>   

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[Intel-gfx] [PATCH 05/12] drm/i915/guc: Kill guc_ads.reg_state_buffer

[John.C.Harrison]

From: Michal Wajdeczko <michal.wajdeczko@intel.com>

Starting GuC firmware version 40.0 reg_state_buffer is maintained
internally by the GuC as part of "private data".

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 2 --
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +-
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 7c16ade44b2b..a662825f67ad 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -83,7 +83,6 @@ struct __guc_ads_blob {
 	struct guc_gt_system_info system_info;
 	struct guc_clients_info clients_info;
 	struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
-	u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
 } __packed;
 
 static void __guc_ads_init(struct intel_guc *guc)
@@ -141,7 +140,6 @@ static void __guc_ads_init(struct intel_guc *guc)
 
 	/* ADS */
 	blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
-	blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
 	blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
 	blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
 	blob->ads.clients_info = base + ptr_offset(blob, clients_info);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index d4e2c32f44cf..f375388e8c50 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -407,7 +407,7 @@ struct guc_clients_info {
 /* GuC Additional Data Struct */
 struct guc_ads {
 	u32 reg_state_addr;
-	u32 reg_state_buffer;
+	u32 reserved0;
 	u32 scheduler_policies;
 	u32 gt_system_info;
 	u32 clients_info;
-- 
2.25.1

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Re: [Intel-gfx] [PATCH 05/12] drm/i915/guc: Kill guc_ads.reg_state_buffer

[Daniele Ceraolo Spurio]

On 9/16/2020 10:16 AM, John.C.Harrison@Intel.com wrote:
> From: Michal Wajdeczko <michal.wajdeczko@intel.com>
>
> Starting GuC firmware version 40.0 reg_state_buffer is maintained
> internally by the GuC as part of "private data".
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 2 --
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +-
>   2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 7c16ade44b2b..a662825f67ad 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -83,7 +83,6 @@ struct __guc_ads_blob {
>   	struct guc_gt_system_info system_info;
>   	struct guc_clients_info clients_info;
>   	struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
> -	u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
>   } __packed;
>   
>   static void __guc_ads_init(struct intel_guc *guc)
> @@ -141,7 +140,6 @@ static void __guc_ads_init(struct intel_guc *guc)
>   
>   	/* ADS */
>   	blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
> -	blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
>   	blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
>   	blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
>   	blob->ads.clients_info = base + ptr_offset(blob, clients_info);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index d4e2c32f44cf..f375388e8c50 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -407,7 +407,7 @@ struct guc_clients_info {
>   /* GuC Additional Data Struct */
>   struct guc_ads {
>   	u32 reg_state_addr;
> -	u32 reg_state_buffer;
> +	u32 reserved0;
>   	u32 scheduler_policies;
>   	u32 gt_system_info;
>   	u32 clients_info;

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[Intel-gfx] [PATCH 06/12] drm/i915/guc: ADS changes for GuC v42

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The ADS layout changes significantly with GuC firmware v42. This patch
updates the shared structure (but does not fill in the new tables,
that comes later as part of the GuC submission support). It also adds
better documentation of the layout.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 86 +++++++++++++++------
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 24 +++---
 2 files changed, 74 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index a662825f67ad..b2f05139de05 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -10,11 +10,52 @@
 
 /*
  * The Additional Data Struct (ADS) has pointers for different buffers used by
- * the GuC. One single gem object contains the ADS struct itself (guc_ads), the
- * scheduling policies (guc_policies), a structure describing a collection of
- * register sets (guc_mmio_reg_state) and some extra pages for the GuC to save
- * its internal state for sleep.
+ * the GuC. One single gem object contains the ADS struct itself (guc_ads) and
+ * all the extra buffers indirectly linked via the ADS struct's entries.
+ *
+ * Layout of the ADS blob allocated for the GuC:
+ *
+ *      +---------------------------------------+ <== base
+ *      | guc_ads                               |
+ *      +---------------------------------------+
+ *      | guc_policies                          |
+ *      +---------------------------------------+
+ *      | guc_gt_system_info                    |
+ *      +---------------------------------------+
+ *      | guc_clients_info                      |
+ *      +---------------------------------------+
+ *      | guc_ct_pool_entry[size]               |
+ *      +---------------------------------------+
+ *      | padding                               |
+ *      +---------------------------------------+ <== 4K aligned
+ *      | private data                          |
+ *      +---------------------------------------+
+ *      | padding                               |
+ *      +---------------------------------------+ <== 4K aligned
  */
+struct __guc_ads_blob {
+	struct guc_ads ads;
+	struct guc_policies policies;
+	struct guc_gt_system_info system_info;
+	struct guc_clients_info clients_info;
+	struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
+} __packed;
+
+static u32 guc_ads_private_data_size(struct intel_guc *guc)
+{
+	return PAGE_ALIGN(guc->fw.private_data_size);
+}
+
+static u32 guc_ads_private_data_offset(struct intel_guc *guc)
+{
+	return PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+}
+
+static u32 guc_ads_blob_size(struct intel_guc *guc)
+{
+	return guc_ads_private_data_offset(guc) +
+	       guc_ads_private_data_size(guc);
+}
 
 static void guc_policy_init(struct guc_policy *policy)
 {
@@ -75,16 +116,6 @@ static void guc_mapping_table_init(struct intel_gt *gt,
  */
 #define LR_HW_CONTEXT_SIZE	(80 * sizeof(u32))
 
-/* The ads obj includes the struct itself and buffers passed to GuC */
-struct __guc_ads_blob {
-	struct guc_ads ads;
-	struct guc_policies policies;
-	struct guc_mmio_reg_state reg_state;
-	struct guc_gt_system_info system_info;
-	struct guc_clients_info clients_info;
-	struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
-} __packed;
-
 static void __guc_ads_init(struct intel_guc *guc)
 {
 	struct intel_gt *gt = guc_to_gt(guc);
@@ -140,13 +171,11 @@ static void __guc_ads_init(struct intel_guc *guc)
 
 	/* ADS */
 	blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
-	blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
 	blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
 	blob->ads.clients_info = base + ptr_offset(blob, clients_info);
 
 	/* Private Data */
-	blob->ads.private_data = base +
-		PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+	blob->ads.private_data = base + guc_ads_private_data_offset(guc);
 
 	i915_gem_object_flush_map(guc->ads_vma->obj);
 }
@@ -160,16 +189,15 @@ static void __guc_ads_init(struct intel_guc *guc)
  */
 int intel_guc_ads_create(struct intel_guc *guc)
 {
-	u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+	u32 size;
 	int ret;
 
 	GEM_BUG_ON(guc->ads_vma);
 
-	size += PAGE_ALIGN(guc->fw.private_data_size);
+	size = guc_ads_blob_size(guc);
 
 	ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
 					     (void **)&guc->ads_blob);
-
 	if (ret)
 		return ret;
 
@@ -183,6 +211,18 @@ void intel_guc_ads_destroy(struct intel_guc *guc)
 	i915_vma_unpin_and_release(&guc->ads_vma, I915_VMA_RELEASE_MAP);
 }
 
+static void guc_ads_private_data_reset(struct intel_guc *guc)
+{
+	u32 size;
+
+	size = guc_ads_private_data_size(guc);
+	if (!size)
+		return;
+
+	memset((void *)guc->ads_blob + guc_ads_private_data_offset(guc), 0,
+	       size);
+}
+
 /**
  * intel_guc_ads_reset() - prepares GuC Additional Data Struct for reuse
  * @guc: intel_guc struct
@@ -195,10 +235,8 @@ void intel_guc_ads_reset(struct intel_guc *guc)
 {
 	if (!guc->ads_vma)
 		return;
+
 	__guc_ads_init(guc);
 
-	if (guc->fw.private_data_size)
-		memset((void *)guc->ads_blob +
-		       PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
-		       PAGE_ALIGN(guc->fw.private_data_size));
+	guc_ads_private_data_reset(guc);
 }
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index f375388e8c50..0cd4a7f7f4cb 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -27,7 +27,7 @@
 #define GUC_MAX_ENGINES_NUM		(GUC_VIDEO_ENGINE2 + 1)
 
 #define GUC_MAX_ENGINE_CLASSES		5
-#define GUC_MAX_INSTANCES_PER_CLASS	16
+#define GUC_MAX_INSTANCES_PER_CLASS	32
 
 #define GUC_DOORBELL_INVALID		256
 
@@ -352,7 +352,6 @@ struct guc_policies {
 /* GuC MMIO reg state struct */
 
 
-#define GUC_REGSET_MAX_REGISTERS	64
 #define GUC_S3_SAVE_SPACE_PAGES		10
 
 struct guc_mmio_reg {
@@ -362,16 +361,17 @@ struct guc_mmio_reg {
 #define GUC_REGSET_MASKED		(1 << 0)
 } __packed;
 
-struct guc_mmio_regset {
-	struct guc_mmio_reg registers[GUC_REGSET_MAX_REGISTERS];
-	u32 values_valid;
-	u32 number_of_registers;
-} __packed;
-
 /* GuC register sets */
-struct guc_mmio_reg_state {
-	struct guc_mmio_regset engine_reg[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
-	u32 reserved[98];
+struct guc_mmio_reg_set {
+	u32 address;
+	union {
+		struct {
+			u32 count:16;
+			u32 reserved1:12;
+			u32 reserved2:4;
+		};
+		u32 count_u32;
+	};
 } __packed;
 
 /* HW info */
@@ -406,7 +406,7 @@ struct guc_clients_info {
 
 /* GuC Additional Data Struct */
 struct guc_ads {
-	u32 reg_state_addr;
+	struct guc_mmio_reg_set reg_state_list[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
 	u32 reserved0;
 	u32 scheduler_policies;
 	u32 gt_system_info;
-- 
2.25.1

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[Intel-gfx] [PATCH 07/12] drm/i915/guc: Setup doorbells data in ADS

[John.C.Harrison]

From: Michal Wajdeczko <michal.wajdeczko@intel.com>

While i915 does not use GuC doorbells, the firmware requires that some
initialisation is done.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 9 +++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h  | 5 +++++
 3 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index b2f05139de05..75fcce64fc57 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -119,6 +119,7 @@ static void guc_mapping_table_init(struct intel_gt *gt,
 static void __guc_ads_init(struct intel_guc *guc)
 {
 	struct intel_gt *gt = guc_to_gt(guc);
+	struct drm_i915_private *i915 = gt->i915;
 	struct __guc_ads_blob *blob = guc->ads_blob;
 	const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
 	u32 base;
@@ -158,6 +159,14 @@ static void __guc_ads_init(struct intel_guc *guc)
 	blob->system_info.vebox_enable_mask = VEBOX_MASK(gt);
 	blob->system_info.vdbox_sfc_support_mask = gt->info.vdbox_sfc_access;
 
+	if (INTEL_GEN(i915) >= 12 && !IS_DGFX(i915)) {
+		u32 distdbreg = intel_uncore_read(gt->uncore,
+						  GEN12_DIST_DBS_POPULATED);
+		blob->system_info.num_of_doorbells_per_sqidi =
+			((distdbreg >> GEN12_DOORBELLS_PER_SQIDI_SHIFT) &
+			 GEN12_DOORBELLS_PER_SQIDI) + 1;
+	}
+
 	guc_mapping_table_init(guc_to_gt(guc), &blob->system_info);
 
 	base = intel_guc_ggtt_offset(guc, guc->ads_vma);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index 0cd4a7f7f4cb..3492fb0d5dec 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -383,7 +383,7 @@ struct guc_gt_system_info {
 	u32 vdbox_enable_mask;
 	u32 vdbox_sfc_support_mask;
 	u32 vebox_enable_mask;
-	u32 reserved1;
+	u32 num_of_doorbells_per_sqidi;
 	u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
 	u32 reserved2[8];
 } __packed;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
index 1949346e714e..b37fc2ffaef2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
@@ -118,6 +118,11 @@ struct guc_doorbell_info {
 #define   GEN8_DRB_VALID		  (1<<0)
 #define GEN8_DRBREGU(x)			_MMIO(0x1000 + (x) * 8 + 4)
 
+#define GEN12_DIST_DBS_POPULATED		_MMIO(0xd08)
+#define   GEN12_DOORBELLS_PER_SQIDI_SHIFT	16
+#define   GEN12_DOORBELLS_PER_SQIDI		(0xff)
+#define   GEN12_SQIDIS_DOORBELL_EXIST		(0xffff)
+
 #define DE_GUCRMR			_MMIO(0x44054)
 
 #define GUC_BCS_RCS_IER			_MMIO(0xC550)
-- 
2.25.1

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[Intel-gfx] [PATCH 08/12] drm/i915/guc: Increased engine classes in ADS

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

GuC v46 partially increased the number of engine classes supported in
the ADS. GuC v48 then finished the change off by cleaning up the
per class engine mask fields.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 16 +++++++++-------
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 19 +++++++++----------
 2 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 75fcce64fc57..7950d28beb8c 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -151,18 +151,20 @@ static void __guc_ads_init(struct intel_guc *guc)
 	}
 
 	/* System info */
-	blob->system_info.slice_enabled = hweight8(gt->info.sseu.slice_mask);
-	blob->system_info.rcs_enabled = 1;
-	blob->system_info.bcs_enabled = 1;
+	blob->system_info.engine_enabled_masks[RENDER_CLASS] = 1;
+	blob->system_info.engine_enabled_masks[COPY_ENGINE_CLASS] = 1;
+	blob->system_info.engine_enabled_masks[VIDEO_DECODE_CLASS] = VDBOX_MASK(gt);
+	blob->system_info.engine_enabled_masks[VIDEO_ENHANCEMENT_CLASS] = VEBOX_MASK(gt);
 
-	blob->system_info.vdbox_enable_mask = VDBOX_MASK(gt);
-	blob->system_info.vebox_enable_mask = VEBOX_MASK(gt);
-	blob->system_info.vdbox_sfc_support_mask = gt->info.vdbox_sfc_access;
+	blob->system_info.generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_SLICE_ENABLED] =
+		hweight8(gt->info.sseu.slice_mask);
+	blob->system_info.generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_VDBOX_SFC_SUPPORT_MASK] =
+		gt->info.vdbox_sfc_access;
 
 	if (INTEL_GEN(i915) >= 12 && !IS_DGFX(i915)) {
 		u32 distdbreg = intel_uncore_read(gt->uncore,
 						  GEN12_DIST_DBS_POPULATED);
-		blob->system_info.num_of_doorbells_per_sqidi =
+		blob->system_info.generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_DOORBELL_COUNT_PER_SQIDI] =
 			((distdbreg >> GEN12_DOORBELLS_PER_SQIDI_SHIFT) &
 			 GEN12_DOORBELLS_PER_SQIDI) + 1;
 	}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index 3492fb0d5dec..391053118869 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -26,7 +26,7 @@
 #define GUC_VIDEO_ENGINE2		4
 #define GUC_MAX_ENGINES_NUM		(GUC_VIDEO_ENGINE2 + 1)
 
-#define GUC_MAX_ENGINE_CLASSES		5
+#define GUC_MAX_ENGINE_CLASSES		16
 #define GUC_MAX_INSTANCES_PER_CLASS	32
 
 #define GUC_DOORBELL_INVALID		256
@@ -98,6 +98,12 @@
 
 #define GUC_CTL_MAX_DWORDS		(SOFT_SCRATCH_COUNT - 2) /* [1..14] */
 
+/* Generic GT SysInfo data types */
+#define GUC_GENERIC_GT_SYSINFO_SLICE_ENABLED		0
+#define GUC_GENERIC_GT_SYSINFO_VDBOX_SFC_SUPPORT_MASK	1
+#define GUC_GENERIC_GT_SYSINFO_DOORBELL_COUNT_PER_SQIDI	2
+#define GUC_GENERIC_GT_SYSINFO_MAX			16
+
 /*
  * The class goes in bits [0..2] of the GuC ID, the instance in bits [3..6].
  * Bit 7 can be used for operations that apply to all engine classes&instances.
@@ -376,16 +382,9 @@ struct guc_mmio_reg_set {
 
 /* HW info */
 struct guc_gt_system_info {
-	u32 slice_enabled;
-	u32 rcs_enabled;
-	u32 reserved0;
-	u32 bcs_enabled;
-	u32 vdbox_enable_mask;
-	u32 vdbox_sfc_support_mask;
-	u32 vebox_enable_mask;
-	u32 num_of_doorbells_per_sqidi;
 	u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
-	u32 reserved2[8];
+	u32 engine_enabled_masks[GUC_MAX_ENGINE_CLASSES];
+	u32 generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_MAX];
 } __packed;
 
 /* Clients info */
-- 
2.25.1

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[Intel-gfx] [PATCH 09/12] drm/i915/guc: Update firmware to v49.0.1

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Note that the GuC major version jumped from 35 to 40. This is because
the v40 firmware included a significant re-write of the API. The 'new
GuC API' patch series is required to make use of command submission
with this new GuC firmware. Versions 36 through 39 are reserved for
updates to the v35 code base.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 24 ++++++++++--------------
 1 file changed, 10 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 1928ce94faf8..ee4ac3922277 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -44,23 +44,19 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
  * List of required GuC and HuC binaries per-platform.
  * Must be ordered based on platform + revid, from newer to older.
  *
- * TGL 35.2 is interface-compatible with 33.0 for previous Gens. The deltas
- * between 33.0 and 35.2 are only related to new additions to support new Gen12
- * features.
- *
  * Note that RKL uses the same firmware as TGL.
  */
 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
-	fw_def(ROCKETLAKE,  0, guc_def(tgl, 35, 2, 0), huc_def(tgl,  7, 5, 0)) \
-	fw_def(TIGERLAKE,   0, guc_def(tgl, 35, 2, 0), huc_def(tgl,  7, 5, 0)) \
-	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl,  9, 0, 0)) \
-	fw_def(ICELAKE,     0, guc_def(icl, 33, 0, 0), huc_def(icl,  9, 0, 0)) \
-	fw_def(COMETLAKE,   5, guc_def(cml, 33, 0, 0), huc_def(cml,  4, 0, 0)) \
-	fw_def(COFFEELAKE,  0, guc_def(kbl, 33, 0, 0), huc_def(kbl,  4, 0, 0)) \
-	fw_def(GEMINILAKE,  0, guc_def(glk, 33, 0, 0), huc_def(glk,  4, 0, 0)) \
-	fw_def(KABYLAKE,    0, guc_def(kbl, 33, 0, 0), huc_def(kbl,  4, 0, 0)) \
-	fw_def(BROXTON,     0, guc_def(bxt, 33, 0, 0), huc_def(bxt,  2, 0, 0)) \
-	fw_def(SKYLAKE,     0, guc_def(skl, 33, 0, 0), huc_def(skl,  2, 0, 0))
+	fw_def(ROCKETLAKE,  0, guc_def(tgl, 49, 0, 1), huc_def(tgl,  7, 5, 0)) \
+	fw_def(TIGERLAKE,   0, guc_def(tgl, 49, 0, 1), huc_def(tgl,  7, 5, 0)) \
+	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl,  9, 0, 0)) \
+	fw_def(ICELAKE,     0, guc_def(icl, 49, 0, 1), huc_def(icl,  9, 0, 0)) \
+	fw_def(COMETLAKE,   5, guc_def(cml, 49, 0, 1), huc_def(cml,  4, 0, 0)) \
+	fw_def(COFFEELAKE,  0, guc_def(kbl, 49, 0, 1), huc_def(kbl,  4, 0, 0)) \
+	fw_def(GEMINILAKE,  0, guc_def(glk, 49, 0, 1), huc_def(glk,  4, 0, 0)) \
+	fw_def(KABYLAKE,    0, guc_def(kbl, 49, 0, 1), huc_def(kbl,  4, 0, 0)) \
+	fw_def(BROXTON,     0, guc_def(bxt, 49, 0, 1), huc_def(bxt,  2, 0, 0)) \
+	fw_def(SKYLAKE,     0, guc_def(skl, 49, 0, 1), huc_def(skl,  2, 0, 0))
 
 #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
 	"i915/" \
-- 
2.25.1

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[Intel-gfx] [PATCH 10/12] drm/i915/guc: Improved reporting when GuC fails to load

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Rather than just saying 'GuC failed to load: -110', actually print out
the GuC status register and break it down into the individual fields.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 27 ++++++++++++++++++-----
 1 file changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index d4a87f4c9421..eac84baf34e6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -74,8 +74,9 @@ static inline bool guc_ready(struct intel_uncore *uncore, u32 *status)
 		((val & GS_MIA_CORE_STATE) && (uk_val == GS_UKERNEL_LAPIC_DONE));
 }
 
-static int guc_wait_ucode(struct intel_uncore *uncore)
+static int guc_wait_ucode(struct intel_gt *gt)
 {
+	struct intel_uncore *uncore = gt->uncore;
 	u32 status;
 	int ret;
 
@@ -91,16 +92,32 @@ static int guc_wait_ucode(struct intel_uncore *uncore)
 	DRM_DEBUG_DRIVER("GuC status %#x\n", status);
 
 	if ((status & GS_BOOTROM_MASK) == GS_BOOTROM_RSA_FAILED) {
-		DRM_ERROR("GuC firmware signature verification failed\n");
+		drm_err(&gt->i915->drm, "GuC firmware signature verification failed\n");
 		ret = -ENOEXEC;
+		goto out;
 	}
 
 	if ((status & GS_UKERNEL_MASK) == GS_UKERNEL_EXCEPTION) {
-		DRM_ERROR("GuC firmware exception. EIP: %#x\n",
-			  intel_uncore_read(uncore, SOFT_SCRATCH(13)));
+		drm_err(&gt->i915->drm, "GuC firmware exception. EIP: %#x\n",
+			intel_uncore_read(uncore, SOFT_SCRATCH(13)));
 		ret = -ENXIO;
+		goto out;
 	}
 
+	if (ret) {
+		drm_err(&gt->i915->drm, "GuC load failed: status: Reset = %d, "
+			"BootROM = 0x%02X, UKernel = 0x%02X, "
+			"MIA = 0x%02X, Auth = 0x%02X\n",
+			(status >> GS_RESET_SHIFT) & 1,
+			(status & GS_BOOTROM_MASK) >> GS_BOOTROM_SHIFT,
+			(status & GS_UKERNEL_MASK) >> GS_UKERNEL_SHIFT,
+			(status & GS_MIA_MASK) >> GS_MIA_SHIFT,
+			(status & GS_AUTH_STATUS_MASK) >> GS_AUTH_STATUS_SHIFT);
+	}
+
+out:
+	if (ret)
+		drm_err(&gt->i915->drm, "GuC load failed: status = 0x%08X\n", status);
 	return ret;
 }
 
@@ -139,7 +156,7 @@ int intel_guc_fw_upload(struct intel_guc *guc)
 	if (ret)
 		goto out;
 
-	ret = guc_wait_ucode(uncore);
+	ret = guc_wait_ucode(gt);
 	if (ret)
 		goto out;
 
-- 
2.25.1

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[Intel-gfx] [PATCH 11/12] drm/i915/guc: Clear pointers on free

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Was hitting null pointers and similar issues when running various
module load/unload and inject failure type tests. So clear those
pointers down when the objects have been de-allocated.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 7950d28beb8c..5212ff844292 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -220,6 +220,7 @@ int intel_guc_ads_create(struct intel_guc *guc)
 void intel_guc_ads_destroy(struct intel_guc *guc)
 {
 	i915_vma_unpin_and_release(&guc->ads_vma, I915_VMA_RELEASE_MAP);
+	guc->ads_blob = NULL;
 }
 
 static void guc_ads_private_data_reset(struct intel_guc *guc)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 11742fca0e9e..fa9e048cc65f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -210,6 +210,7 @@ void intel_guc_ct_fini(struct intel_guc_ct *ct)
 	GEM_BUG_ON(ct->enabled);
 
 	i915_vma_unpin_and_release(&ct->vma, I915_VMA_RELEASE_MAP);
+	memset(ct, 0, sizeof(*ct));
 }
 
 /**
-- 
2.25.1

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[Intel-gfx] [PATCH 12/12] drm/i915/uc: turn on GuC/HuC auto mode by default

[John.C.Harrison]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

This will enable HuC loading for Gen11+ by default if the binaries
are available on the system. GuC submission still requires explicit
enabling by the user.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/i915_params.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 330c03e2b4f7..7bdbd8f6ed30 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -58,7 +58,7 @@ struct drm_printer;
 	param(int, disable_power_well, -1, 0400) \
 	param(int, enable_ips, 1, 0600) \
 	param(int, invert_brightness, 0, 0600) \
-	param(int, enable_guc, 0, 0400) \
+	param(int, enable_guc, -1, 0400) \
 	param(int, guc_log_level, -1, 0400) \
 	param(char *, guc_firmware_path, NULL, 0400) \
 	param(char *, huc_firmware_path, NULL, 0400) \
-- 
2.25.1

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC v49

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Update to GuC v49
URL   : https://patchwork.freedesktop.org/series/81761/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
b85247eec0d5 drm/i915/guc: New GuC IDs based on engine class and instance
923da8dfc700 drm/i915/guc: Support logical engine mapping table in ADS
a0177d57bb38 drm/i915/guc: Setup private_data pointer in GuC ADS
5f423aca568b drm/i915/guc: Remove GUC_CTL_CTXINFO init param
64ae9427b7d7 drm/i915/guc: Kill guc_ads.reg_state_buffer
f93beff182b6 drm/i915/guc: ADS changes for GuC v42
bfb299260ee6 drm/i915/guc: Setup doorbells data in ADS
0ee8c9ccbc81 drm/i915/guc: Increased engine classes in ADS
-:40: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#40: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:167:
+		blob->system_info.generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_DOORBELL_COUNT_PER_SQIDI] =

total: 0 errors, 1 warnings, 0 checks, 65 lines checked
f61c746b164f drm/i915/guc: Update firmware to v49.0.1
4e7c8483904f drm/i915/guc: Improved reporting when GuC fails to load
44b2ad598451 drm/i915/guc: Clear pointers on free
ea57f0f58d2b drm/i915/uc: turn on GuC/HuC auto mode by default


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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 14732 bytes --]

== Series Details ==

Series: drm/i915/guc: Update to GuC v49
URL   : https://patchwork.freedesktop.org/series/81761/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9019 -> Patchwork_18516
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_18516 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18516, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18516:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_huc_copy@huc-copy:
    - fi-cfl-guc:         [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-guc:         [PASS][3] -> [FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-guc/igt@gem_huc_copy@huc-copy.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-guc/igt@gem_huc_copy@huc-copy.html
    - fi-skl-guc:         [PASS][5] -> [FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-skl-guc/igt@gem_huc_copy@huc-copy.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-guc/igt@gem_huc_copy@huc-copy.html

  
#### Warnings ####

  * igt@gem_huc_copy@huc-copy:
    - fi-cml-u2:          [SKIP][7] ([i915#2190]) -> [SKIP][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cml-u2/igt@gem_huc_copy@huc-copy.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cml-u2/igt@gem_huc_copy@huc-copy.html
    - fi-cml-s:           [SKIP][9] ([i915#2190]) -> [SKIP][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cml-s/igt@gem_huc_copy@huc-copy.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cml-s/igt@gem_huc_copy@huc-copy.html
    - fi-icl-y:           [SKIP][11] ([i915#2190]) -> [FAIL][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-y/igt@gem_huc_copy@huc-copy.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-y/igt@gem_huc_copy@huc-copy.html
    - fi-icl-u2:          [SKIP][13] ([i915#2190]) -> [FAIL][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@gem_huc_copy@huc-copy.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_huc_copy@huc-copy:
    - {fi-ehl-1}:         [SKIP][15] ([i915#2190]) -> [FAIL][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-ehl-1/igt@gem_huc_copy@huc-copy.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-ehl-1/igt@gem_huc_copy@huc-copy.html
    - {fi-tgl-dsi}:       [SKIP][17] ([i915#2190]) -> [FAIL][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-dsi/igt@gem_huc_copy@huc-copy.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-dsi/igt@gem_huc_copy@huc-copy.html

  
Known issues
------------

  Here are the changes found in Patchwork_18516 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-tgl-y:           [PASS][19] -> [DMESG-FAIL][20] ([i915#402])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@gem_huc_copy@huc-copy.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@gem_huc_copy@huc-copy.html
    - fi-apl-guc:         [PASS][21] -> [FAIL][22] ([i915#1635])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-apl-guc/igt@gem_huc_copy@huc-copy.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-apl-guc/igt@gem_huc_copy@huc-copy.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-byt-j1900:       [PASS][23] -> [DMESG-WARN][24] ([i915#1982])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-icl-u2:          [PASS][25] -> [DMESG-WARN][26] ([i915#1982])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-c:
    - fi-tgl-y:           [PASS][27] -> [DMESG-WARN][28] ([i915#1982]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html

  
#### Possible fixes ####

  * igt@gem_tiled_fence_blits@basic:
    - fi-tgl-y:           [DMESG-WARN][29] ([i915#402]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@gem_tiled_fence_blits@basic.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@gem_tiled_fence_blits@basic.html

  * igt@i915_module_load@reload:
    - {fi-tgl-dsi}:       [DMESG-WARN][31] ([i915#1982] / [k.org#205379]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-dsi/igt@i915_module_load@reload.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-dsi/igt@i915_module_load@reload.html
    - fi-byt-j1900:       [DMESG-WARN][33] ([i915#1982]) -> [PASS][34] +2 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-byt-j1900/igt@i915_module_load@reload.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-byt-j1900/igt@i915_module_load@reload.html
    - fi-apl-guc:         [DMESG-WARN][35] ([i915#1635] / [i915#1982]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-apl-guc/igt@i915_module_load@reload.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-apl-guc/igt@i915_module_load@reload.html
    - fi-tgl-y:           [DMESG-WARN][37] ([i915#1982] / [k.org#205379]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@i915_module_load@reload.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@i915_module_load@reload.html

  * igt@kms_busy@basic@modeset:
    - fi-tgl-y:           [DMESG-WARN][39] ([i915#1982]) -> [PASS][40] +2 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@kms_busy@basic@modeset.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@kms_busy@basic@modeset.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - fi-icl-u2:          [DMESG-WARN][41] ([i915#1982]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
#### Warnings ####

  * igt@gem_huc_copy@huc-copy:
    - fi-skl-6600u:       [SKIP][43] ([fdo#109271] / [i915#2190]) -> [SKIP][44] ([fdo#109271])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-soraka:      [SKIP][45] ([fdo#109271] / [i915#2190]) -> [SKIP][46] ([fdo#109271])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
    - fi-skl-lmem:        [SKIP][47] ([fdo#109271] / [i915#2190]) -> [SKIP][48] ([fdo#109271])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-skl-lmem/igt@gem_huc_copy@huc-copy.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-lmem/igt@gem_huc_copy@huc-copy.html
    - fi-glk-dsi:         [SKIP][49] ([fdo#109271] / [i915#2190]) -> [SKIP][50] ([fdo#109271])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-x1275:       [SKIP][51] ([fdo#109271] / [i915#2190]) -> [SKIP][52] ([fdo#109271])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-7500u:       [SKIP][53] ([fdo#109271] / [i915#2190]) -> [SKIP][54] ([fdo#109271])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-7500u/igt@gem_huc_copy@huc-copy.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-7500u/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-r:           [SKIP][55] ([fdo#109271] / [i915#2190]) -> [SKIP][56] ([fdo#109271])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-r/igt@gem_huc_copy@huc-copy.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-r/igt@gem_huc_copy@huc-copy.html
    - fi-cfl-8109u:       [SKIP][57] ([fdo#109271] / [i915#2190]) -> [SKIP][58] ([fdo#109271])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html
    - fi-bxt-dsi:         [SKIP][59] ([fdo#109271] / [i915#1635] / [i915#2190]) -> [SKIP][60] ([fdo#109271] / [i915#1635])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html
    - fi-cfl-8700k:       [SKIP][61] ([fdo#109271] / [i915#2190]) -> [SKIP][62] ([fdo#109271])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cfl-8700k/igt@gem_huc_copy@huc-copy.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-8700k/igt@gem_huc_copy@huc-copy.html

  * igt@i915_module_load@reload:
    - fi-kbl-x1275:       [DMESG-WARN][63] ([i915#62] / [i915#92]) -> [DMESG-WARN][64] ([i915#62] / [i915#92] / [i915#95])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@i915_module_load@reload.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [DMESG-FAIL][65] ([i915#62]) -> [DMESG-FAIL][66] ([i915#62] / [i915#95])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
    - fi-kbl-guc:         [DMESG-WARN][67] ([i915#2203]) -> [SKIP][68] ([fdo#109271])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - fi-kbl-x1275:       [DMESG-WARN][69] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][70] ([i915#62] / [i915#92]) +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
  [k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379


Participating hosts (45 -> 39)
------------------------------

  Additional (1): fi-skl-6700k2 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_9019 -> Patchwork_18516

  CI-20190529: 20190529
  CI_DRM_9019: 038c228475ce10a6f9cc4052250a1315f3c7c627 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5786: 222051026b978ebbc0dc58db62d7a1f29728f95f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18516: ea57f0f58d2b987626cf191fe047e315401332d6 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

ea57f0f58d2b drm/i915/uc: turn on GuC/HuC auto mode by default
44b2ad598451 drm/i915/guc: Clear pointers on free
4e7c8483904f drm/i915/guc: Improved reporting when GuC fails to load
f61c746b164f drm/i915/guc: Update firmware to v49.0.1
0ee8c9ccbc81 drm/i915/guc: Increased engine classes in ADS
bfb299260ee6 drm/i915/guc: Setup doorbells data in ADS
f93beff182b6 drm/i915/guc: ADS changes for GuC v42
64ae9427b7d7 drm/i915/guc: Kill guc_ads.reg_state_buffer
5f423aca568b drm/i915/guc: Remove GUC_CTL_CTXINFO init param
a0177d57bb38 drm/i915/guc: Setup private_data pointer in GuC ADS
923da8dfc700 drm/i915/guc: Support logical engine mapping table in ADS
b85247eec0d5 drm/i915/guc: New GuC IDs based on engine class and instance

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/index.html

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49

[John Harrison]

[-- Attachment #1.1: Type: text/plain, Size: 19750 bytes --]

Hello,

The failures below all appear to be because the new GuC firmware was not 
found on the test system.

My understanding is that all we need to do to get the CI system to 
update with new firmwares is to push the firmware to a branch on the FDO 
drm-firmware repo and then send a pull request to this mailing list. 
That was done yesterday.

Is there some other step we need to do? Or do I just need to wait longer 
between the PR and sending the patches?

John.


On 9/16/2020 11:35, Patchwork wrote:
> Project List - Patchwork *Patch Details*
> *Series:* 	drm/i915/guc: Update to GuC v49
> *URL:* 	https://patchwork.freedesktop.org/series/81761/
> *State:* 	failure
> *Details:* 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/index.html
>
>
>   CI Bug Log - changes from CI_DRM_9019 -> Patchwork_18516
>
>
>     Summary
>
> *FAILURE*
>
> Serious unknown changes coming with Patchwork_18516 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_18516, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives 
> in CI.
>
> External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/index.html
>
>
>     Possible new issues
>
> Here are the unknown changes that may have been introduced in 
> Patchwork_18516:
>
>
>       IGT changes
>
>
>         Possible regressions
>
>  *
>
>     igt@gem_huc_copy@huc-copy:
>
>      o
>
>         fi-cfl-guc: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html>
>         -> FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html>
>
>      o
>
>         fi-kbl-guc: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-guc/igt@gem_huc_copy@huc-copy.html>
>         -> FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-guc/igt@gem_huc_copy@huc-copy.html>
>
>      o
>
>         fi-skl-guc: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-skl-guc/igt@gem_huc_copy@huc-copy.html>
>         -> FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-guc/igt@gem_huc_copy@huc-copy.html>
>
>
>         Warnings
>
>  *
>
>     igt@gem_huc_copy@huc-copy:
>
>      o
>
>         fi-cml-u2: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cml-u2/igt@gem_huc_copy@huc-copy.html>
>         (i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cml-u2/igt@gem_huc_copy@huc-copy.html>
>
>      o
>
>         fi-cml-s: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cml-s/igt@gem_huc_copy@huc-copy.html>
>         (i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cml-s/igt@gem_huc_copy@huc-copy.html>
>
>      o
>
>         fi-icl-y: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-y/igt@gem_huc_copy@huc-copy.html>
>         (i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-y/igt@gem_huc_copy@huc-copy.html>
>
>      o
>
>         fi-icl-u2: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-u2/igt@gem_huc_copy@huc-copy.html>
>         (i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@gem_huc_copy@huc-copy.html>
>
>
>         Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
>  *
>
>     igt@gem_huc_copy@huc-copy:
>
>      o
>
>         {fi-ehl-1}: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-ehl-1/igt@gem_huc_copy@huc-copy.html>
>         (i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-ehl-1/igt@gem_huc_copy@huc-copy.html>
>
>      o
>
>         {fi-tgl-dsi}: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-dsi/igt@gem_huc_copy@huc-copy.html>
>         (i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-dsi/igt@gem_huc_copy@huc-copy.html>
>
>
>     Known issues
>
> Here are the changes found in Patchwork_18516 that come from known issues:
>
>
>       IGT changes
>
>
>         Issues hit
>
>  *
>
>     igt@gem_huc_copy@huc-copy:
>
>      o
>
>         fi-tgl-y: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@gem_huc_copy@huc-copy.html>
>         -> DMESG-FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@gem_huc_copy@huc-copy.html>
>         (i915#402 <https://gitlab.freedesktop.org/drm/intel/issues/402>)
>
>      o
>
>         fi-apl-guc: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-apl-guc/igt@gem_huc_copy@huc-copy.html>
>         -> FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-apl-guc/igt@gem_huc_copy@huc-copy.html>
>         (i915#1635 <https://gitlab.freedesktop.org/drm/intel/issues/1635>)
>
>  *
>
>     igt@i915_pm_rpm@basic-pci-d3-state:
>
>       o fi-byt-j1900: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html>
>         -> DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html>
>         (i915#1982 <https://gitlab.freedesktop.org/drm/intel/issues/1982>)
>  *
>
>     igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
>
>       o fi-icl-u2: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html>
>         -> DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html>
>         (i915#1982 <https://gitlab.freedesktop.org/drm/intel/issues/1982>)
>  *
>
>     igt@kms_pipe_crc_basic@read-crc-pipe-c:
>
>       o fi-tgl-y: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html>
>         -> DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html>
>         (i915#1982
>         <https://gitlab.freedesktop.org/drm/intel/issues/1982>) +1
>         similar issue
>
>
>         Possible fixes
>
>  *
>
>     igt@gem_tiled_fence_blits@basic:
>
>       o fi-tgl-y: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@gem_tiled_fence_blits@basic.html>
>         (i915#402
>         <https://gitlab.freedesktop.org/drm/intel/issues/402>) -> PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@gem_tiled_fence_blits@basic.html>
>  *
>
>     igt@i915_module_load@reload:
>
>      o
>
>         {fi-tgl-dsi}: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-dsi/igt@i915_module_load@reload.html>
>         (i915#1982
>         <https://gitlab.freedesktop.org/drm/intel/issues/1982> /
>         k.org#205379
>         <https://bugzilla.kernel.org/show_bug.cgi?id=205379>) -> PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-dsi/igt@i915_module_load@reload.html>
>
>      o
>
>         fi-byt-j1900: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-byt-j1900/igt@i915_module_load@reload.html>
>         (i915#1982
>         <https://gitlab.freedesktop.org/drm/intel/issues/1982>) ->
>         PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-byt-j1900/igt@i915_module_load@reload.html>
>         +2 similar issues
>
>      o
>
>         fi-apl-guc: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-apl-guc/igt@i915_module_load@reload.html>
>         (i915#1635
>         <https://gitlab.freedesktop.org/drm/intel/issues/1635> /
>         i915#1982
>         <https://gitlab.freedesktop.org/drm/intel/issues/1982>) ->
>         PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-apl-guc/igt@i915_module_load@reload.html>
>         +1 similar issue
>
>      o
>
>         fi-tgl-y: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@i915_module_load@reload.html>
>         (i915#1982
>         <https://gitlab.freedesktop.org/drm/intel/issues/1982> /
>         k.org#205379
>         <https://bugzilla.kernel.org/show_bug.cgi?id=205379>) -> PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@i915_module_load@reload.html>
>
>  *
>
>     igt@kms_busy@basic@modeset:
>
>       o fi-tgl-y: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@kms_busy@basic@modeset.html>
>         (i915#1982
>         <https://gitlab.freedesktop.org/drm/intel/issues/1982>) ->
>         PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-y/igt@kms_busy@basic@modeset.html>
>         +2 similar issues
>  *
>
>     igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
>
>       o fi-icl-u2: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html>
>         (i915#1982
>         <https://gitlab.freedesktop.org/drm/intel/issues/1982>) ->
>         PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html>
>
>
>         Warnings
>
>  *
>
>     igt@gem_huc_copy@huc-copy:
>
>      o
>
>         fi-skl-6600u: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-kbl-soraka: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-skl-lmem: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-skl-lmem/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-lmem/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-glk-dsi: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-kbl-x1275: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-kbl-7500u: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-7500u/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-7500u/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-kbl-r: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-r/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-r/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-cfl-8109u: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>      o
>
>         fi-bxt-dsi: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#1635
>         <https://gitlab.freedesktop.org/drm/intel/issues/1635> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#1635 <https://gitlab.freedesktop.org/drm/intel/issues/1635>)
>
>      o
>
>         fi-cfl-8700k: SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-cfl-8700k/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271
>         <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
>         i915#2190
>         <https://gitlab.freedesktop.org/drm/intel/issues/2190>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-8700k/igt@gem_huc_copy@huc-copy.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>  *
>
>     igt@i915_module_load@reload:
>
>       o fi-kbl-x1275: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@i915_module_load@reload.html>
>         (i915#62 <https://gitlab.freedesktop.org/drm/intel/issues/62>
>         / i915#92
>         <https://gitlab.freedesktop.org/drm/intel/issues/92>) ->
>         DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@i915_module_load@reload.html>
>         (i915#62 <https://gitlab.freedesktop.org/drm/intel/issues/62>
>         / i915#92 <https://gitlab.freedesktop.org/drm/intel/issues/92>
>         / i915#95 <https://gitlab.freedesktop.org/drm/intel/issues/95>)
>  *
>
>     igt@i915_pm_rpm@module-reload:
>
>      o
>
>         fi-kbl-x1275: DMESG-FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html>
>         (i915#62 <https://gitlab.freedesktop.org/drm/intel/issues/62>)
>         -> DMESG-FAIL
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html>
>         (i915#62 <https://gitlab.freedesktop.org/drm/intel/issues/62>
>         / i915#95 <https://gitlab.freedesktop.org/drm/intel/issues/95>)
>
>      o
>
>         fi-kbl-guc: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html>
>         (i915#2203
>         <https://gitlab.freedesktop.org/drm/intel/issues/2203>) ->
>         SKIP
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html>
>         (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
>
>  *
>
>     igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
>
>       o fi-kbl-x1275: DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html>
>         (i915#62 <https://gitlab.freedesktop.org/drm/intel/issues/62>
>         / i915#92 <https://gitlab.freedesktop.org/drm/intel/issues/92>
>         / i915#95
>         <https://gitlab.freedesktop.org/drm/intel/issues/95>) ->
>         DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html>
>         (i915#62 <https://gitlab.freedesktop.org/drm/intel/issues/62>
>         / i915#92
>         <https://gitlab.freedesktop.org/drm/intel/issues/92>) +2
>         similar issues
>
> {name}: This element is suppressed. This means it is ignored when 
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
>
>     Participating hosts (45 -> 39)
>
> Additional (1): fi-skl-6700k2
> Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
> fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
>
>
>     Build changes
>
>   * Linux: CI_DRM_9019 -> Patchwork_18516
>
> CI-20190529: 20190529
> CI_DRM_9019: 038c228475ce10a6f9cc4052250a1315f3c7c627 @ 
> git://anongit.freedesktop.org/gfx-ci/linux
> IGT_5786: 222051026b978ebbc0dc58db62d7a1f29728f95f @ 
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> Patchwork_18516: ea57f0f58d2b987626cf191fe047e315401332d6 @ 
> git://anongit.freedesktop.org/gfx-ci/linux
>
> == Linux commits ==
>
> ea57f0f58d2b drm/i915/uc: turn on GuC/HuC auto mode by default
> 44b2ad598451 drm/i915/guc: Clear pointers on free
> 4e7c8483904f drm/i915/guc: Improved reporting when GuC fails to load
> f61c746b164f drm/i915/guc: Update firmware to v49.0.1
> 0ee8c9ccbc81 drm/i915/guc: Increased engine classes in ADS
> bfb299260ee6 drm/i915/guc: Setup doorbells data in ADS
> f93beff182b6 drm/i915/guc: ADS changes for GuC v42
> 64ae9427b7d7 drm/i915/guc: Kill guc_ads.reg_state_buffer
> 5f423aca568b drm/i915/guc: Remove GUC_CTL_CTXINFO init param
> a0177d57bb38 drm/i915/guc: Setup private_data pointer in GuC ADS
> 923da8dfc700 drm/i915/guc: Support logical engine mapping table in ADS
> b85247eec0d5 drm/i915/guc: New GuC IDs based on engine class and instance
>


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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49

[Saarinen, Jani]

+ Tomi

> -----Original Message-----
> From: John Harrison <John.C.Harrison@Intel.com>
> Sent: torstai 17. syyskuuta 2020 4.23
> To: intel-gfx@lists.freedesktop.org; Latvala, Petri <petri.latvala@intel.com>;
> Saarinen, Jani <jani.saarinen@intel.com>; Szwichtenberg, Radoslaw
> <radoslaw.szwichtenberg@intel.com>
> Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49
> 
> Hello,
> 
> The failures below all appear to be because the new GuC firmware was not found on
> the test system.
> 
> My understanding is that all we need to do to get the CI system to update with new
> firmwares is to push the firmware to a branch on the FDO drm-firmware repo and
> then send a pull request to this mailing list. That was done yesterday.
> 
> Is there some other step we need to do? Or do I just need to wait longer between
> the PR and sending the patches?
> 
> John.
> 
> 
> On 9/16/2020 11:35, Patchwork wrote:
> 
> 
> 	Patch Details
> Series:	 drm/i915/guc: Update to GuC v49
> URL:	 https://patchwork.freedesktop.org/series/81761/
> State:	 failure
> Details:	 https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/index.html
> 
> 	CI Bug Log - changes from CI_DRM_9019 -> Patchwork_18516
> 
> 
> 	Summary
> 
> 
> 	FAILURE
> 
> 	Serious unknown changes coming with Patchwork_18516 absolutely need to
> be
> 	verified manually.
> 
> 	If you think the reported changes have nothing to do with the changes
> 	introduced in Patchwork_18516, please notify your bug team to allow them
> 	to document this new failure mode, which will reduce false positives in CI.
> 
> 	External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_18516/index.html
> 
> 
> 	Possible new issues
> 
> 
> 	Here are the unknown changes that may have been introduced in
> Patchwork_18516:
> 
> 
> 	IGT changes
> 
> 
> 	Possible regressions
> 
> 
> 	*	igt@gem_huc_copy@huc-copy:
> 
> 		*	fi-cfl-guc: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html>  -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-
> guc/igt@gem_huc_copy@huc-copy.html>
> 
> 		*	fi-kbl-guc: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-kbl-guc/igt@gem_huc_copy@huc-copy.html>  -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-
> guc/igt@gem_huc_copy@huc-copy.html>
> 
> 		*	fi-skl-guc: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-skl-guc/igt@gem_huc_copy@huc-copy.html>  -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-
> guc/igt@gem_huc_copy@huc-copy.html>
> 
> 
> 	Warnings
> 
> 
> 	*	igt@gem_huc_copy@huc-copy:
> 
> 		*	fi-cml-u2: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-cml-u2/igt@gem_huc_copy@huc-copy.html>  (i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-cml-u2/igt@gem_huc_copy@huc-
> copy.html>
> 
> 		*	fi-cml-s: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-cml-s/igt@gem_huc_copy@huc-copy.html>  (i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-cml-s/igt@gem_huc_copy@huc-
> copy.html>
> 
> 		*	fi-icl-y: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-icl-y/igt@gem_huc_copy@huc-copy.html>  (i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> FAIL <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-y/igt@gem_huc_copy@huc-
> copy.html>
> 
> 		*	fi-icl-u2: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-icl-u2/igt@gem_huc_copy@huc-copy.html>  (i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> FAIL <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@gem_huc_copy@huc-
> copy.html>
> 
> 
> 	Suppressed
> 
> 
> 	The following results come from untrusted machines, tests, or statuses.
> 	They do not affect the overall result.
> 
> 	*	igt@gem_huc_copy@huc-copy:
> 
> 		*	{fi-ehl-1}: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-ehl-1/igt@gem_huc_copy@huc-copy.html>  (i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> FAIL <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-ehl-1/igt@gem_huc_copy@huc-
> copy.html>
> 
> 		*	{fi-tgl-dsi}: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-tgl-dsi/igt@gem_huc_copy@huc-copy.html>  (i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> FAIL <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-dsi/igt@gem_huc_copy@huc-
> copy.html>
> 
> 
> 	Known issues
> 
> 
> 	Here are the changes found in Patchwork_18516 that come from known
> issues:
> 
> 
> 	IGT changes
> 
> 
> 	Issues hit
> 
> 
> 	*	igt@gem_huc_copy@huc-copy:
> 
> 		*	fi-tgl-y: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-tgl-y/igt@gem_huc_copy@huc-copy.html>  -> DMESG-FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-
> y/igt@gem_huc_copy@huc-copy.html>  (i915#402
> <https://gitlab.freedesktop.org/drm/intel/issues/402> )
> 
> 		*	fi-apl-guc: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-apl-guc/igt@gem_huc_copy@huc-copy.html>  -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-apl-
> guc/igt@gem_huc_copy@huc-copy.html>  (i915#1635
> <https://gitlab.freedesktop.org/drm/intel/issues/1635> )
> 
> 	*	igt@i915_pm_rpm@basic-pci-d3-state:
> 
> 		*	fi-byt-j1900: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html>  ->
> DMESG-WARN <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-byt-
> j1900/igt@i915_pm_rpm@basic-pci-d3-state.html>  (i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982> )
> 
> 	*	igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
> 
> 		*	fi-icl-u2: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-
> legacy.html>  -> DMESG-WARN <https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_18516/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-
> cursor-legacy.html>  (i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982> )
> 
> 	*	igt@kms_pipe_crc_basic@read-crc-pipe-c:
> 
> 		*	fi-tgl-y: PASS <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html>  ->
> DMESG-WARN <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-
> y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html>  (i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982> ) +1 similar issue
> 
> 
> 	Possible fixes
> 
> 
> 	*	igt@gem_tiled_fence_blits@basic:
> 
> 		*	fi-tgl-y: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-
> y/igt@gem_tiled_fence_blits@basic.html>  (i915#402
> <https://gitlab.freedesktop.org/drm/intel/issues/402> ) -> PASS <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-
> y/igt@gem_tiled_fence_blits@basic.html>
> 
> 	*	igt@i915_module_load@reload:
> 
> 		*	{fi-tgl-dsi}: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-
> dsi/igt@i915_module_load@reload.html>  (i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982>  / k.org#205379
> <https://bugzilla.kernel.org/show_bug.cgi?id=205379> ) -> PASS <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-
> dsi/igt@i915_module_load@reload.html>
> 
> 		*	fi-byt-j1900: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-byt-
> j1900/igt@i915_module_load@reload.html>  (i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982> ) -> PASS <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-byt-
> j1900/igt@i915_module_load@reload.html>  +2 similar issues
> 
> 		*	fi-apl-guc: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-apl-
> guc/igt@i915_module_load@reload.html>  (i915#1635
> <https://gitlab.freedesktop.org/drm/intel/issues/1635>  / i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982> ) -> PASS <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-apl-
> guc/igt@i915_module_load@reload.html>  +1 similar issue
> 
> 		*	fi-tgl-y: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-y/igt@i915_module_load@reload.html>
> (i915#1982 <https://gitlab.freedesktop.org/drm/intel/issues/1982>  / k.org#205379
> <https://bugzilla.kernel.org/show_bug.cgi?id=205379> ) -> PASS <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-
> y/igt@i915_module_load@reload.html>
> 
> 	*	igt@kms_busy@basic@modeset:
> 
> 		*	fi-tgl-y: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-tgl-
> y/igt@kms_busy@basic@modeset.html>  (i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982> ) -> PASS <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-tgl-
> y/igt@kms_busy@basic@modeset.html>  +2 similar issues
> 
> 	*	igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
> 
> 		*	fi-icl-u2: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-icl-u2/igt@kms_flip@basic-flip-vs-
> wf_vblank@c-edp1.html>  (i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982> ) -> PASS <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-icl-u2/igt@kms_flip@basic-flip-vs-
> wf_vblank@c-edp1.html>
> 
> 
> 	Warnings
> 
> 
> 	*	igt@gem_huc_copy@huc-copy:
> 
> 		*	fi-skl-6600u: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-6600u/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-kbl-soraka: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-soraka/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-skl-lmem: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-skl-lmem/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-skl-lmem/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-glk-dsi: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-glk-dsi/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-kbl-x1275: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-x1275/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-kbl-7500u: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-kbl-7500u/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-7500u/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-kbl-r: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-kbl-r/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-r/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-cfl-8109u: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-8109u/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 		*	fi-bxt-dsi: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#1635
> <https://gitlab.freedesktop.org/drm/intel/issues/1635>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-bxt-dsi/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>
> / i915#1635 <https://gitlab.freedesktop.org/drm/intel/issues/1635> )
> 
> 		*	fi-cfl-8700k: SKIP <https://intel-gfx-ci.01.org/tree/drm-
> tip/CI_DRM_9019/fi-cfl-8700k/igt@gem_huc_copy@huc-copy.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>  / i915#2190
> <https://gitlab.freedesktop.org/drm/intel/issues/2190> ) -> SKIP <https://intel-gfx-
> ci.01.org/tree/drm-tip/Patchwork_18516/fi-cfl-8700k/igt@gem_huc_copy@huc-
> copy.html>  (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 	*	igt@i915_module_load@reload:
> 
> 		*	fi-kbl-x1275: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-
> x1275/igt@i915_module_load@reload.html>  (i915#62
> <https://gitlab.freedesktop.org/drm/intel/issues/62>  / i915#92
> <https://gitlab.freedesktop.org/drm/intel/issues/92> ) -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-
> x1275/igt@i915_module_load@reload.html>  (i915#62
> <https://gitlab.freedesktop.org/drm/intel/issues/62>  / i915#92
> <https://gitlab.freedesktop.org/drm/intel/issues/92>  / i915#95
> <https://gitlab.freedesktop.org/drm/intel/issues/95> )
> 
> 	*	igt@i915_pm_rpm@module-reload:
> 
> 		*	fi-kbl-x1275: DMESG-FAIL <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-x1275/igt@i915_pm_rpm@module-
> reload.html>  (i915#62 <https://gitlab.freedesktop.org/drm/intel/issues/62> ) ->
> DMESG-FAIL <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-
> x1275/igt@i915_pm_rpm@module-reload.html>  (i915#62
> <https://gitlab.freedesktop.org/drm/intel/issues/62>  / i915#95
> <https://gitlab.freedesktop.org/drm/intel/issues/95> )
> 
> 		*	fi-kbl-guc: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-guc/igt@i915_pm_rpm@module-
> reload.html>  (i915#2203 <https://gitlab.freedesktop.org/drm/intel/issues/2203> ) -
> > SKIP <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-
> guc/igt@i915_pm_rpm@module-reload.html>  (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> )
> 
> 	*	igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
> 
> 		*	fi-kbl-x1275: DMESG-WARN <https://intel-gfx-
> ci.01.org/tree/drm-tip/CI_DRM_9019/fi-kbl-
> x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html>  (i915#62
> <https://gitlab.freedesktop.org/drm/intel/issues/62>  / i915#92
> <https://gitlab.freedesktop.org/drm/intel/issues/92>  / i915#95
> <https://gitlab.freedesktop.org/drm/intel/issues/95> ) -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18516/fi-kbl-
> x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html>  (i915#62
> <https://gitlab.freedesktop.org/drm/intel/issues/62>  / i915#92
> <https://gitlab.freedesktop.org/drm/intel/issues/92> ) +2 similar issues
> 
> 	{name}: This element is suppressed. This means it is ignored when
> computing
> 	the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
> 
> 	Participating hosts (45 -> 39)
> 
> 
> 	Additional (1): fi-skl-6700k2
> 	Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-
> p8600 fi-byt-clapper fi-bdw-samus
> 
> 
> 	Build changes
> 
> 
> 	*	Linux: CI_DRM_9019 -> Patchwork_18516
> 
> 	CI-20190529: 20190529
> 	CI_DRM_9019: 038c228475ce10a6f9cc4052250a1315f3c7c627 @
> git://anongit.freedesktop.org/gfx-ci/linux
> 	IGT_5786: 222051026b978ebbc0dc58db62d7a1f29728f95f @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> 	Patchwork_18516: ea57f0f58d2b987626cf191fe047e315401332d6 @
> git://anongit.freedesktop.org/gfx-ci/linux
> 
> 	== Linux commits ==
> 
> 	ea57f0f58d2b drm/i915/uc: turn on GuC/HuC auto mode by default
> 	44b2ad598451 drm/i915/guc: Clear pointers on free
> 	4e7c8483904f drm/i915/guc: Improved reporting when GuC fails to load
> 	f61c746b164f drm/i915/guc: Update firmware to v49.0.1
> 	0ee8c9ccbc81 drm/i915/guc: Increased engine classes in ADS
> 	bfb299260ee6 drm/i915/guc: Setup doorbells data in ADS
> 	f93beff182b6 drm/i915/guc: ADS changes for GuC v42
> 	64ae9427b7d7 drm/i915/guc: Kill guc_ads.reg_state_buffer
> 	5f423aca568b drm/i915/guc: Remove GUC_CTL_CTXINFO init param
> 	a0177d57bb38 drm/i915/guc: Setup private_data pointer in GuC ADS
> 	923da8dfc700 drm/i915/guc: Support logical engine mapping table in ADS
> 	b85247eec0d5 drm/i915/guc: New GuC IDs based on engine class and
> instance
> 

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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49

[Petri Latvala]

On Wed, Sep 16, 2020 at 06:22:45PM -0700, John Harrison wrote:
> Hello,
> 
> The failures below all appear to be because the new GuC firmware was not
> found on the test system.
> 
> My understanding is that all we need to do to get the CI system to update
> with new firmwares is to push the firmware to a branch on the FDO
> drm-firmware repo and then send a pull request to this mailing list. That
> was done yesterday.

That pull request used an ssh:// url though. Can you send it again
with a git:// url? I suppose that's a plausible reason why I don't see
the binaries in CI's deploy dir.


-- 
Petri Latvala
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49

[John Harrison]

On 9/16/2020 23:48, Petri Latvala wrote:
> On Wed, Sep 16, 2020 at 06:22:45PM -0700, John Harrison wrote:
>> Hello,
>>
>> The failures below all appear to be because the new GuC firmware was not
>> found on the test system.
>>
>> My understanding is that all we need to do to get the CI system to update
>> with new firmwares is to push the firmware to a branch on the FDO
>> drm-firmware repo and then send a pull request to this mailing list. That
>> was done yesterday.
> That pull request used an ssh:// url though. Can you send it again
> with a git:// url? I suppose that's a plausible reason why I don't see
> the binaries in CI's deploy dir.
>

Hello,

We reset the pull request with a git:// URL as requested. I even gave it 
a full weekend to propagate through. However, I am still getting missing 
firmware failures after posting a new patch set.

John.

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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49

[Daniele Ceraolo Spurio]

On 9/21/2020 12:22 PM, John Harrison wrote:
> On 9/16/2020 23:48, Petri Latvala wrote:
>> On Wed, Sep 16, 2020 at 06:22:45PM -0700, John Harrison wrote:
>>> Hello,
>>>
>>> The failures below all appear to be because the new GuC firmware was 
>>> not
>>> found on the test system.
>>>
>>> My understanding is that all we need to do to get the CI system to 
>>> update
>>> with new firmwares is to push the firmware to a branch on the FDO
>>> drm-firmware repo and then send a pull request to this mailing list. 
>>> That
>>> was done yesterday.
>> That pull request used an ssh:// url though. Can you send it again
>> with a git:// url? I suppose that's a plausible reason why I don't see
>> the binaries in CI's deploy dir.
>>
>
> Hello,
>
> We reset the pull request with a git:// URL as requested. I even gave 
> it a full weekend to propagate through. However, I am still getting 
> missing firmware failures after posting a new patch set.
>
> John.
>

You sure you're looking at the correct logs? AFAICS BAT on the new 
patches passed (https://patchwork.freedesktop.org/series/81906/) and I 
see the correct GuC being loaded in the logs.
e.g. 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18542/fi-icl-u2/boot0.txt:

<6>[    9.283866] i915 0000:00:02.0: [drm] GuC firmware 
i915/icl_guc_49.0.1.bin version 49.0 submission:disabled

Daniele
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49

[John Harrison]

On 9/21/2020 13:36, Daniele Ceraolo Spurio wrote:
> On 9/21/2020 12:22 PM, John Harrison wrote:
>> On 9/16/2020 23:48, Petri Latvala wrote:
>>> On Wed, Sep 16, 2020 at 06:22:45PM -0700, John Harrison wrote:
>>>> Hello,
>>>>
>>>> The failures below all appear to be because the new GuC firmware 
>>>> was not
>>>> found on the test system.
>>>>
>>>> My understanding is that all we need to do to get the CI system to 
>>>> update
>>>> with new firmwares is to push the firmware to a branch on the FDO
>>>> drm-firmware repo and then send a pull request to this mailing 
>>>> list. That
>>>> was done yesterday.
>>> That pull request used an ssh:// url though. Can you send it again
>>> with a git:// url? I suppose that's a plausible reason why I don't see
>>> the binaries in CI's deploy dir.
>>>
>>
>> Hello,
>>
>> We reset the pull request with a git:// URL as requested. I even gave 
>> it a full weekend to propagate through. However, I am still getting 
>> missing firmware failures after posting a new patch set.
>>
>> John.
>>
>
> You sure you're looking at the correct logs? AFAICS BAT on the new 
> patches passed (https://patchwork.freedesktop.org/series/81906/) and I 
> see the correct GuC being loaded in the logs.
> e.g. 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18542/fi-icl-u2/boot0.txt:
>
> <6>[    9.283866] i915 0000:00:02.0: [drm] GuC firmware 
> i915/icl_guc_49.0.1.bin version 49.0 submission:disabled
>
> Daniele

Grrr. When I downloaded the dmesg.txt it saved is as dmesg.txt.1. So 
yes, I was looking at a stale log :(.

I guess the other question is are we supposed to be supporting HuC by 
default on KBL? It is running the gem_huc_copy test but we have only 
enabled GuC/HuC loading on Gen11+ platforms.

John.

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Re: [Intel-gfx] [PATCH 00/12] drm/i915/guc: Update to GuC v49

[Daniele Ceraolo Spurio]

On 9/16/2020 10:16 AM, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Update to the latest GuC firmware and enable by default.

Missing a big note to make it clear that all these patches have to be 
squashed into one before pushing.

Daniele

>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>
>
> Daniele Ceraolo Spurio (1):
>    drm/i915/uc: turn on GuC/HuC auto mode by default
>
> John Harrison (5):
>    drm/i915/guc: ADS changes for GuC v42
>    drm/i915/guc: Increased engine classes in ADS
>    drm/i915/guc: Update firmware to v49.0.1
>    drm/i915/guc: Improved reporting when GuC fails to load
>    drm/i915/guc: Clear pointers on free
>
> Matthew Brost (3):
>    drm/i915/guc: Support logical engine mapping table in ADS
>    drm/i915/guc: Setup private_data pointer in GuC ADS
>    drm/i915/guc: Remove GUC_CTL_CTXINFO init param
>
> Michal Wajdeczko (3):
>    drm/i915/guc: New GuC IDs based on engine class and instance
>    drm/i915/guc: Kill guc_ads.reg_state_buffer
>    drm/i915/guc: Setup doorbells data in ADS
>
>   drivers/gpu/drm/i915/gt/intel_engine_cs.c    |   3 +-
>   drivers/gpu/drm/i915/gt/uc/intel_guc.c       |  18 ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c   | 132 +++++++++++++++----
>   drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c    |   1 +
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c    |  27 +++-
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h  |  82 +++++++-----
>   drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h   |   5 +
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c     |  27 ++--
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h     |   2 +
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h |   6 +-
>   drivers/gpu/drm/i915/i915_params.h           |   2 +-
>   11 files changed, 207 insertions(+), 98 deletions(-)
>

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