From: Stephen Boyd <sboyd@kernel.org>
To: Zong Li <zong.li@sifive.com>,
aou@eecs.berkeley.edu, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
mturquette@baylibre.com, palmer@dabbelt.com,
paul.walmsley@sifive.com, pragnesh.patel@openfive.com,
schwab@linux-m68k.org, yash.shah@sifive.com
Cc: Zong Li <zong.li@sifive.com>,
Pragnesh Patel <Pragnesh.patel@sifive.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Henry Styles <hes@sifive.com>, Erik Danie <erik.danie@sifive.com>,
Pragnesh Patel <pragnesh.patel@sifive.com>
Subject: Re: [PATCH v7 3/5] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block
Date: Wed, 16 Dec 2020 12:21:24 -0800 [thread overview]
Message-ID: <160815008470.1580929.14197735214079508813@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20201209094916.17383-4-zong.li@sifive.com>
Quoting Zong Li (2020-12-09 01:49:14)
> Add driver code for the SiFive FU740 PRCI IP block. This IP block
> handles reset and clock control for the SiFive FU740 device and
> implements SoC-level clock tree controls and dividers.
>
> The link of unmatched as follow, and the U740-C000 manual would
> be present in the same page as soon.
> https://www.sifive.com/boards/hifive-unmatched
>
> This driver contains bug fixes and contributions from
> Henry Styles <hes@sifive.com>
> Erik Danie <erik.danie@sifive.com>
> Pragnesh Patel <pragnesh.patel@sifive.com>
>
> Signed-off-by: Zong Li <zong.li@sifive.com>
> Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
> Cc: Henry Styles <hes@sifive.com>
> Cc: Erik Danie <erik.danie@sifive.com>
> Cc: Pragnesh Patel <pragnesh.patel@sifive.com>
> ---
Applied to clk-next
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Zong Li <zong.li@sifive.com>,
aou@eecs.berkeley.edu, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
mturquette@baylibre.com, palmer@dabbelt.com,
paul.walmsley@sifive.com, pragnesh.patel@openfive.com,
schwab@linux-m68k.org, yash.shah@sifive.com
Cc: Erik Danie <erik.danie@sifive.com>, Henry Styles <hes@sifive.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Pragnesh Patel <pragnesh.patel@sifive.com>,
Zong Li <zong.li@sifive.com>
Subject: Re: [PATCH v7 3/5] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block
Date: Wed, 16 Dec 2020 12:21:24 -0800 [thread overview]
Message-ID: <160815008470.1580929.14197735214079508813@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20201209094916.17383-4-zong.li@sifive.com>
Quoting Zong Li (2020-12-09 01:49:14)
> Add driver code for the SiFive FU740 PRCI IP block. This IP block
> handles reset and clock control for the SiFive FU740 device and
> implements SoC-level clock tree controls and dividers.
>
> The link of unmatched as follow, and the U740-C000 manual would
> be present in the same page as soon.
> https://www.sifive.com/boards/hifive-unmatched
>
> This driver contains bug fixes and contributions from
> Henry Styles <hes@sifive.com>
> Erik Danie <erik.danie@sifive.com>
> Pragnesh Patel <pragnesh.patel@sifive.com>
>
> Signed-off-by: Zong Li <zong.li@sifive.com>
> Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
> Cc: Henry Styles <hes@sifive.com>
> Cc: Erik Danie <erik.danie@sifive.com>
> Cc: Pragnesh Patel <pragnesh.patel@sifive.com>
> ---
Applied to clk-next
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next prev parent reply other threads:[~2020-12-16 20:22 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-09 9:49 [PATCH v7 0/5] clk: add driver for the SiFive FU740 Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-09 9:49 ` [PATCH v7 1/5] clk: sifive: Extract prci core to common base Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 2/5] clk: sifive: Use common name for prci configuration Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 3/5] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd [this message]
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 4/5] clk: sifive: Fix the wrong bit field shift Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 5/5] clk: sifive: Add clock enable and disable ops Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2021-03-16 19:45 ` [PATCH v7 0/5] clk: add driver for the SiFive FU740 Andreas Schwab
2021-03-16 19:45 ` Andreas Schwab
2021-03-18 2:07 ` Zong Li
2021-03-18 2:07 ` Zong Li
2021-03-19 8:20 ` Zong Li
2021-03-19 8:20 ` Zong Li
2021-03-19 8:44 ` Yixun Lan
2021-03-19 8:44 ` Yixun Lan
2021-03-19 8:49 ` Andreas Schwab
2021-03-19 8:49 ` Andreas Schwab
2021-03-24 10:36 ` Andreas Schwab
2021-03-24 10:36 ` Andreas Schwab
2021-03-25 3:21 ` Zong Li
2021-03-25 3:21 ` Zong Li
2021-03-25 9:22 ` Andreas Schwab
2021-03-25 9:22 ` Andreas Schwab
2021-03-26 9:10 ` Zong Li
2021-03-26 9:10 ` Zong Li
2021-03-26 9:23 ` Andreas Schwab
2021-03-26 9:23 ` Andreas Schwab
2021-03-29 10:18 ` Zong Li
2021-03-29 10:18 ` Zong Li
2021-03-29 10:37 ` Andreas Schwab
2021-03-29 10:37 ` Andreas Schwab
2021-03-31 8:11 ` Zong Li
2021-03-31 8:11 ` Zong Li
2021-04-12 11:31 ` Andreas Schwab
2021-04-12 11:31 ` Andreas Schwab
2021-04-14 14:13 ` Zong Li
2021-04-14 14:13 ` Zong Li
2021-05-11 8:53 ` Yixun Lan
2021-05-11 8:53 ` Yixun Lan
2021-05-19 15:53 ` Zong Li
2021-05-19 15:53 ` Zong Li
2021-05-19 18:17 ` Geert Uytterhoeven
2021-05-19 18:17 ` Geert Uytterhoeven
2021-05-21 10:34 ` Zong Li
2021-05-21 10:34 ` Zong Li
2021-05-21 12:52 ` Zong Li
2021-05-21 12:52 ` Zong Li
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