* [PATCH 1/2] drm/msm/a6xx: Clear shadow on suspend
@ 2020-11-10 18:43 ` Rob Clark
0 siblings, 0 replies; 9+ messages in thread
From: Rob Clark @ 2020-11-10 18:43 UTC (permalink / raw)
To: dri-devel
Cc: Rob Clark, open list:DRM DRIVER FOR MSM ADRENO GPU,
Jonathan Marek, David Airlie,
open list:DRM DRIVER FOR MSM ADRENO GPU, Sharat Masetty,
open list, Sean Paul
From: Rob Clark <robdclark@chromium.org>
Clear the shadow rptr on suspend. Otherwise, when we resume, we can
have a stale value until CP_WHERE_AM_I executes. If we suspend near
the ringbuffer wraparound point, this can lead to a chicken/egg
situation where we are waiting for ringbuffer space to write the
CP_WHERE_AM_I (or CP_INIT) packet, because we mistakenly believe that
the ringbuffer is full (due to stale rptr value in the shadow).
Fixes errors like:
[drm:adreno_wait_ring [msm]] *ERROR* timeout waiting for space in ringbuffer 0
in the resume path.
Fixes: d3a569fccfa0 ("drm/msm: a6xx: Use WHERE_AM_I for eligible targets")
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 2f236aadfa9c..fcb0aabbc985 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1043,12 +1043,21 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu)
{
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
+ int i, ret;
trace_msm_gpu_suspend(0);
devfreq_suspend_device(gpu->devfreq.devfreq);
- return a6xx_gmu_stop(a6xx_gpu);
+ ret = a6xx_gmu_stop(a6xx_gpu);
+ if (ret)
+ return ret;
+
+ if (adreno_gpu->base.hw_apriv || a6xx_gpu->has_whereami)
+ for (i = 0; i < gpu->nr_rings; i++)
+ a6xx_gpu->shadow[i] = 0;
+
+ return 0;
}
static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
--
2.28.0
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/2] drm/msm/a5xx: Clear shadow on suspend
2020-11-10 18:43 ` Rob Clark
@ 2020-11-10 18:44 ` Rob Clark
-1 siblings, 0 replies; 9+ messages in thread
From: Rob Clark @ 2020-11-10 18:44 UTC (permalink / raw)
To: dri-devel
Cc: Rob Clark, Rob Clark, Sean Paul, David Airlie, Daniel Vetter,
Jordan Crouse, Kristian H. Kristensen, Eric Anholt,
Gustavo A. R. Silva, Emil Velikov,
open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list
From: Rob Clark <robdclark@chromium.org>
Similar to the previous patch, clear shadow on suspend to avoid timeouts
waiting for ringbuffer space.
Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index b0005ccd81c6..8fa5c917d017 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1206,7 +1206,9 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
static int a5xx_pm_suspend(struct msm_gpu *gpu)
{
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+ struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
u32 mask = 0xf;
+ int i, ret;
/* A510 has 3 XIN ports in VBIF */
if (adreno_is_a510(adreno_gpu))
@@ -1226,7 +1228,15 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
- return msm_gpu_pm_suspend(gpu);
+ ret = msm_gpu_pm_suspend(gpu);
+ if (ret)
+ return ret;
+
+ if (a5xx_gpu->has_whereami)
+ for (i = 0; i < gpu->nr_rings; i++)
+ a5xx_gpu->shadow[i] = 0;
+
+ return 0;
}
static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
--
2.28.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/2] drm/msm/a5xx: Clear shadow on suspend
@ 2020-11-10 18:44 ` Rob Clark
0 siblings, 0 replies; 9+ messages in thread
From: Rob Clark @ 2020-11-10 18:44 UTC (permalink / raw)
To: dri-devel
Cc: Rob Clark, open list:DRM DRIVER FOR MSM ADRENO GPU, David Airlie,
open list:DRM DRIVER FOR MSM ADRENO GPU, Gustavo A. R. Silva,
Kristian H. Kristensen, Sean Paul, open list, Emil Velikov
From: Rob Clark <robdclark@chromium.org>
Similar to the previous patch, clear shadow on suspend to avoid timeouts
waiting for ringbuffer space.
Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index b0005ccd81c6..8fa5c917d017 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1206,7 +1206,9 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
static int a5xx_pm_suspend(struct msm_gpu *gpu)
{
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+ struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
u32 mask = 0xf;
+ int i, ret;
/* A510 has 3 XIN ports in VBIF */
if (adreno_is_a510(adreno_gpu))
@@ -1226,7 +1228,15 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
- return msm_gpu_pm_suspend(gpu);
+ ret = msm_gpu_pm_suspend(gpu);
+ if (ret)
+ return ret;
+
+ if (a5xx_gpu->has_whereami)
+ for (i = 0; i < gpu->nr_rings; i++)
+ a5xx_gpu->shadow[i] = 0;
+
+ return 0;
}
static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
--
2.28.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] drm/msm/a5xx: Clear shadow on suspend
2020-11-10 18:44 ` Rob Clark
@ 2020-11-10 18:46 ` Jordan Crouse
-1 siblings, 0 replies; 9+ messages in thread
From: Jordan Crouse @ 2020-11-10 18:46 UTC (permalink / raw)
To: Rob Clark
Cc: dri-devel, Rob Clark, Sean Paul, David Airlie, Daniel Vetter,
Kristian H. Kristensen, Eric Anholt, Gustavo A. R. Silva,
Emil Velikov, open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list
On Tue, Nov 10, 2020 at 10:44:00AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> Similar to the previous patch, clear shadow on suspend to avoid timeouts
> waiting for ringbuffer space.
>
> Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
> Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index b0005ccd81c6..8fa5c917d017 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -1206,7 +1206,9 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
> static int a5xx_pm_suspend(struct msm_gpu *gpu)
> {
> struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> + struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
> u32 mask = 0xf;
> + int i, ret;
>
> /* A510 has 3 XIN ports in VBIF */
> if (adreno_is_a510(adreno_gpu))
> @@ -1226,7 +1228,15 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
> gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
> gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
>
> - return msm_gpu_pm_suspend(gpu);
> + ret = msm_gpu_pm_suspend(gpu);
> + if (ret)
> + return ret;
> +
> + if (a5xx_gpu->has_whereami)
> + for (i = 0; i < gpu->nr_rings; i++)
> + a5xx_gpu->shadow[i] = 0;
> +
> + return 0;
> }
>
> static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
> --
> 2.28.0
>
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] drm/msm/a5xx: Clear shadow on suspend
@ 2020-11-10 18:46 ` Jordan Crouse
0 siblings, 0 replies; 9+ messages in thread
From: Jordan Crouse @ 2020-11-10 18:46 UTC (permalink / raw)
To: Rob Clark
Cc: Rob Clark, open list:DRM DRIVER FOR MSM ADRENO GPU, David Airlie,
open list:DRM DRIVER FOR MSM ADRENO GPU, Gustavo A. R. Silva,
dri-devel, open list, Kristian H. Kristensen, Sean Paul,
Emil Velikov
On Tue, Nov 10, 2020 at 10:44:00AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> Similar to the previous patch, clear shadow on suspend to avoid timeouts
> waiting for ringbuffer space.
>
> Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
> Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index b0005ccd81c6..8fa5c917d017 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -1206,7 +1206,9 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
> static int a5xx_pm_suspend(struct msm_gpu *gpu)
> {
> struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> + struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
> u32 mask = 0xf;
> + int i, ret;
>
> /* A510 has 3 XIN ports in VBIF */
> if (adreno_is_a510(adreno_gpu))
> @@ -1226,7 +1228,15 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
> gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
> gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
>
> - return msm_gpu_pm_suspend(gpu);
> + ret = msm_gpu_pm_suspend(gpu);
> + if (ret)
> + return ret;
> +
> + if (a5xx_gpu->has_whereami)
> + for (i = 0; i < gpu->nr_rings; i++)
> + a5xx_gpu->shadow[i] = 0;
> +
> + return 0;
> }
>
> static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
> --
> 2.28.0
>
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/msm/a6xx: Clear shadow on suspend
2020-11-10 18:43 ` Rob Clark
@ 2020-11-10 18:46 ` Jordan Crouse
-1 siblings, 0 replies; 9+ messages in thread
From: Jordan Crouse @ 2020-11-10 18:46 UTC (permalink / raw)
To: Rob Clark
Cc: dri-devel, Rob Clark, Sean Paul, David Airlie, Daniel Vetter,
Jonathan Marek, Sharat Masetty, Eric Anholt,
open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list
On Tue, Nov 10, 2020 at 10:43:59AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> Clear the shadow rptr on suspend. Otherwise, when we resume, we can
> have a stale value until CP_WHERE_AM_I executes. If we suspend near
> the ringbuffer wraparound point, this can lead to a chicken/egg
> situation where we are waiting for ringbuffer space to write the
> CP_WHERE_AM_I (or CP_INIT) packet, because we mistakenly believe that
> the ringbuffer is full (due to stale rptr value in the shadow).
>
> Fixes errors like:
>
> [drm:adreno_wait_ring [msm]] *ERROR* timeout waiting for space in ringbuffer 0
>
> in the resume path.
>
> Fixes: d3a569fccfa0 ("drm/msm: a6xx: Use WHERE_AM_I for eligible targets")
> Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index 2f236aadfa9c..fcb0aabbc985 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -1043,12 +1043,21 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu)
> {
> struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
> + int i, ret;
>
> trace_msm_gpu_suspend(0);
>
> devfreq_suspend_device(gpu->devfreq.devfreq);
>
> - return a6xx_gmu_stop(a6xx_gpu);
> + ret = a6xx_gmu_stop(a6xx_gpu);
> + if (ret)
> + return ret;
> +
> + if (adreno_gpu->base.hw_apriv || a6xx_gpu->has_whereami)
> + for (i = 0; i < gpu->nr_rings; i++)
> + a6xx_gpu->shadow[i] = 0;
> +
> + return 0;
> }
>
> static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
> --
> 2.28.0
>
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 1/2] drm/msm/a6xx: Clear shadow on suspend
@ 2020-11-10 18:46 ` Jordan Crouse
0 siblings, 0 replies; 9+ messages in thread
From: Jordan Crouse @ 2020-11-10 18:46 UTC (permalink / raw)
To: Rob Clark
Cc: Rob Clark, open list:DRM DRIVER FOR MSM ADRENO GPU,
Jonathan Marek, David Airlie,
open list:DRM DRIVER FOR MSM ADRENO GPU, Sharat Masetty,
open list, dri-devel, Sean Paul
On Tue, Nov 10, 2020 at 10:43:59AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> Clear the shadow rptr on suspend. Otherwise, when we resume, we can
> have a stale value until CP_WHERE_AM_I executes. If we suspend near
> the ringbuffer wraparound point, this can lead to a chicken/egg
> situation where we are waiting for ringbuffer space to write the
> CP_WHERE_AM_I (or CP_INIT) packet, because we mistakenly believe that
> the ringbuffer is full (due to stale rptr value in the shadow).
>
> Fixes errors like:
>
> [drm:adreno_wait_ring [msm]] *ERROR* timeout waiting for space in ringbuffer 0
>
> in the resume path.
>
> Fixes: d3a569fccfa0 ("drm/msm: a6xx: Use WHERE_AM_I for eligible targets")
> Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index 2f236aadfa9c..fcb0aabbc985 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -1043,12 +1043,21 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu)
> {
> struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
> + int i, ret;
>
> trace_msm_gpu_suspend(0);
>
> devfreq_suspend_device(gpu->devfreq.devfreq);
>
> - return a6xx_gmu_stop(a6xx_gpu);
> + ret = a6xx_gmu_stop(a6xx_gpu);
> + if (ret)
> + return ret;
> +
> + if (adreno_gpu->base.hw_apriv || a6xx_gpu->has_whereami)
> + for (i = 0; i < gpu->nr_rings; i++)
> + a6xx_gpu->shadow[i] = 0;
> +
> + return 0;
> }
>
> static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
> --
> 2.28.0
>
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/msm/a6xx: Clear shadow on suspend
2020-11-10 18:43 ` Rob Clark
` (2 preceding siblings ...)
(?)
@ 2020-12-29 20:15 ` patchwork-bot+linux-arm-msm
-1 siblings, 0 replies; 9+ messages in thread
From: patchwork-bot+linux-arm-msm @ 2020-12-29 20:15 UTC (permalink / raw)
To: Rob Clark; +Cc: linux-arm-msm
Hello:
This series was applied to qcom/linux.git (refs/heads/for-next):
On Tue, 10 Nov 2020 10:43:59 -0800 you wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> Clear the shadow rptr on suspend. Otherwise, when we resume, we can
> have a stale value until CP_WHERE_AM_I executes. If we suspend near
> the ringbuffer wraparound point, this can lead to a chicken/egg
> situation where we are waiting for ringbuffer space to write the
> CP_WHERE_AM_I (or CP_INIT) packet, because we mistakenly believe that
> the ringbuffer is full (due to stale rptr value in the shadow).
>
> [...]
Here is the summary with links:
- [1/2] drm/msm/a6xx: Clear shadow on suspend
https://git.kernel.org/qcom/c/e8b0b994c3a5
- [2/2] drm/msm/a5xx: Clear shadow on suspend
https://git.kernel.org/qcom/c/5771de5d5b3b
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 9+ messages in thread