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* [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
@ 2021-02-09 18:14 José Roberto de Souza
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl() José Roberto de Souza
                   ` (8 more replies)
  0 siblings, 9 replies; 13+ messages in thread
From: José Roberto de Souza @ 2021-02-09 18:14 UTC (permalink / raw)
  To: intel-gfx

for_each_intel_encoder.*_"can_psr" sounds strange, in my opinion
"with_psr" is better.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h         |  4 ++--
 drivers/gpu/drm/i915/display/intel_display_debugfs.c |  6 +++---
 drivers/gpu/drm/i915/display/intel_psr.c             | 12 ++++++------
 drivers/gpu/drm/i915/i915_irq.c                      |  4 ++--
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index e3757ecabbf7..c60a58ba60ee 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -418,7 +418,7 @@ enum phy_fia {
 		for_each_if((encoder_mask) &				\
 			    drm_encoder_mask(&intel_encoder->base))
 
-#define for_each_intel_encoder_mask_can_psr(dev, intel_encoder, encoder_mask) \
+#define for_each_intel_encoder_mask_with_psr(dev, intel_encoder, encoder_mask) \
 	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
 		for_each_if(((encoder_mask) & drm_encoder_mask(&(intel_encoder)->base)) && \
 			    intel_encoder_can_psr(intel_encoder))
@@ -427,7 +427,7 @@ enum phy_fia {
 	for_each_intel_encoder(dev, intel_encoder)		\
 		for_each_if(intel_encoder_is_dp(intel_encoder))
 
-#define for_each_intel_encoder_can_psr(dev, intel_encoder) \
+#define for_each_intel_encoder_with_psr(dev, intel_encoder) \
 	for_each_intel_encoder((dev), (intel_encoder)) \
 		for_each_if(intel_encoder_can_psr(intel_encoder))
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index d6e4a9237bda..7ce11d851163 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -437,7 +437,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
 		return -ENODEV;
 
 	/* Find the first EDP which supports PSR */
-	for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
+	for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 		intel_dp = enc_to_intel_dp(encoder);
 		break;
 	}
@@ -459,7 +459,7 @@ i915_edp_psr_debug_set(void *data, u64 val)
 	if (!HAS_PSR(dev_priv))
 		return ret;
 
-	for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
+	for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		drm_dbg_kms(&dev_priv->drm, "Setting PSR debug to %llx\n", val);
@@ -484,7 +484,7 @@ i915_edp_psr_debug_get(void *data, u64 *val)
 	if (!HAS_PSR(dev_priv))
 		return -ENODEV;
 
-	for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
+	for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		// TODO: split to each transcoder's PSR debug state
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bf214d0e2dec..1d3903612fcb 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1232,8 +1232,8 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st
 	    !crtc_state->enable_psr2_sel_fetch)
 		return;
 
-	for_each_intel_encoder_mask_can_psr(&dev_priv->drm, encoder,
-					    crtc_state->uapi.encoder_mask) {
+	for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
+					     crtc_state->uapi.encoder_mask) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		if (!intel_dp->psr.enabled)
@@ -1515,8 +1515,8 @@ void intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state)
 	if (!new_crtc_state->has_psr)
 		return;
 
-	for_each_intel_encoder_mask_can_psr(&dev_priv->drm, encoder,
-					    new_crtc_state->uapi.encoder_mask) {
+	for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
+					     new_crtc_state->uapi.encoder_mask) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 		u32 psr_status;
 
@@ -1730,7 +1730,7 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
 	if (origin == ORIGIN_FLIP)
 		return;
 
-	for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
+	for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 		unsigned int pipe_frontbuffer_bits = frontbuffer_bits;
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
@@ -1802,7 +1802,7 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
 {
 	struct intel_encoder *encoder;
 
-	for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
+	for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 		unsigned int pipe_frontbuffer_bits = frontbuffer_bits;
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 98145a7f28a4..8f6b60661a4d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2096,7 +2096,7 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv,
 	if (de_iir & DE_EDP_PSR_INT_HSW) {
 		struct intel_encoder *encoder;
 
-		for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
+		for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 			struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 			u32 psr_iir = intel_uncore_read(&dev_priv->uncore,
@@ -2323,7 +2323,7 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
 		u32 psr_iir;
 		i915_reg_t iir_reg;
 
-		for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
+		for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 			struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 			if (INTEL_GEN(dev_priv) >= 12)
-- 
2.30.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
@ 2021-02-09 18:14 ` José Roberto de Souza
  2021-02-11 11:37   ` Mun, Gwan-gyeong
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR() José Roberto de Souza
                   ` (7 subsequent siblings)
  8 siblings, 1 reply; 13+ messages in thread
From: José Roberto de Souza @ 2021-02-09 18:14 UTC (permalink / raw)
  To: intel-gfx

There is no support for two pipes one transcoder for PSR and if we had
that the current code should not use cpu_transcoder.
Also I can't see a scenario where crtc_state->enable_psr2_sel_fetch is
set and PSR is not enabled and if by a bug it happens PSR HW will just
ignore any value in set in PSR2_MAN_TRK_CTL.

So dropping all the rest and keeping the same behavior that we have
with intel_psr2_program_plane_sel_fetch().

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1d3903612fcb..8ad9fcff3a12 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1226,23 +1226,13 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
 void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
-	struct intel_encoder *encoder;
 
 	if (!HAS_PSR2_SEL_FETCH(dev_priv) ||
 	    !crtc_state->enable_psr2_sel_fetch)
 		return;
 
-	for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
-					     crtc_state->uapi.encoder_mask) {
-		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-
-		if (!intel_dp->psr.enabled)
-			continue;
-
-		intel_de_write(dev_priv,
-			       PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
-			       crtc_state->psr2_man_track_ctl);
-	}
+	intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
+		       crtc_state->psr2_man_track_ctl);
 }
 
 static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
-- 
2.30.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR()
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl() José Roberto de Souza
@ 2021-02-09 18:14 ` José Roberto de Souza
  2021-02-22  9:48   ` Mun, Gwan-gyeong
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR José Roberto de Souza
                   ` (6 subsequent siblings)
  8 siblings, 1 reply; 13+ messages in thread
From: José Roberto de Souza @ 2021-02-09 18:14 UTC (permalink / raw)
  To: intel-gfx

If source_support is set the platform supports PSR so no need to check
it again at every CAN_PSR().

Also removing the intel_dp_is_edp() calls, if sink_support is set
the sink connected is for sure a eDP panel.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 5 ++---
 drivers/gpu/drm/i915/display/intel_dp.c            | 2 +-
 drivers/gpu/drm/i915/display/intel_psr.c           | 4 ++--
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ebaa9d0ed376..4a46c4e9b0ac 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1793,9 +1793,8 @@ dp_to_i915(struct intel_dp *intel_dp)
 	return to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
 }
 
-#define CAN_PSR(intel_dp)	(HAS_PSR(dp_to_i915(intel_dp)) && \
-				 (intel_dp)->psr.sink_support && \
-				 (intel_dp)->psr.source_support)
+#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
+			   (intel_dp)->psr.source_support)
 
 static inline bool intel_encoder_can_psr(struct intel_encoder *encoder)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4f89e0de5dde..0a0cc61344c4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2358,7 +2358,7 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
 		return false;
 	}
 
-	if (CAN_PSR(intel_dp) && intel_dp_is_edp(intel_dp)) {
+	if (CAN_PSR(intel_dp)) {
 		drm_dbg_kms(&i915->drm, "Forcing full modeset to compute PSR state\n");
 		crtc_state->uapi.mode_changed = true;
 		return false;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 8ad9fcff3a12..e0111b470570 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1962,7 +1962,7 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
 			  DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
 			  DP_PSR_LINK_CRC_ERROR;
 
-	if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp))
+	if (!CAN_PSR(intel_dp))
 		return;
 
 	mutex_lock(&psr->lock);
@@ -2012,7 +2012,7 @@ bool intel_psr_enabled(struct intel_dp *intel_dp)
 {
 	bool ret;
 
-	if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp))
+	if (!CAN_PSR(intel_dp))
 		return false;
 
 	mutex_lock(&intel_dp->psr.lock);
-- 
2.30.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl() José Roberto de Souza
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR() José Roberto de Souza
@ 2021-02-09 18:14 ` José Roberto de Souza
  2021-02-22  9:57   ` Mun, Gwan-gyeong
  2021-02-09 18:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr Patchwork
                   ` (5 subsequent siblings)
  8 siblings, 1 reply; 13+ messages in thread
From: José Roberto de Souza @ 2021-02-09 18:14 UTC (permalink / raw)
  To: intel-gfx

This will set the right value of source_support when the port
encoder/port supports PSR but sink don't.

This change will also be needed in future for panel replay as psr
struct needs to be initialized even if disconnected or current sink
don't support PSR.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index e0111b470570..6b3e2120161e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1837,9 +1837,6 @@ void intel_psr_init(struct intel_dp *intel_dp)
 	if (!HAS_PSR(dev_priv))
 		return;
 
-	if (!intel_dp->psr.sink_support)
-		return;
-
 	/*
 	 * HSW spec explicitly says PSR is tied to port A.
 	 * BDW+ platforms have a instance of PSR registers per transcoder but
-- 
2.30.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
                   ` (2 preceding siblings ...)
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR José Roberto de Souza
@ 2021-02-09 18:26 ` Patchwork
  2021-02-09 18:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-02-09 18:26 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL   : https://patchwork.freedesktop.org/series/86910/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
1edc3ad07376 drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
-:25: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#25: FILE: drivers/gpu/drm/i915/display/intel_display.h:421:
+#define for_each_intel_encoder_mask_with_psr(dev, intel_encoder, encoder_mask) \
 	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
 		for_each_if(((encoder_mask) & drm_encoder_mask(&(intel_encoder)->base)) && \
 			    intel_encoder_can_psr(intel_encoder))

-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_encoder' - possible side-effects?
#25: FILE: drivers/gpu/drm/i915/display/intel_display.h:421:
+#define for_each_intel_encoder_mask_with_psr(dev, intel_encoder, encoder_mask) \
 	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
 		for_each_if(((encoder_mask) & drm_encoder_mask(&(intel_encoder)->base)) && \
 			    intel_encoder_can_psr(intel_encoder))

-:34: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#34: FILE: drivers/gpu/drm/i915/display/intel_display.h:430:
+#define for_each_intel_encoder_with_psr(dev, intel_encoder) \
 	for_each_intel_encoder((dev), (intel_encoder)) \
 		for_each_if(intel_encoder_can_psr(intel_encoder))

-:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_encoder' - possible side-effects?
#34: FILE: drivers/gpu/drm/i915/display/intel_display.h:430:
+#define for_each_intel_encoder_with_psr(dev, intel_encoder) \
 	for_each_intel_encoder((dev), (intel_encoder)) \
 		for_each_if(intel_encoder_can_psr(intel_encoder))

total: 2 errors, 0 warnings, 2 checks, 92 lines checked
fe6bbcba6125 drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()
889eeb0a82dd drm/i915/display: Remove some redundancy around CAN_PSR()
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_dp' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:1796:
+#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
+			   (intel_dp)->psr.source_support)

total: 0 errors, 0 warnings, 1 checks, 35 lines checked
6c507f7a8c35 drm/i915/display: Set source_support even if panel do not support PSR


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
                   ` (3 preceding siblings ...)
  2021-02-09 18:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr Patchwork
@ 2021-02-09 18:27 ` Patchwork
  2021-02-09 18:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-02-09 18:27 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL   : https://patchwork.freedesktop.org/series/86910/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_reset.c:1323:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gvt/mmio.c:295:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_wakeref.c:137:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
                   ` (4 preceding siblings ...)
  2021-02-09 18:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-02-09 18:55 ` Patchwork
  2021-02-09 22:49 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-02-09 18:55 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 5588 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL   : https://patchwork.freedesktop.org/series/86910/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9752 -> Patchwork_19644
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/index.html

Known issues
------------

  Here are the changes found in Patchwork_19644 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@semaphore:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][1] ([fdo#109271]) +26 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-kbl-7500u:       [PASS][2] -> [DMESG-WARN][3] ([i915#2605])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
    - fi-bdw-5557u:       NOTRUN -> [WARN][4] ([i915#2283])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-tgl-y:           [PASS][5] -> [DMESG-WARN][6] ([i915#2411] / [i915#402])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_pm_rpm@module-reload:
    - fi-byt-j1900:       [PASS][7] -> [INCOMPLETE][8] ([i915#142] / [i915#2405])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live@execlists:
    - fi-bsw-nick:        [PASS][9] -> [INCOMPLETE][10] ([i915#2940])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/fi-bsw-nick/igt@i915_selftest@live@execlists.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-bsw-nick/igt@i915_selftest@live@execlists.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html

  * igt@prime_vgem@basic-fence-flip:
    - fi-tgl-y:           [PASS][12] -> [DMESG-WARN][13] ([i915#402]) +2 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html

  * igt@runner@aborted:
    - fi-bsw-nick:        NOTRUN -> [FAIL][14] ([i915#1436])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-bsw-nick/igt@runner@aborted.html
    - fi-byt-j1900:       NOTRUN -> [FAIL][15] ([i915#1814] / [i915#2505])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-byt-j1900/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@vgem_basic@dmabuf-fence-before:
    - fi-tgl-y:           [DMESG-WARN][16] ([i915#402]) -> [PASS][17] +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/fi-tgl-y/igt@vgem_basic@dmabuf-fence-before.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/fi-tgl-y/igt@vgem_basic@dmabuf-fence-before.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#142]: https://gitlab.freedesktop.org/drm/intel/issues/142
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
  [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
  [i915#2405]: https://gitlab.freedesktop.org/drm/intel/issues/2405
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
  [i915#2605]: https://gitlab.freedesktop.org/drm/intel/issues/2605
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402


Participating hosts (44 -> 39)
------------------------------

  Missing    (5): fi-jsl-1 fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_9752 -> Patchwork_19644

  CI-20190529: 20190529
  CI_DRM_9752: a99b75af1722e15bade7f41dca4227bc907561aa @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5999: 2982c998a9cb79095611fba018d5df3eec5eab88 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19644: 6c507f7a8c3501bd88e605dc728d2878f325fdd7 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

6c507f7a8c35 drm/i915/display: Set source_support even if panel do not support PSR
889eeb0a82dd drm/i915/display: Remove some redundancy around CAN_PSR()
fe6bbcba6125 drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()
1edc3ad07376 drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/index.html

[-- Attachment #1.2: Type: text/html, Size: 6657 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
                   ` (5 preceding siblings ...)
  2021-02-09 18:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-02-09 22:49 ` Patchwork
  2021-02-11 11:34 ` [Intel-gfx] [PATCH 1/4] " Mun, Gwan-gyeong
  2021-02-11 11:34 ` Mun, Gwan-gyeong
  8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-02-09 22:49 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 30344 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL   : https://patchwork.freedesktop.org/series/86910/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9752_full -> Patchwork_19644_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_19644_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_balancer@hang:
    - shard-iclb:         [PASS][1] -> [INCOMPLETE][2] ([i915#1895] / [i915#2295] / [i915#3031])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb3/igt@gem_exec_balancer@hang.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb2/igt@gem_exec_balancer@hang.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-kbl:          [PASS][3] -> [FAIL][4] ([i915#2842]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl2/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl4/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_reloc@basic-wide-active@rcs0:
    - shard-kbl:          NOTRUN -> [FAIL][5] ([i915#2389]) +4 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl4/igt@gem_exec_reloc@basic-wide-active@rcs0.html

  * igt@gem_huc_copy@huc-copy:
    - shard-apl:          NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@gem_huc_copy@huc-copy.html

  * igt@gem_pread@exhaustion:
    - shard-kbl:          NOTRUN -> [WARN][7] ([i915#2658])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl4/igt@gem_pread@exhaustion.html

  * igt@gem_userptr_blits@mmap-offset-invalidate-active@wb:
    - shard-kbl:          NOTRUN -> [SKIP][8] ([fdo#109271]) +56 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@gem_userptr_blits@mmap-offset-invalidate-active@wb.html

  * igt@gem_userptr_blits@process-exit-mmap-busy@wc:
    - shard-apl:          NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1699]) +3 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@gem_userptr_blits@process-exit-mmap-busy@wc.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][10] -> [DMESG-WARN][11] ([i915#1436] / [i915#716])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl5/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - shard-kbl:          NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#658])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([i915#454])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb3/igt@i915_pm_dc@dc6-psr.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb2/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
    - shard-apl:          NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#1937])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [PASS][16] -> [DMESG-WARN][17] ([i915#180]) +4 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl4/igt@i915_suspend@sysfs-reader.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl4/igt@i915_suspend@sysfs-reader.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-snb:          [PASS][18] -> [FAIL][19] ([i915#2521])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-snb6/igt@kms_async_flips@alternate-sync-async-flip.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-snb6/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_big_joiner@invalid-modeset:
    - shard-kbl:          NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#2705])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@kms_big_joiner@invalid-modeset.html

  * igt@kms_chamelium@hdmi-audio:
    - shard-skl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl9/igt@kms_chamelium@hdmi-audio.html

  * igt@kms_chamelium@hdmi-hpd-storm-disable:
    - shard-kbl:          NOTRUN -> [SKIP][22] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@kms_chamelium@hdmi-hpd-storm-disable.html

  * igt@kms_chamelium@vga-hpd:
    - shard-apl:          NOTRUN -> [SKIP][23] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@kms_chamelium@vga-hpd.html

  * igt@kms_content_protection@lic:
    - shard-kbl:          NOTRUN -> [TIMEOUT][24] ([i915#1319])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@kms_content_protection@lic.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([i915#54]) +7 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl10/igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding.html

  * igt@kms_cursor_edge_walk@pipe-c-64x64-top-edge:
    - shard-skl:          [PASS][27] -> [DMESG-WARN][28] ([i915#1982]) +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl4/igt@kms_cursor_edge_walk@pipe-c-64x64-top-edge.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl5/igt@kms_cursor_edge_walk@pipe-c-64x64-top-edge.html

  * igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
    - shard-skl:          [PASS][29] -> [FAIL][30] ([i915#2346])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-tglb:         [PASS][31] -> [FAIL][32] ([i915#2598])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-tglb2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-tglb8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-edp1:
    - shard-skl:          [PASS][33] -> [INCOMPLETE][34] ([i915#2295])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl5/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
    - shard-skl:          [PASS][35] -> [FAIL][36] ([i915#2122]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
    - shard-apl:          NOTRUN -> [FAIL][37] ([i915#2641])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
    - shard-kbl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#2672])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-kbl:          [PASS][39] -> [FAIL][40] ([i915#49])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html
    - shard-apl:          [PASS][41] -> [FAIL][42] ([i915#49])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack:
    - shard-skl:          NOTRUN -> [SKIP][43] ([fdo#109271]) +35 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-skl:          [PASS][44] -> [FAIL][45] ([i915#1188])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl3/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#533]) +1 similar issue
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl9/igt@kms_pipe_crc_basic@read-crc-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-kbl:          [PASS][47] -> [DMESG-WARN][48] ([i915#180])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-apl:          [PASS][49] -> [DMESG-WARN][50] ([i915#180] / [i915#533])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][51] -> [FAIL][52] ([fdo#108145] / [i915#265])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
    - shard-kbl:          NOTRUN -> [FAIL][53] ([i915#265])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          NOTRUN -> [FAIL][54] ([fdo#108145] / [i915#265]) +1 similar issue
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
    - shard-apl:          NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#658]) +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-skl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#658])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl9/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [PASS][57] -> [SKIP][58] ([fdo#109441]) +1 similar issue
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb2/igt@kms_psr@psr2_basic.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb5/igt@kms_psr@psr2_basic.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-apl:          NOTRUN -> [SKIP][59] ([fdo#109271] / [i915#2437])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@kms_writeback@writeback-fb-id.html

  * igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
    - shard-apl:          NOTRUN -> [SKIP][60] ([fdo#109271]) +28 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html

  * igt@sysfs_clients@sema-25@vcs0:
    - shard-skl:          [PASS][61] -> [SKIP][62] ([fdo#109271])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl4/igt@sysfs_clients@sema-25@vcs0.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl10/igt@sysfs_clients@sema-25@vcs0.html

  * igt@sysfs_clients@split-10@vcs0:
    - shard-skl:          [PASS][63] -> [SKIP][64] ([fdo#109271] / [i915#3026])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl10/igt@sysfs_clients@split-10@vcs0.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl4/igt@sysfs_clients@split-10@vcs0.html

  
#### Possible fixes ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [SKIP][65] ([i915#658]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb3/igt@feature_discovery@psr2.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb2/igt@feature_discovery@psr2.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-kbl:          [DMESG-WARN][67] ([i915#180]) -> [PASS][68] +3 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl7/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_eio@in-flight-contexts-immediate:
    - shard-tglb:         [TIMEOUT][69] -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-tglb5/igt@gem_eio@in-flight-contexts-immediate.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-tglb2/igt@gem_eio@in-flight-contexts-immediate.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-kbl:          [FAIL][71] ([i915#2846]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl4/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
    - shard-glk:          [FAIL][73] ([i915#2842]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-glk6/igt@gem_exec_fair@basic-none-rrul@rcs0.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [FAIL][75] ([i915#2842]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-tglb3/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-kbl:          [FAIL][77] ([i915#2842]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl7/igt@gem_exec_fair@basic-none@vcs1.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl6/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [SKIP][79] ([fdo#109271]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs1.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@kms_async_flips@test-time-stamp:
    - shard-tglb:         [FAIL][81] ([i915#2597]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-tglb1/igt@kms_async_flips@test-time-stamp.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-tglb6/igt@kms_async_flips@test-time-stamp.html

  * igt@kms_cursor_crc@pipe-a-cursor-64x21-random:
    - shard-skl:          [FAIL][83] ([i915#54]) -> [PASS][84] +8 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1:
    - shard-apl:          [FAIL][85] ([i915#2122]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl8/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
    - shard-tglb:         [FAIL][87] ([i915#2598]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-tglb1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-tglb3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
    - shard-apl:          [DMESG-WARN][89] ([i915#180]) -> [PASS][90] +4 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html

  * igt@kms_flip@flip-vs-suspend@a-vga1:
    - shard-snb:          [DMESG-WARN][91] ([i915#2772] / [i915#42]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-snb2/igt@kms_flip@flip-vs-suspend@a-vga1.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-snb5/igt@kms_flip@flip-vs-suspend@a-vga1.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-skl:          [FAIL][93] ([i915#49]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-wc.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-kbl:          [DMESG-WARN][95] ([i915#180] / [i915#533]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [FAIL][97] ([fdo#108145] / [i915#265]) -> [PASS][98] +1 similar issue
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][99] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb3/igt@kms_psr2_su@frontbuffer.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][101] ([fdo#109441]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb3/igt@kms_psr@psr2_cursor_render.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_vblank@pipe-a-accuracy-idle:
    - shard-skl:          [DMESG-WARN][103] ([i915#1982]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl9/igt@kms_vblank@pipe-a-accuracy-idle.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl5/igt@kms_vblank@pipe-a-accuracy-idle.html

  * {igt@sysfs_clients@recycle-many}:
    - shard-glk:          [FAIL][105] ([i915#3028]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-glk9/igt@sysfs_clients@recycle-many.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-glk5/igt@sysfs_clients@recycle-many.html

  
#### Warnings ####

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][107] ([i915#2842]) -> [FAIL][108] ([i915#2851])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-glk3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-glk1/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - shard-iclb:         [SKIP][109] ([i915#658]) -> [SKIP][110] ([i915#588])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb4/igt@i915_pm_dc@dc3co-vpb-simulation.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [WARN][111] ([i915#1804] / [i915#2684]) -> [WARN][112] ([i915#2681] / [i915#2684])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
    - shard-iclb:         [SKIP][113] ([i915#2920]) -> [SKIP][114] ([i915#658]) +2 similar issues
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb5/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5:
    - shard-iclb:         [SKIP][115] ([i915#658]) -> [SKIP][116] ([i915#2920])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-iclb3/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][117], [FAIL][118], [FAIL][119], [FAIL][120], [FAIL][121], [FAIL][122], [FAIL][123]) ([i915#1436] / [i915#1814] / [i915#2295] / [i915#2505] / [i915#3002]) -> ([FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127]) ([i915#1814] / [i915#2295] / [i915#3002])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl7/igt@runner@aborted.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl7/igt@runner@aborted.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl2/igt@runner@aborted.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl7/igt@runner@aborted.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl6/igt@runner@aborted.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl3/igt@runner@aborted.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-kbl1/igt@runner@aborted.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl7/igt@runner@aborted.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl2/igt@runner@aborted.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl4/igt@runner@aborted.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-kbl2/igt@runner@aborted.html
    - shard-apl:          ([FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134]) ([i915#1610] / [i915#2292] / [i915#2295] / [i915#3002]) -> ([FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143]) ([fdo#109271] / [i915#1814] / [i915#2295] / [i915#3002] / [i915#62])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl3/igt@runner@aborted.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl1/igt@runner@aborted.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl7/igt@runner@aborted.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl3/igt@runner@aborted.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl3/igt@runner@aborted.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl3/igt@runner@aborted.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-apl4/igt@runner@aborted.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl4/igt@runner@aborted.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl3/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl6/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl4/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl4/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl4/igt@runner@aborted.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl3/igt@runner@aborted.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl3/igt@runner@aborted.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-apl4/igt@runner@aborted.html
    - shard-skl:          ([FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147]) ([i915#2295] / [i915#3002]) -> ([FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152]) ([i915#1436] / [i915#2295] / [i915#3002])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl1/igt@runner@aborted.html
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl9/igt@runner@aborted.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl4/igt@runner@aborted.html
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9752/shard-skl4/igt@runner@aborted.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl5/igt@runner@aborted.html
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl5/igt@runner@aborted.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl5/igt@runner@aborted.html
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl7/igt@runner@aborted.html
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/shard-skl10/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
  [i915#1699]: https://gitlab.freedesktop.org/drm/intel/issues/1699
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
  [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
  [i915#1895]: https://gitlab.freedesktop.org/drm/intel/issues/1895
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2292]: https://gitlab.freedesktop.org/drm/intel/issues/2292
  [i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#2597]: https://gitlab.freedesktop.org/drm/intel/issues/2597
  [i915#2598]: https://gitlab.freedesktop.org/drm/intel/issues/2598
  [i915#2641]: https://gitlab.freedesktop.org/drm/intel/issues/2641
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://g

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19644/index.html

[-- Attachment #1.2: Type: text/html, Size: 36126 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
                   ` (6 preceding siblings ...)
  2021-02-09 22:49 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2021-02-11 11:34 ` Mun, Gwan-gyeong
  2021-02-11 11:34 ` Mun, Gwan-gyeong
  8 siblings, 0 replies; 13+ messages in thread
From: Mun, Gwan-gyeong @ 2021-02-11 11:34 UTC (permalink / raw)
  To: intel-gfx, Souza, Jose

On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote:
> for_each_intel_encoder.*_"can_psr" sounds strange, in my opinion
> "with_psr" is better.
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.h         |  4 ++--
>  drivers/gpu/drm/i915/display/intel_display_debugfs.c |  6 +++---
>  drivers/gpu/drm/i915/display/intel_psr.c             | 12 ++++++----
> --
>  drivers/gpu/drm/i915/i915_irq.c                      |  4 ++--
>  4 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index e3757ecabbf7..c60a58ba60ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -418,7 +418,7 @@ enum phy_fia {
>                 for_each_if((encoder_mask)
> &                            \
>                             drm_encoder_mask(&intel_encoder->base))
>  
> -#define for_each_intel_encoder_mask_can_psr(dev, intel_encoder,
> encoder_mask) \
> +#define for_each_intel_encoder_mask_with_psr(dev, intel_encoder,
> encoder_mask) \
>         list_for_each_entry((intel_encoder), &(dev)-
> >mode_config.encoder_list, base.head) \
>                 for_each_if(((encoder_mask) &
> drm_encoder_mask(&(intel_encoder)->base)) && \
>                             intel_encoder_can_psr(intel_encoder))
> @@ -427,7 +427,7 @@ enum phy_fia {
>         for_each_intel_encoder(dev, intel_encoder)              \
>                 for_each_if(intel_encoder_is_dp(intel_encoder))
>  
> -#define for_each_intel_encoder_can_psr(dev, intel_encoder) \
> +#define for_each_intel_encoder_with_psr(dev, intel_encoder) \
>         for_each_intel_encoder((dev), (intel_encoder)) \
>                 for_each_if(intel_encoder_can_psr(intel_encoder))
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index d6e4a9237bda..7ce11d851163 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -437,7 +437,7 @@ static int i915_edp_psr_status(struct seq_file
> *m, void *data)
>                 return -ENODEV;
>  
>         /* Find the first EDP which supports PSR */
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 intel_dp = enc_to_intel_dp(encoder);
>                 break;
>         }
> @@ -459,7 +459,7 @@ i915_edp_psr_debug_set(void *data, u64 val)
>         if (!HAS_PSR(dev_priv))
>                 return ret;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
>                 drm_dbg_kms(&dev_priv->drm, "Setting PSR debug to
> %llx\n", val);
> @@ -484,7 +484,7 @@ i915_edp_psr_debug_get(void *data, u64 *val)
>         if (!HAS_PSR(dev_priv))
>                 return -ENODEV;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
>                 // TODO: split to each transcoder's PSR debug state
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index bf214d0e2dec..1d3903612fcb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1232,8 +1232,8 @@ void intel_psr2_program_trans_man_trk_ctl(const
> struct intel_crtc_state *crtc_st
>             !crtc_state->enable_psr2_sel_fetch)
>                 return;
>  
> -       for_each_intel_encoder_mask_can_psr(&dev_priv->drm, encoder,
> -                                           crtc_state-
> >uapi.encoder_mask) {
> +       for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
> +                                            crtc_state-
> >uapi.encoder_mask) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
>                 if (!intel_dp->psr.enabled)
> @@ -1515,8 +1515,8 @@ void intel_psr_wait_for_idle(const struct
> intel_crtc_state *new_crtc_state)
>         if (!new_crtc_state->has_psr)
>                 return;
>  
> -       for_each_intel_encoder_mask_can_psr(&dev_priv->drm, encoder,
> -                                           new_crtc_state-
> >uapi.encoder_mask) {
> +       for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
> +                                            new_crtc_state-
> >uapi.encoder_mask) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>                 u32 psr_status;
>  
> @@ -1730,7 +1730,7 @@ void intel_psr_invalidate(struct
> drm_i915_private *dev_priv,
>         if (origin == ORIGIN_FLIP)
>                 return;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 unsigned int pipe_frontbuffer_bits =
> frontbuffer_bits;
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
> @@ -1802,7 +1802,7 @@ void intel_psr_flush(struct drm_i915_private
> *dev_priv,
>  {
>         struct intel_encoder *encoder;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 unsigned int pipe_frontbuffer_bits =
> frontbuffer_bits;
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 98145a7f28a4..8f6b60661a4d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2096,7 +2096,7 @@ static void ivb_display_irq_handler(struct
> drm_i915_private *dev_priv,
>         if (de_iir & DE_EDP_PSR_INT_HSW) {
>                 struct intel_encoder *encoder;
>  
> -               for_each_intel_encoder_can_psr(&dev_priv->drm,
> encoder) {
> +               for_each_intel_encoder_with_psr(&dev_priv->drm,
> encoder) {
>                         struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  
>                         u32 psr_iir = intel_uncore_read(&dev_priv-
> >uncore,
> @@ -2323,7 +2323,7 @@ gen8_de_misc_irq_handler(struct
> drm_i915_private *dev_priv, u32 iir)
>                 u32 psr_iir;
>                 i915_reg_t iir_reg;
>  
> -               for_each_intel_encoder_can_psr(&dev_priv->drm,
> encoder) {
> +               for_each_intel_encoder_with_psr(&dev_priv->drm,
> encoder) {
>                         struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  
>                         if (INTEL_GEN(dev_priv) >= 12)

Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
  2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
                   ` (7 preceding siblings ...)
  2021-02-11 11:34 ` [Intel-gfx] [PATCH 1/4] " Mun, Gwan-gyeong
@ 2021-02-11 11:34 ` Mun, Gwan-gyeong
  8 siblings, 0 replies; 13+ messages in thread
From: Mun, Gwan-gyeong @ 2021-02-11 11:34 UTC (permalink / raw)
  To: intel-gfx, Souza, Jose

On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote:
> for_each_intel_encoder.*_"can_psr" sounds strange, in my opinion
> "with_psr" is better.
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.h         |  4 ++--
>  drivers/gpu/drm/i915/display/intel_display_debugfs.c |  6 +++---
>  drivers/gpu/drm/i915/display/intel_psr.c             | 12 ++++++----
> --
>  drivers/gpu/drm/i915/i915_irq.c                      |  4 ++--
>  4 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index e3757ecabbf7..c60a58ba60ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -418,7 +418,7 @@ enum phy_fia {
>                 for_each_if((encoder_mask)
> &                            \
>                             drm_encoder_mask(&intel_encoder->base))
>  
> -#define for_each_intel_encoder_mask_can_psr(dev, intel_encoder,
> encoder_mask) \
> +#define for_each_intel_encoder_mask_with_psr(dev, intel_encoder,
> encoder_mask) \
>         list_for_each_entry((intel_encoder), &(dev)-
> >mode_config.encoder_list, base.head) \
>                 for_each_if(((encoder_mask) &
> drm_encoder_mask(&(intel_encoder)->base)) && \
>                             intel_encoder_can_psr(intel_encoder))
> @@ -427,7 +427,7 @@ enum phy_fia {
>         for_each_intel_encoder(dev, intel_encoder)              \
>                 for_each_if(intel_encoder_is_dp(intel_encoder))
>  
> -#define for_each_intel_encoder_can_psr(dev, intel_encoder) \
> +#define for_each_intel_encoder_with_psr(dev, intel_encoder) \
>         for_each_intel_encoder((dev), (intel_encoder)) \
>                 for_each_if(intel_encoder_can_psr(intel_encoder))
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index d6e4a9237bda..7ce11d851163 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -437,7 +437,7 @@ static int i915_edp_psr_status(struct seq_file
> *m, void *data)
>                 return -ENODEV;
>  
>         /* Find the first EDP which supports PSR */
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 intel_dp = enc_to_intel_dp(encoder);
>                 break;
>         }
> @@ -459,7 +459,7 @@ i915_edp_psr_debug_set(void *data, u64 val)
>         if (!HAS_PSR(dev_priv))
>                 return ret;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
>                 drm_dbg_kms(&dev_priv->drm, "Setting PSR debug to
> %llx\n", val);
> @@ -484,7 +484,7 @@ i915_edp_psr_debug_get(void *data, u64 *val)
>         if (!HAS_PSR(dev_priv))
>                 return -ENODEV;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
>                 // TODO: split to each transcoder's PSR debug state
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index bf214d0e2dec..1d3903612fcb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1232,8 +1232,8 @@ void intel_psr2_program_trans_man_trk_ctl(const
> struct intel_crtc_state *crtc_st
>             !crtc_state->enable_psr2_sel_fetch)
>                 return;
>  
> -       for_each_intel_encoder_mask_can_psr(&dev_priv->drm, encoder,
> -                                           crtc_state-
> >uapi.encoder_mask) {
> +       for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
> +                                            crtc_state-
> >uapi.encoder_mask) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
>                 if (!intel_dp->psr.enabled)
> @@ -1515,8 +1515,8 @@ void intel_psr_wait_for_idle(const struct
> intel_crtc_state *new_crtc_state)
>         if (!new_crtc_state->has_psr)
>                 return;
>  
> -       for_each_intel_encoder_mask_can_psr(&dev_priv->drm, encoder,
> -                                           new_crtc_state-
> >uapi.encoder_mask) {
> +       for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
> +                                            new_crtc_state-
> >uapi.encoder_mask) {
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>                 u32 psr_status;
>  
> @@ -1730,7 +1730,7 @@ void intel_psr_invalidate(struct
> drm_i915_private *dev_priv,
>         if (origin == ORIGIN_FLIP)
>                 return;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 unsigned int pipe_frontbuffer_bits =
> frontbuffer_bits;
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
> @@ -1802,7 +1802,7 @@ void intel_psr_flush(struct drm_i915_private
> *dev_priv,
>  {
>         struct intel_encoder *encoder;
>  
> -       for_each_intel_encoder_can_psr(&dev_priv->drm, encoder) {
> +       for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
>                 unsigned int pipe_frontbuffer_bits =
> frontbuffer_bits;
>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 98145a7f28a4..8f6b60661a4d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2096,7 +2096,7 @@ static void ivb_display_irq_handler(struct
> drm_i915_private *dev_priv,
>         if (de_iir & DE_EDP_PSR_INT_HSW) {
>                 struct intel_encoder *encoder;
>  
> -               for_each_intel_encoder_can_psr(&dev_priv->drm,
> encoder) {
> +               for_each_intel_encoder_with_psr(&dev_priv->drm,
> encoder) {
>                         struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  
>                         u32 psr_iir = intel_uncore_read(&dev_priv-
> >uncore,
> @@ -2323,7 +2323,7 @@ gen8_de_misc_irq_handler(struct
> drm_i915_private *dev_priv, u32 iir)
>                 u32 psr_iir;
>                 i915_reg_t iir_reg;
>  
> -               for_each_intel_encoder_can_psr(&dev_priv->drm,
> encoder) {
> +               for_each_intel_encoder_with_psr(&dev_priv->drm,
> encoder) {
>                         struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  
>                         if (INTEL_GEN(dev_priv) >= 12)

Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl() José Roberto de Souza
@ 2021-02-11 11:37   ` Mun, Gwan-gyeong
  0 siblings, 0 replies; 13+ messages in thread
From: Mun, Gwan-gyeong @ 2021-02-11 11:37 UTC (permalink / raw)
  To: intel-gfx, Souza, Jose

On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote:
> There is no support for two pipes one transcoder for PSR and if we
> had
> that the current code should not use cpu_transcoder.
> Also I can't see a scenario where crtc_state->enable_psr2_sel_fetch
> is
> set and PSR is not enabled and if by a bug it happens PSR HW will
> just
> ignore any value in set in PSR2_MAN_TRK_CTL.
> 
> So dropping all the rest and keeping the same behavior that we have
> with intel_psr2_program_plane_sel_fetch().
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 14 ++------------
>  1 file changed, 2 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 1d3903612fcb..8ad9fcff3a12 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1226,23 +1226,13 @@ void
> intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
>  void intel_psr2_program_trans_man_trk_ctl(const struct
> intel_crtc_state *crtc_state)
>  {
>         struct drm_i915_private *dev_priv = to_i915(crtc_state-
> >uapi.crtc->dev);
> -       struct intel_encoder *encoder;
>  
>         if (!HAS_PSR2_SEL_FETCH(dev_priv) ||
>             !crtc_state->enable_psr2_sel_fetch)
>                 return;
>  
> -       for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
> -                                            crtc_state-
> >uapi.encoder_mask) {
> -               struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> -
> -               if (!intel_dp->psr.enabled)
> -                       continue;
> -
> -               intel_de_write(dev_priv,
> -                              PSR2_MAN_TRK_CTL(crtc_state-
> >cpu_transcoder),
> -                              crtc_state->psr2_man_track_ctl);
> -       }
> +       intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(crtc_state-
> >cpu_transcoder),
> +                      crtc_state->psr2_man_track_ctl);
>  }
>  
>  static void psr2_man_trk_ctl_calc(struct intel_crtc_state
> *crtc_state,

Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR()
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR() José Roberto de Souza
@ 2021-02-22  9:48   ` Mun, Gwan-gyeong
  0 siblings, 0 replies; 13+ messages in thread
From: Mun, Gwan-gyeong @ 2021-02-22  9:48 UTC (permalink / raw)
  To: intel-gfx, Souza, Jose

On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote:
> If source_support is set the platform supports PSR so no need to
> check
> it again at every CAN_PSR().
> 
> Also removing the intel_dp_is_edp() calls, if sink_support is set
> the sink connected is for sure a eDP panel.
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h | 5 ++---
>  drivers/gpu/drm/i915/display/intel_dp.c            | 2 +-
>  drivers/gpu/drm/i915/display/intel_psr.c           | 4 ++--
>  3 files changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index ebaa9d0ed376..4a46c4e9b0ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1793,9 +1793,8 @@ dp_to_i915(struct intel_dp *intel_dp)
>         return to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
>  }
>  
> -#define CAN_PSR(intel_dp)      (HAS_PSR(dp_to_i915(intel_dp)) && \
> -                                (intel_dp)->psr.sink_support && \
> -                                (intel_dp)->psr.source_support)
> +#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> +                          (intel_dp)->psr.source_support)
>  
>  static inline bool intel_encoder_can_psr(struct intel_encoder
> *encoder)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4f89e0de5dde..0a0cc61344c4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2358,7 +2358,7 @@ bool intel_dp_initial_fastset_check(struct
> intel_encoder *encoder,
>                 return false;
>         }
>  
> -       if (CAN_PSR(intel_dp) && intel_dp_is_edp(intel_dp)) {
> +       if (CAN_PSR(intel_dp)) {
>                 drm_dbg_kms(&i915->drm, "Forcing full modeset to
> compute PSR state\n");
>                 crtc_state->uapi.mode_changed = true;
>                 return false;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 8ad9fcff3a12..e0111b470570 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1962,7 +1962,7 @@ void intel_psr_short_pulse(struct intel_dp
> *intel_dp)
>                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
>                           DP_PSR_LINK_CRC_ERROR;
>  
> -       if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp))
> +       if (!CAN_PSR(intel_dp))
>                 return;
>  
>         mutex_lock(&psr->lock);
> @@ -2012,7 +2012,7 @@ bool intel_psr_enabled(struct intel_dp
> *intel_dp)
>  {
>         bool ret;
>  
> -       if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp))
> +       if (!CAN_PSR(intel_dp))
>                 return false;
>  
>         mutex_lock(&intel_dp->psr.lock);
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR
  2021-02-09 18:14 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR José Roberto de Souza
@ 2021-02-22  9:57   ` Mun, Gwan-gyeong
  0 siblings, 0 replies; 13+ messages in thread
From: Mun, Gwan-gyeong @ 2021-02-22  9:57 UTC (permalink / raw)
  To: intel-gfx, Souza, Jose

On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote:
> This will set the right value of source_support when the port
> encoder/port supports PSR but sink don't.
> 
> This change will also be needed in future for panel replay as psr
> struct needs to be initialized even if disconnected or current sink
> don't support PSR.
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index e0111b470570..6b3e2120161e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1837,9 +1837,6 @@ void intel_psr_init(struct intel_dp *intel_dp)
>         if (!HAS_PSR(dev_priv))
>                 return;
>  
> -       if (!intel_dp->psr.sink_support)
> -               return;
> -
>         /*
>          * HSW spec explicitly says PSR is tied to port A.
>          * BDW+ platforms have a instance of PSR registers per
> transcoder but

Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>



_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2021-02-22  9:57 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
2021-02-09 18:14 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl() José Roberto de Souza
2021-02-11 11:37   ` Mun, Gwan-gyeong
2021-02-09 18:14 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR() José Roberto de Souza
2021-02-22  9:48   ` Mun, Gwan-gyeong
2021-02-09 18:14 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR José Roberto de Souza
2021-02-22  9:57   ` Mun, Gwan-gyeong
2021-02-09 18:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr Patchwork
2021-02-09 18:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-09 18:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-09 22:49 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-02-11 11:34 ` [Intel-gfx] [PATCH 1/4] " Mun, Gwan-gyeong
2021-02-11 11:34 ` Mun, Gwan-gyeong

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