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* [Intel-gfx] [PATCH] drm/i915/display: Do not allow DC3CO if PSR SF is enabled
@ 2021-02-22 11:24 Gwan-gyeong Mun
  2021-02-22 12:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Gwan-gyeong Mun @ 2021-02-22 11:24 UTC (permalink / raw)
  To: intel-gfx

Even though GEN12+ HW supports PSR + DC3CO, DMC's HW DC3CO exitmachanism
has an issue with using of SelectiveFecth and PSR2 ManualTracking.
And as new GEN12+ platform like RKL, ADL-S/P don't have PSR2 HW tracking,
Selective Fetch wiil be enabled by default.
Therefore if the system enables PSR SelectiveFetch / PSR ManualTracking,
it does not allow DC3CO dc state, in that case.

When this DC3CO exit issue is addressed while PSR SF is enabled,
this restriction should be removed.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 .../drm/i915/display/intel_display_power.c    | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index f00c1750febd..b385b3f082f2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -804,10 +804,12 @@ static u32 gen9_dc_mask(struct drm_i915_private *dev_priv)
 
 	mask = DC_STATE_EN_UPTO_DC5;
 
-	if (INTEL_GEN(dev_priv) >= 12)
-		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6
-					  | DC_STATE_EN_DC9;
-	else if (IS_GEN(dev_priv, 11))
+	if (INTEL_GEN(dev_priv) >= 12) {
+		/* DMC's DC3CO exit machanism has an issue with SelectiveFecth */
+		if (!dev_priv->params.enable_psr2_sel_fetch)
+			mask |=  DC_STATE_EN_DC3CO;
+		mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;
+	} else if (IS_GEN(dev_priv, 11))
 		mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;
 	else if (IS_GEN9_LP(dev_priv))
 		mask |= DC_STATE_EN_DC9;
@@ -4588,10 +4590,15 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 
 	switch (requested_dc) {
 	case 4:
-		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6;
+		/* DMC's DC3CO exit machanism has an issue with SelectiveFecth */
+		if (!dev_priv->params.enable_psr2_sel_fetch)
+			mask |=  DC_STATE_EN_DC3CO;
+		mask |= DC_STATE_EN_UPTO_DC6;
 		break;
 	case 3:
-		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC5;
+		if (!dev_priv->params.enable_psr2_sel_fetch)
+			mask |=  DC_STATE_EN_DC3CO;
+		mask |= DC_STATE_EN_UPTO_DC5;
 		break;
 	case 2:
 		mask |= DC_STATE_EN_UPTO_DC6;
-- 
2.30.0

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^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-02-22 15:16 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-22 11:24 [Intel-gfx] [PATCH] drm/i915/display: Do not allow DC3CO if PSR SF is enabled Gwan-gyeong Mun
2021-02-22 12:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-02-22 12:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-22 14:05 ` [Intel-gfx] [PATCH] " Souza, Jose
2021-02-22 15:16 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork

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