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From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
	alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/5] ASoC: rt5682: clock driver must use the clock provider API
Date: Mon, 12 Apr 2021 13:27:16 -0700	[thread overview]
Message-ID: <161825923642.3764895.16526540466177115640@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20210410111356.467340-4-jbrunet@baylibre.com>

Quoting Jerome Brunet (2021-04-10 04:13:54)
> Clock drivers ops should not the clk API but the clock provider (clk_hw)
> instead.
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  sound/soc/codecs/rt5682.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c
> index 0e2a10ed11da..2eee02ac8d49 100644
> --- a/sound/soc/codecs/rt5682.c
> +++ b/sound/soc/codecs/rt5682.c
> @@ -2634,7 +2634,7 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
>                 container_of(hw, struct rt5682_priv,
>                              dai_clks_hw[RT5682_DAI_WCLK_IDX]);
>         struct snd_soc_component *component = rt5682->component;
> -       struct clk *parent_clk;
> +       struct clk_hw *parent_hw;
>         const char * const clk_name = clk_hw_get_name(hw);
>         int pre_div;
>         unsigned int clk_pll2_out;
> @@ -2649,8 +2649,8 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
>          *
>          * It will set the codec anyway by assuming mclk is 48MHz.
>          */
> -       parent_clk = clk_get_parent(hw->clk);
> -       if (!parent_clk)
> +       parent_hw = clk_hw_get_parent(hw);
> +       if (!parent_hw)
>                 dev_warn(component->dev,
>                         "Parent mclk of wclk not acquired in driver. Please ensure mclk was provided as %d Hz.\n",
>                         CLK_PLL2_FIN);

Can this code be removed? I don't know why we care to check if the clk
has a parent or not.

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
	Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH 3/5] ASoC: rt5682: clock driver must use the clock provider API
Date: Mon, 12 Apr 2021 13:27:16 -0700	[thread overview]
Message-ID: <161825923642.3764895.16526540466177115640@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20210410111356.467340-4-jbrunet@baylibre.com>

Quoting Jerome Brunet (2021-04-10 04:13:54)
> Clock drivers ops should not the clk API but the clock provider (clk_hw)
> instead.
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  sound/soc/codecs/rt5682.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c
> index 0e2a10ed11da..2eee02ac8d49 100644
> --- a/sound/soc/codecs/rt5682.c
> +++ b/sound/soc/codecs/rt5682.c
> @@ -2634,7 +2634,7 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
>                 container_of(hw, struct rt5682_priv,
>                              dai_clks_hw[RT5682_DAI_WCLK_IDX]);
>         struct snd_soc_component *component = rt5682->component;
> -       struct clk *parent_clk;
> +       struct clk_hw *parent_hw;
>         const char * const clk_name = clk_hw_get_name(hw);
>         int pre_div;
>         unsigned int clk_pll2_out;
> @@ -2649,8 +2649,8 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
>          *
>          * It will set the codec anyway by assuming mclk is 48MHz.
>          */
> -       parent_clk = clk_get_parent(hw->clk);
> -       if (!parent_clk)
> +       parent_hw = clk_hw_get_parent(hw);
> +       if (!parent_hw)
>                 dev_warn(component->dev,
>                         "Parent mclk of wclk not acquired in driver. Please ensure mclk was provided as %d Hz.\n",
>                         CLK_PLL2_FIN);

Can this code be removed? I don't know why we care to check if the clk
has a parent or not.

  reply	other threads:[~2021-04-12 20:27 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-10 11:13 [PATCH 0/5] ASoC: clock provider clean-up Jerome Brunet
2021-04-10 11:13 ` Jerome Brunet
2021-04-10 11:13 ` [PATCH 1/5] ASoC: stm32: properly get clk from the provider Jerome Brunet
2021-04-10 11:13   ` Jerome Brunet
2021-04-12 20:25   ` Stephen Boyd
2021-04-12 20:25     ` Stephen Boyd
2021-04-10 11:13 ` [PATCH 2/5] ASoC: wcd934x: use the clock provider API Jerome Brunet
2021-04-10 11:13   ` Jerome Brunet
2021-04-12 20:26   ` Stephen Boyd
2021-04-12 20:26     ` Stephen Boyd
2021-04-10 11:13 ` [PATCH 3/5] ASoC: rt5682: clock driver must " Jerome Brunet
2021-04-10 11:13   ` Jerome Brunet
2021-04-12 20:27   ` Stephen Boyd [this message]
2021-04-12 20:27     ` Stephen Boyd
2021-04-13  7:31     ` Jerome Brunet
2021-04-10 11:13 ` [PATCH 4/5] ASoC: lpass: " Jerome Brunet
2021-04-10 11:13   ` Jerome Brunet
2021-04-12  9:38   ` Srinivas Kandagatla
2021-04-12 12:17     ` Jerome Brunet
2021-04-12 13:55       ` Srinivas Kandagatla
2021-04-10 11:13 ` [PATCH 5/5] ASoC: da7219: properly get clk from the provider Jerome Brunet
2021-04-10 11:13   ` Jerome Brunet
2021-04-12 20:27   ` Stephen Boyd
2021-04-12 20:27     ` Stephen Boyd

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