From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Rutland <mark.rutland@arm.com>,
Peter Collingbourne <pcc@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Will Deacon <will@kernel.org>
Cc: Evgenii Stepanov <eugenis@google.com>,
stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Andrey Konovalov <andreyknvl@gmail.com>
Subject: Re: [PATCH v2] arm64: mte: initialize RGSR_EL1.SEED in __cpu_setup
Date: Mon, 10 May 2021 19:00:31 +0100 [thread overview]
Message-ID: <162066962704.23704.7597765574879024372.b4-ty@arm.com> (raw)
In-Reply-To: <20210507185905.1745402-1-pcc@google.com>
On Fri, 7 May 2021 11:59:05 -0700, Peter Collingbourne wrote:
> A valid implementation choice for the ChooseRandomNonExcludedTag()
> pseudocode function used by IRG is to behave in the same way as with
> GCR_EL1.RRND=0. This would mean that RGSR_EL1.SEED is used as an LFSR
> which must have a non-zero value in order for IRG to properly produce
> pseudorandom numbers. However, RGSR_EL1 is reset to an UNKNOWN value
> on soft reset and thus may reset to 0. Therefore we must initialize
> RGSR_EL1.SEED to a non-zero value in order to ensure that IRG behaves
> as expected.
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: mte: initialize RGSR_EL1.SEED in __cpu_setup
https://git.kernel.org/arm64/c/37a8024d2655
--
Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Rutland <mark.rutland@arm.com>,
Peter Collingbourne <pcc@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Will Deacon <will@kernel.org>
Cc: Evgenii Stepanov <eugenis@google.com>,
stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Andrey Konovalov <andreyknvl@gmail.com>
Subject: Re: [PATCH v2] arm64: mte: initialize RGSR_EL1.SEED in __cpu_setup
Date: Mon, 10 May 2021 19:00:31 +0100 [thread overview]
Message-ID: <162066962704.23704.7597765574879024372.b4-ty@arm.com> (raw)
In-Reply-To: <20210507185905.1745402-1-pcc@google.com>
On Fri, 7 May 2021 11:59:05 -0700, Peter Collingbourne wrote:
> A valid implementation choice for the ChooseRandomNonExcludedTag()
> pseudocode function used by IRG is to behave in the same way as with
> GCR_EL1.RRND=0. This would mean that RGSR_EL1.SEED is used as an LFSR
> which must have a non-zero value in order for IRG to properly produce
> pseudorandom numbers. However, RGSR_EL1 is reset to an UNKNOWN value
> on soft reset and thus may reset to 0. Therefore we must initialize
> RGSR_EL1.SEED to a non-zero value in order to ensure that IRG behaves
> as expected.
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: mte: initialize RGSR_EL1.SEED in __cpu_setup
https://git.kernel.org/arm64/c/37a8024d2655
--
Catalin
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next prev parent reply other threads:[~2021-05-10 18:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-07 18:59 [PATCH v2] arm64: mte: initialize RGSR_EL1.SEED in __cpu_setup Peter Collingbourne
2021-05-07 18:59 ` Peter Collingbourne
2021-05-10 15:31 ` Mark Rutland
2021-05-10 15:31 ` Mark Rutland
2021-05-10 18:00 ` Catalin Marinas [this message]
2021-05-10 18:00 ` Catalin Marinas
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