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From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
	lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
	plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz,
	tiwai@suse.com, srinivas.kandagatla@linaro.org,
	rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org,
	alsa-devel@alsa-project.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, swboyd@chromium.org,
	judyhsiao@chromium.org
Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>,
	Venkata Prasad Potturu <potturu@codeaurora.org>
Subject: [PATCH 5/7] ASoC: codecs: lpass-rx-macro: Change bulk voting to individual clock voting
Date: Mon, 20 Sep 2021 13:05:29 +0530	[thread overview]
Message-ID: <1632123331-2425-6-git-send-email-srivasam@codeaurora.org> (raw)
In-Reply-To: <1632123331-2425-1-git-send-email-srivasam@codeaurora.org>

Change bulk clock frequency voting to individual voting.

Fixes: af3d54b99764 (ASoC: codecs: lpass-rx-macro: add support for lpass rx macro)

Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
---
 sound/soc/codecs/lpass-rx-macro.c | 68 +++++++++++++++++++++++++++------------
 1 file changed, 48 insertions(+), 20 deletions(-)

diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c
index 520c760..349d879 100644
--- a/sound/soc/codecs/lpass-rx-macro.c
+++ b/sound/soc/codecs/lpass-rx-macro.c
@@ -608,7 +608,11 @@ struct rx_macro {
 	int softclip_clk_users;
 
 	struct regmap *regmap;
-	struct clk_bulk_data clks[RX_NUM_CLKS_MAX];
+	struct clk *mclk;
+	struct clk *npl;
+	struct clk *macro;
+	struct clk *dcodec;
+	struct clk *fsgen;
 	struct clk_hw hw;
 };
 #define to_rx_macro(_hw) container_of(_hw, struct rx_macro, hw)
@@ -3423,6 +3427,8 @@ static int swclk_gate_enable(struct clk_hw *hw)
 {
 	struct rx_macro *rx = to_rx_macro(hw);
 
+	clk_set_rate(rx->npl, MCLK_FREQ);
+	clk_prepare_enable(rx->npl);
 	rx_macro_mclk_enable(rx, true);
 	if (rx->reset_swr)
 		regmap_update_bits(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
@@ -3448,6 +3454,7 @@ static void swclk_gate_disable(struct clk_hw *hw)
 			   CDC_RX_SWR_CLK_EN_MASK, 0);
 
 	rx_macro_mclk_enable(rx, false);
+	clk_disable_unprepare(rx->npl);
 }
 
 static int swclk_gate_is_enabled(struct clk_hw *hw)
@@ -3485,7 +3492,7 @@ static struct clk *rx_macro_register_mclk_output(struct rx_macro *rx)
 	struct clk_init_data init;
 	int ret;
 
-	parent_clk_name = __clk_get_name(rx->clks[2].clk);
+	parent_clk_name = __clk_get_name(rx->mclk);
 
 	init.name = clk_name;
 	init.ops = &swclk_gate_ops;
@@ -3525,17 +3532,25 @@ static int rx_macro_probe(struct platform_device *pdev)
 	if (!rx)
 		return -ENOMEM;
 
-	rx->clks[0].id = "macro";
-	rx->clks[1].id = "dcodec";
-	rx->clks[2].id = "mclk";
-	rx->clks[3].id = "npl";
-	rx->clks[4].id = "fsgen";
+	rx->mclk = devm_clk_get(dev, "mclk");
+	if (IS_ERR(rx->mclk))
+		return PTR_ERR(rx->mclk);
+	rx->npl = devm_clk_get(dev, "npl");
+	if (IS_ERR(rx->npl))
+		return PTR_ERR(rx->npl);
 
-	ret = devm_clk_bulk_get(dev, RX_NUM_CLKS_MAX, rx->clks);
-	if (ret) {
-		dev_err(dev, "Error getting RX Clocks (%d)\n", ret);
-		return ret;
-	}
+
+	rx->macro = devm_clk_get_optional(dev, "macro");
+	if (IS_ERR(rx->macro))
+		return PTR_ERR(rx->macro);
+
+	rx->dcodec = devm_clk_get_optional(dev, "dcodec");
+	if (IS_ERR(rx->dcodec))
+		return PTR_ERR(rx->dcodec);
+
+	rx->fsgen = devm_clk_get(dev, "fsgen");
+	if (IS_ERR(rx->fsgen))
+		return PTR_ERR(rx->fsgen);
 
 	base = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(base))
@@ -3549,21 +3564,28 @@ static int rx_macro_probe(struct platform_device *pdev)
 	rx->dev = dev;
 
 	/* set MCLK and NPL rates */
-	clk_set_rate(rx->clks[2].clk, MCLK_FREQ);
-	clk_set_rate(rx->clks[3].clk, 2 * MCLK_FREQ);
+	clk_set_rate(rx->mclk, MCLK_FREQ);
+	clk_set_rate(rx->npl, 2 * MCLK_FREQ);
 
-	ret = clk_bulk_prepare_enable(RX_NUM_CLKS_MAX, rx->clks);
-	if (ret)
-		return ret;
+	clk_prepare_enable(rx->macro);
+	clk_prepare_enable(rx->dcodec);
+	clk_prepare_enable(rx->mclk);
+	clk_prepare_enable(rx->npl);
+	clk_prepare_enable(rx->fsgen);
 
 	rx_macro_register_mclk_output(rx);
 
 	ret = devm_snd_soc_register_component(dev, &rx_macro_component_drv,
 					      rx_macro_dai,
 					      ARRAY_SIZE(rx_macro_dai));
-	if (ret)
-		clk_bulk_disable_unprepare(RX_NUM_CLKS_MAX, rx->clks);
+	if (ret) {
+		clk_disable_unprepare(rx->mclk);
+		clk_disable_unprepare(rx->npl);
+		clk_disable_unprepare(rx->macro);
+		clk_disable_unprepare(rx->dcodec);
+		clk_disable_unprepare(rx->fsgen);
 
+	}
 	return ret;
 }
 
@@ -3572,7 +3594,13 @@ static int rx_macro_remove(struct platform_device *pdev)
 	struct rx_macro *rx = dev_get_drvdata(&pdev->dev);
 
 	of_clk_del_provider(pdev->dev.of_node);
-	clk_bulk_disable_unprepare(RX_NUM_CLKS_MAX, rx->clks);
+
+	clk_disable_unprepare(rx->mclk);
+	clk_disable_unprepare(rx->npl);
+	clk_disable_unprepare(rx->macro);
+	clk_disable_unprepare(rx->dcodec);
+	clk_disable_unprepare(rx->fsgen);
+
 	return 0;
 }
 
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.


WARNING: multiple messages have this Message-ID
From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
	lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
	plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz,
	tiwai@suse.com, srinivas.kandagatla@linaro.org,
	rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org,
	alsa-devel@alsa-project.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, swboyd@chromium.org,
	judyhsiao@chromium.org
Cc: Venkata Prasad Potturu <potturu@codeaurora.org>,
	Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Subject: [PATCH 5/7] ASoC: codecs: lpass-rx-macro: Change bulk voting to individual clock voting
Date: Mon, 20 Sep 2021 13:05:29 +0530	[thread overview]
Message-ID: <1632123331-2425-6-git-send-email-srivasam@codeaurora.org> (raw)
In-Reply-To: <1632123331-2425-1-git-send-email-srivasam@codeaurora.org>

Change bulk clock frequency voting to individual voting.

Fixes: af3d54b99764 (ASoC: codecs: lpass-rx-macro: add support for lpass rx macro)

Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
---
 sound/soc/codecs/lpass-rx-macro.c | 68 +++++++++++++++++++++++++++------------
 1 file changed, 48 insertions(+), 20 deletions(-)

diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c
index 520c760..349d879 100644
--- a/sound/soc/codecs/lpass-rx-macro.c
+++ b/sound/soc/codecs/lpass-rx-macro.c
@@ -608,7 +608,11 @@ struct rx_macro {
 	int softclip_clk_users;
 
 	struct regmap *regmap;
-	struct clk_bulk_data clks[RX_NUM_CLKS_MAX];
+	struct clk *mclk;
+	struct clk *npl;
+	struct clk *macro;
+	struct clk *dcodec;
+	struct clk *fsgen;
 	struct clk_hw hw;
 };
 #define to_rx_macro(_hw) container_of(_hw, struct rx_macro, hw)
@@ -3423,6 +3427,8 @@ static int swclk_gate_enable(struct clk_hw *hw)
 {
 	struct rx_macro *rx = to_rx_macro(hw);
 
+	clk_set_rate(rx->npl, MCLK_FREQ);
+	clk_prepare_enable(rx->npl);
 	rx_macro_mclk_enable(rx, true);
 	if (rx->reset_swr)
 		regmap_update_bits(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
@@ -3448,6 +3454,7 @@ static void swclk_gate_disable(struct clk_hw *hw)
 			   CDC_RX_SWR_CLK_EN_MASK, 0);
 
 	rx_macro_mclk_enable(rx, false);
+	clk_disable_unprepare(rx->npl);
 }
 
 static int swclk_gate_is_enabled(struct clk_hw *hw)
@@ -3485,7 +3492,7 @@ static struct clk *rx_macro_register_mclk_output(struct rx_macro *rx)
 	struct clk_init_data init;
 	int ret;
 
-	parent_clk_name = __clk_get_name(rx->clks[2].clk);
+	parent_clk_name = __clk_get_name(rx->mclk);
 
 	init.name = clk_name;
 	init.ops = &swclk_gate_ops;
@@ -3525,17 +3532,25 @@ static int rx_macro_probe(struct platform_device *pdev)
 	if (!rx)
 		return -ENOMEM;
 
-	rx->clks[0].id = "macro";
-	rx->clks[1].id = "dcodec";
-	rx->clks[2].id = "mclk";
-	rx->clks[3].id = "npl";
-	rx->clks[4].id = "fsgen";
+	rx->mclk = devm_clk_get(dev, "mclk");
+	if (IS_ERR(rx->mclk))
+		return PTR_ERR(rx->mclk);
+	rx->npl = devm_clk_get(dev, "npl");
+	if (IS_ERR(rx->npl))
+		return PTR_ERR(rx->npl);
 
-	ret = devm_clk_bulk_get(dev, RX_NUM_CLKS_MAX, rx->clks);
-	if (ret) {
-		dev_err(dev, "Error getting RX Clocks (%d)\n", ret);
-		return ret;
-	}
+
+	rx->macro = devm_clk_get_optional(dev, "macro");
+	if (IS_ERR(rx->macro))
+		return PTR_ERR(rx->macro);
+
+	rx->dcodec = devm_clk_get_optional(dev, "dcodec");
+	if (IS_ERR(rx->dcodec))
+		return PTR_ERR(rx->dcodec);
+
+	rx->fsgen = devm_clk_get(dev, "fsgen");
+	if (IS_ERR(rx->fsgen))
+		return PTR_ERR(rx->fsgen);
 
 	base = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(base))
@@ -3549,21 +3564,28 @@ static int rx_macro_probe(struct platform_device *pdev)
 	rx->dev = dev;
 
 	/* set MCLK and NPL rates */
-	clk_set_rate(rx->clks[2].clk, MCLK_FREQ);
-	clk_set_rate(rx->clks[3].clk, 2 * MCLK_FREQ);
+	clk_set_rate(rx->mclk, MCLK_FREQ);
+	clk_set_rate(rx->npl, 2 * MCLK_FREQ);
 
-	ret = clk_bulk_prepare_enable(RX_NUM_CLKS_MAX, rx->clks);
-	if (ret)
-		return ret;
+	clk_prepare_enable(rx->macro);
+	clk_prepare_enable(rx->dcodec);
+	clk_prepare_enable(rx->mclk);
+	clk_prepare_enable(rx->npl);
+	clk_prepare_enable(rx->fsgen);
 
 	rx_macro_register_mclk_output(rx);
 
 	ret = devm_snd_soc_register_component(dev, &rx_macro_component_drv,
 					      rx_macro_dai,
 					      ARRAY_SIZE(rx_macro_dai));
-	if (ret)
-		clk_bulk_disable_unprepare(RX_NUM_CLKS_MAX, rx->clks);
+	if (ret) {
+		clk_disable_unprepare(rx->mclk);
+		clk_disable_unprepare(rx->npl);
+		clk_disable_unprepare(rx->macro);
+		clk_disable_unprepare(rx->dcodec);
+		clk_disable_unprepare(rx->fsgen);
 
+	}
 	return ret;
 }
 
@@ -3572,7 +3594,13 @@ static int rx_macro_remove(struct platform_device *pdev)
 	struct rx_macro *rx = dev_get_drvdata(&pdev->dev);
 
 	of_clk_del_provider(pdev->dev.of_node);
-	clk_bulk_disable_unprepare(RX_NUM_CLKS_MAX, rx->clks);
+
+	clk_disable_unprepare(rx->mclk);
+	clk_disable_unprepare(rx->npl);
+	clk_disable_unprepare(rx->macro);
+	clk_disable_unprepare(rx->dcodec);
+	clk_disable_unprepare(rx->fsgen);
+
 	return 0;
 }
 
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.


  parent reply	other threads:[~2021-09-20  7:36 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-20  7:35 [PATCH 0/7] Update Lpass digital codec macro drivers Srinivasa Rao Mandadapu
2021-09-20  7:35 ` [PATCH 1/7] ASoC: qcom: Add compatible names in va,wsa,rx,tx codec drivers for sc7280 Srinivasa Rao Mandadapu
2021-09-20  7:35   ` [PATCH 1/7] ASoC: qcom: Add compatible names in va, wsa, rx, tx " Srinivasa Rao Mandadapu
2021-09-20 18:17   ` [PATCH 1/7] ASoC: qcom: Add compatible names in va,wsa,rx,tx " Stephen Boyd
2021-09-20 18:17     ` Stephen Boyd
2021-09-21  8:42     ` Srinivasa Rao Mandadapu
2021-09-20  7:35 ` [PATCH 2/7] ASoC: qcom: dt-bindings: Add compatible names for lpass sc7280 digital codecs Srinivasa Rao Mandadapu
2021-09-20  7:35   ` Srinivasa Rao Mandadapu
2021-09-20 13:24   ` Srinivas Kandagatla
2021-09-21  6:59     ` Srinivasa Rao Mandadapu
2021-09-20  7:35 ` [PATCH 3/7] ASoC: codecs: tx-macro: Change mic control registers to volatile Srinivasa Rao Mandadapu
2021-09-20  7:35   ` Srinivasa Rao Mandadapu
2021-09-20 13:24   ` Srinivas Kandagatla
2021-09-21  7:30     ` Srinivasa Rao Mandadapu
2021-09-21  8:48       ` Srinivas Kandagatla
2021-09-21 13:02         ` Srinivasa Rao Mandadapu
2021-09-20  7:35 ` [PATCH 4/7] ASoC: codecs: lpass-va-macro: Change bulk voting to individual clock voting Srinivasa Rao Mandadapu
2021-09-20  7:35   ` Srinivasa Rao Mandadapu
2021-09-20 13:25   ` Srinivas Kandagatla
2021-09-21  8:14     ` Srinivasa Rao Mandadapu
2021-09-21  8:50       ` Srinivas Kandagatla
2021-09-21 12:25         ` Srinivasa Rao Mandadapu
2021-09-20  7:35 ` Srinivasa Rao Mandadapu [this message]
2021-09-20  7:35   ` [PATCH 5/7] ASoC: codecs: lpass-rx-macro: " Srinivasa Rao Mandadapu
2021-09-20  7:35 ` [PATCH 6/7] ASoC: codecs: lpass-tx-macro: " Srinivasa Rao Mandadapu
2021-09-20  7:35   ` Srinivasa Rao Mandadapu
2021-09-20  7:35 ` [PATCH 7/7] ASoC: codecs: lpass-va-macro: set mclk clock rate correctly Srinivasa Rao Mandadapu
2021-09-20  7:35   ` Srinivasa Rao Mandadapu

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