From: Will Deacon <will@kernel.org>
To: robh+dt@kernel.org, Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: catalin.marinas@arm.com, kernel-team@android.com,
Will Deacon <will@kernel.org>,
uchida.jun@socionext.com, leo.yan@linaro.org, joro@8bytes.org,
devicetree@vger.kernel.org, jkchen@linux.alibaba.com,
iommu@lists.linux-foundation.org, mark.rutland@arm.com,
robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/3] perf/smmuv3: Support devicetree
Date: Tue, 14 Dec 2021 14:04:33 +0000 [thread overview]
Message-ID: <163948379278.3583372.10472496054779146145.b4-ty@kernel.org> (raw)
In-Reply-To: <20211117144844.241072-1-jean-philippe@linaro.org>
On Wed, 17 Nov 2021 14:48:42 +0000, Jean-Philippe Brucker wrote:
> Add devicetree binding for the SMMUv3 PMU, called Performance Monitoring
> Counter Group (PMCG) in the spec. Each SMMUv3 implementation can have
> multiple independent PMCGs, for example one for the Translation Control
> Unit (TCU) and one per Translation Buffer Unit (TBU).
>
> Since v1 [1]:
> * Fixed warnings in the binding doc
> * Removed hip08 support
> * Merged Robin's version. I took the liberty of splitting the driver
> patch into 2 and 3. One fix in patch 3, and whitespace changes (the
> driver uses spaces instead of tabs to align #define values, which I
> was going to fix but actually seems more common across the tree.)
>
> [...]
Applied to arm64 (for-next/perf-smmu), thanks!
[1/3] dt-bindings: Add Arm SMMUv3 PMCG binding
https://git.kernel.org/arm64/c/2704e7594383
[2/3] perf/smmuv3: Add devicetree support
https://git.kernel.org/arm64/c/3f7be4356176
[3/3] perf/smmuv3: Synthesize IIDR from CoreSight ID registers
https://git.kernel.org/arm64/c/df457ca973fe
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: robh+dt@kernel.org, Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
Will Deacon <will@kernel.org>,
catalin.marinas@arm.com, robin.murphy@arm.com,
iommu@lists.linux-foundation.org, uchida.jun@socionext.com,
leo.yan@linaro.org, kernel-team@android.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/3] perf/smmuv3: Support devicetree
Date: Tue, 14 Dec 2021 14:04:33 +0000 [thread overview]
Message-ID: <163948379278.3583372.10472496054779146145.b4-ty@kernel.org> (raw)
In-Reply-To: <20211117144844.241072-1-jean-philippe@linaro.org>
On Wed, 17 Nov 2021 14:48:42 +0000, Jean-Philippe Brucker wrote:
> Add devicetree binding for the SMMUv3 PMU, called Performance Monitoring
> Counter Group (PMCG) in the spec. Each SMMUv3 implementation can have
> multiple independent PMCGs, for example one for the Translation Control
> Unit (TCU) and one per Translation Buffer Unit (TBU).
>
> Since v1 [1]:
> * Fixed warnings in the binding doc
> * Removed hip08 support
> * Merged Robin's version. I took the liberty of splitting the driver
> patch into 2 and 3. One fix in patch 3, and whitespace changes (the
> driver uses spaces instead of tabs to align #define values, which I
> was going to fix but actually seems more common across the tree.)
>
> [...]
Applied to arm64 (for-next/perf-smmu), thanks!
[1/3] dt-bindings: Add Arm SMMUv3 PMCG binding
https://git.kernel.org/arm64/c/2704e7594383
[2/3] perf/smmuv3: Add devicetree support
https://git.kernel.org/arm64/c/3f7be4356176
[3/3] perf/smmuv3: Synthesize IIDR from CoreSight ID registers
https://git.kernel.org/arm64/c/df457ca973fe
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: robh+dt@kernel.org, Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: catalin.marinas@arm.com, kernel-team@android.com,
Will Deacon <will@kernel.org>,
uchida.jun@socionext.com, leo.yan@linaro.org, joro@8bytes.org,
devicetree@vger.kernel.org, jkchen@linux.alibaba.com,
iommu@lists.linux-foundation.org, mark.rutland@arm.com,
robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/3] perf/smmuv3: Support devicetree
Date: Tue, 14 Dec 2021 14:04:33 +0000 [thread overview]
Message-ID: <163948379278.3583372.10472496054779146145.b4-ty@kernel.org> (raw)
In-Reply-To: <20211117144844.241072-1-jean-philippe@linaro.org>
On Wed, 17 Nov 2021 14:48:42 +0000, Jean-Philippe Brucker wrote:
> Add devicetree binding for the SMMUv3 PMU, called Performance Monitoring
> Counter Group (PMCG) in the spec. Each SMMUv3 implementation can have
> multiple independent PMCGs, for example one for the Translation Control
> Unit (TCU) and one per Translation Buffer Unit (TBU).
>
> Since v1 [1]:
> * Fixed warnings in the binding doc
> * Removed hip08 support
> * Merged Robin's version. I took the liberty of splitting the driver
> patch into 2 and 3. One fix in patch 3, and whitespace changes (the
> driver uses spaces instead of tabs to align #define values, which I
> was going to fix but actually seems more common across the tree.)
>
> [...]
Applied to arm64 (for-next/perf-smmu), thanks!
[1/3] dt-bindings: Add Arm SMMUv3 PMCG binding
https://git.kernel.org/arm64/c/2704e7594383
[2/3] perf/smmuv3: Add devicetree support
https://git.kernel.org/arm64/c/3f7be4356176
[3/3] perf/smmuv3: Synthesize IIDR from CoreSight ID registers
https://git.kernel.org/arm64/c/df457ca973fe
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-14 14:04 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-17 14:48 [PATCH v2 0/3] perf/smmuv3: Support devicetree Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-11-17 14:48 ` [PATCH v2 1/3] dt-bindings: Add Arm SMMUv3 PMCG binding Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-11-17 14:48 ` [PATCH v2 2/3] perf/smmuv3: Add devicetree support Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-11-17 14:48 ` [PATCH v2 3/3] perf/smmuv3: Synthesize IIDR from CoreSight ID registers Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-11-17 14:48 ` Jean-Philippe Brucker
2021-12-07 9:14 ` John Garry
2021-12-07 9:14 ` John Garry
2021-12-07 9:14 ` John Garry via iommu
2021-12-07 12:04 ` Robin Murphy
2021-12-07 12:04 ` Robin Murphy
2021-12-07 12:04 ` Robin Murphy
2021-12-07 12:28 ` John Garry
2021-12-07 12:28 ` John Garry
2021-12-07 12:28 ` John Garry via iommu
2021-12-07 12:48 ` Robin Murphy
2021-12-07 12:48 ` Robin Murphy
2021-12-07 12:48 ` Robin Murphy
2021-12-07 13:20 ` Leo Yan
2021-12-07 13:20 ` Leo Yan
2021-12-07 13:20 ` Leo Yan
2021-12-07 13:46 ` Robin Murphy
2021-12-07 13:46 ` Robin Murphy
2021-12-07 13:46 ` Robin Murphy
2021-12-07 13:59 ` Leo Yan
2021-12-07 13:59 ` Leo Yan
2021-12-07 13:59 ` Leo Yan
2021-12-07 14:00 ` John Garry
2021-12-07 14:00 ` John Garry
2021-12-07 14:00 ` John Garry via iommu
2021-12-07 14:04 ` Leo Yan
2021-12-07 14:04 ` Leo Yan
2021-12-07 14:04 ` Leo Yan
2021-12-14 14:04 ` Will Deacon [this message]
2021-12-14 14:04 ` [PATCH v2 0/3] perf/smmuv3: Support devicetree Will Deacon
2021-12-14 14:04 ` Will Deacon
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