From: Anshuman Khandual <anshuman.khandual@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual <anshuman.khandual@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Mathieu Poirier <mathieu.poirier@linaro.org>, Suzuki Poulose <suzuki.poulose@arm.com>, coresight@lists.linaro.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 0/7] coresight: trbe: Workaround Cortex-A510 erratas Date: Fri, 7 Jan 2022 06:40:01 +0530 [thread overview] Message-ID: <1641517808-5735-1-git-send-email-anshuman.khandual@arm.com> (raw) This series adds three different workarounds in the TRBE driver for Cortex-A510 specific erratas. But first, this adds Cortex-A510 specific cpu part number definition in the platform. This series applies on 5.16-rc8. Relevant errata documents can be found here. https://developer.arm.com/documentation/SDEN2397239/900 https://developer.arm.com/documentation/SDEN2397589/900 Changes in V2: Accommodated most review comments from the previous version. - Split all patches into CPU errata definition, detection and TRBE workarounds - s/TRBE_WORKAROUND_SYSREG_WRITE_FAILURE/TRBE_NEEDS_DRAIN_AFTER_DISABLE - s/TRBE_WORKAROUND_CORRUPTION_WITH_ENABLE/TRBE_NEEDS_CTXT_SYNC_AFTER_ENABLE - s/trbe_may_fail_sysreg_write()/trbe_needs_drain_after_disable() - s/trbe_may_corrupt_with_enable()/trbe_needs_ctxt_sync_after_enable() - Updated Kconfig help message for config ARM64_ERRATUM_1902691 - Updated error message for trbe_is_broken() detection - Added new trblimitr parameter to set_trbe_enabled(), improving performance - Added COMPILE_TEST dependency in the errata, until TRBE part is available Changes in V1: https://lore.kernel.org/lkml/1641359159-22726-1-git-send-email-anshuman.khandual@arm.com/ Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki Poulose <suzuki.poulose@arm.com> Cc: coresight@lists.linaro.org Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Anshuman Khandual (7): arm64: Add Cortex-A510 CPU part definition arm64: errata: Add detection for TRBE ignored system register writes arm64: errata: Add detection for TRBE invalid prohibited states arm64: errata: Add detection for TRBE trace data corruption coresight: trbe: Work around the ignored system register writes coresight: trbe: Work around the invalid prohibited states coresight: trbe: Work around the trace data corruption Documentation/arm64/silicon-errata.rst | 6 + arch/arm64/Kconfig | 59 ++++++++++ arch/arm64/include/asm/cputype.h | 2 + arch/arm64/kernel/cpu_errata.c | 27 +++++ arch/arm64/tools/cpucaps | 3 + drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++----- drivers/hwtracing/coresight/coresight-trbe.h | 8 -- 7 files changed, 183 insertions(+), 36 deletions(-) -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Khandual <anshuman.khandual@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual <anshuman.khandual@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Mathieu Poirier <mathieu.poirier@linaro.org>, Suzuki Poulose <suzuki.poulose@arm.com>, coresight@lists.linaro.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 0/7] coresight: trbe: Workaround Cortex-A510 erratas Date: Fri, 7 Jan 2022 06:40:01 +0530 [thread overview] Message-ID: <1641517808-5735-1-git-send-email-anshuman.khandual@arm.com> (raw) This series adds three different workarounds in the TRBE driver for Cortex-A510 specific erratas. But first, this adds Cortex-A510 specific cpu part number definition in the platform. This series applies on 5.16-rc8. Relevant errata documents can be found here. https://developer.arm.com/documentation/SDEN2397239/900 https://developer.arm.com/documentation/SDEN2397589/900 Changes in V2: Accommodated most review comments from the previous version. - Split all patches into CPU errata definition, detection and TRBE workarounds - s/TRBE_WORKAROUND_SYSREG_WRITE_FAILURE/TRBE_NEEDS_DRAIN_AFTER_DISABLE - s/TRBE_WORKAROUND_CORRUPTION_WITH_ENABLE/TRBE_NEEDS_CTXT_SYNC_AFTER_ENABLE - s/trbe_may_fail_sysreg_write()/trbe_needs_drain_after_disable() - s/trbe_may_corrupt_with_enable()/trbe_needs_ctxt_sync_after_enable() - Updated Kconfig help message for config ARM64_ERRATUM_1902691 - Updated error message for trbe_is_broken() detection - Added new trblimitr parameter to set_trbe_enabled(), improving performance - Added COMPILE_TEST dependency in the errata, until TRBE part is available Changes in V1: https://lore.kernel.org/lkml/1641359159-22726-1-git-send-email-anshuman.khandual@arm.com/ Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki Poulose <suzuki.poulose@arm.com> Cc: coresight@lists.linaro.org Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Anshuman Khandual (7): arm64: Add Cortex-A510 CPU part definition arm64: errata: Add detection for TRBE ignored system register writes arm64: errata: Add detection for TRBE invalid prohibited states arm64: errata: Add detection for TRBE trace data corruption coresight: trbe: Work around the ignored system register writes coresight: trbe: Work around the invalid prohibited states coresight: trbe: Work around the trace data corruption Documentation/arm64/silicon-errata.rst | 6 + arch/arm64/Kconfig | 59 ++++++++++ arch/arm64/include/asm/cputype.h | 2 + arch/arm64/kernel/cpu_errata.c | 27 +++++ arch/arm64/tools/cpucaps | 3 + drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++----- drivers/hwtracing/coresight/coresight-trbe.h | 8 -- 7 files changed, 183 insertions(+), 36 deletions(-) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2022-01-07 1:10 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-07 1:10 Anshuman Khandual [this message] 2022-01-07 1:10 ` [PATCH V2 0/7] coresight: trbe: Workaround Cortex-A510 erratas Anshuman Khandual 2022-01-07 1:10 ` [PATCH V2 1/7] arm64: Add Cortex-A510 CPU part definition Anshuman Khandual 2022-01-07 1:10 ` Anshuman Khandual 2022-01-07 10:56 ` Catalin Marinas 2022-01-07 10:56 ` Catalin Marinas 2022-01-07 1:10 ` [PATCH V2 2/7] arm64: errata: Add detection for TRBE ignored system register writes Anshuman Khandual 2022-01-07 1:10 ` Anshuman Khandual 2022-01-07 10:58 ` Catalin Marinas 2022-01-07 10:58 ` Catalin Marinas 2022-01-07 11:39 ` Suzuki K Poulose 2022-01-07 11:39 ` Suzuki K Poulose 2022-01-07 1:10 ` [PATCH V2 3/7] arm64: errata: Add detection for TRBE invalid prohibited states Anshuman Khandual 2022-01-07 1:10 ` Anshuman Khandual 2022-01-07 10:59 ` Catalin Marinas 2022-01-07 10:59 ` Catalin Marinas 2022-01-07 11:56 ` Suzuki K Poulose 2022-01-07 11:56 ` Suzuki K Poulose 2022-01-07 1:10 ` [PATCH V2 4/7] arm64: errata: Add detection for TRBE trace data corruption Anshuman Khandual 2022-01-07 1:10 ` Anshuman Khandual 2022-01-07 10:59 ` Catalin Marinas 2022-01-07 10:59 ` Catalin Marinas 2022-01-07 11:58 ` Suzuki K Poulose 2022-01-07 11:58 ` Suzuki K Poulose 2022-01-07 1:10 ` [PATCH V2 5/7] coresight: trbe: Work around the ignored system register writes Anshuman Khandual 2022-01-07 1:10 ` Anshuman Khandual 2022-01-10 11:03 ` Suzuki K Poulose 2022-01-10 11:03 ` Suzuki K Poulose 2022-01-10 11:59 ` Anshuman Khandual 2022-01-10 11:59 ` Anshuman Khandual 2022-01-07 1:10 ` [PATCH V2 6/7] coresight: trbe: Work around the invalid prohibited states Anshuman Khandual 2022-01-07 1:10 ` Anshuman Khandual 2022-01-10 12:03 ` Suzuki K Poulose 2022-01-10 12:03 ` Suzuki K Poulose 2022-01-07 1:10 ` [PATCH V2 7/7] coresight: trbe: Work around the trace data corruption Anshuman Khandual 2022-01-07 1:10 ` Anshuman Khandual 2022-01-10 12:04 ` Suzuki K Poulose 2022-01-10 12:04 ` Suzuki K Poulose
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