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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations
Date: Fri, 25 Mar 2022 14:19:10 -0000	[thread overview]
Message-ID: <164821795042.24038.12382773311790602435@emeril.freedesktop.org> (raw)
In-Reply-To: <20220325123205.22140-1-ville.syrjala@linux.intel.com>

== Series Details ==

Series: drm/i915: Start reordering modeset clock calculations
URL   : https://patchwork.freedesktop.org/series/101789/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
3b931b51817a drm/i915: Make .get_dplls() return int
1b2d4a4a599e drm/i915: Pass dev_priv to intel_shared_dpll_init()
33ae484eb053 drm/i915: Remove pointless dpll_funcs checks
4a49b686c648 drm/i915: Adjust .crtc_compute_clock() calling convention
2e1ac19c4047 drm/i915: Move stuff into intel_dpll_crtc_compute_clock()
4e89276790b2 drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock()
3f11772ea836 drm/i915: Clear the dpll_hw_state when disabling a pipe
ca60dc3a2f8a drm/i915: Split out dg2_crtc_compute_clock()
f71777efae30 drm/i915: Add crtc .crtc_get_shared_dpll()
c64fe9a7ba0c drm/i915: Split shared dpll .get_dplls() into compute and get phases
-:191: CHECK:CAMELCASE: Avoid CamelCase: <SPLL_FREQ_1350MHz>
#191: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:1063:
+		SPLL_PLL_ENABLE | SPLL_FREQ_1350MHz | SPLL_REF_MUXED_SSC;

total: 0 errors, 0 warnings, 1 checks, 516 lines checked
f78032f898c7 drm/i915: Do .crtc_compute_clock() earlier
4d0d47819c90 drm/i915: Clean up DPLL related debugs
5d0098769f10 drm/i915: Reassign DPLLs only for crtcs going throug .compute_config()



  parent reply	other threads:[~2022-03-25 14:19 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-25 12:31 [Intel-gfx] [PATCH 00/13] drm/i915: Start reordering modeset clock calculations Ville Syrjala
2022-03-25 12:31 ` [Intel-gfx] [PATCH 01/13] drm/i915: Make .get_dplls() return int Ville Syrjala
2022-03-28 10:57   ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 02/13] drm/i915: Pass dev_priv to intel_shared_dpll_init() Ville Syrjala
2022-03-28 10:57   ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 03/13] drm/i915: Remove pointless dpll_funcs checks Ville Syrjala
2022-03-28 10:59   ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 04/13] drm/i915: Adjust .crtc_compute_clock() calling convention Ville Syrjala
2022-03-28 11:01   ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 05/13] drm/i915: Move stuff into intel_dpll_crtc_compute_clock() Ville Syrjala
2022-03-28 11:02   ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 06/13] drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock() Ville Syrjala
2022-03-28 11:05   ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 07/13] drm/i915: Clear the dpll_hw_state when disabling a pipe Ville Syrjala
2022-03-28 11:06   ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 08/13] drm/i915: Split out dg2_crtc_compute_clock() Ville Syrjala
2022-03-28 11:07   ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 09/13] drm/i915: Add crtc .crtc_get_shared_dpll() Ville Syrjala
2022-03-28 11:10   ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 10/13] drm/i915: Split shared dpll .get_dplls() into compute and get phases Ville Syrjala
2022-03-28 11:18   ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do .crtc_compute_clock() earlier Ville Syrjala
2022-03-25 12:32 ` [Intel-gfx] [PATCH 12/13] drm/i915: Clean up DPLL related debugs Ville Syrjala
2022-03-28 11:14   ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 13/13] drm/i915: Reassign DPLLs only for crtcs going throug .compute_config() Ville Syrjala
2022-03-25 14:19 ` Patchwork [this message]
2022-03-25 14:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Start reordering modeset clock calculations Patchwork
2022-03-25 14:24 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-25 14:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-29 13:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev2) Patchwork
2022-03-29 13:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-29 13:23 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-29 13:59 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-30  1:29 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev3) Patchwork
2022-03-30  1:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-30  1:35 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-30  2:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-30  3:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-04-14  2:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev4) Patchwork
2022-04-14  2:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-14  2:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-21 16:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev5) Patchwork
2022-04-21 17:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-04-21 21:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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