* [PATCH v2 0/7] SDX65 devicetree updates
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Hello,
This series adds devicetree nodes for SDX65. It adds reserved memory
nodes, SDHCI, smmu and tcsr mutex support.
Changes from v1:
- Addressed Mani's Comments and made necessary.
- Rebased on top of v5.18-rc2.
Thanks,
Rohit.
Rohit Agarwal (7):
ARM: dts: qcom: sdx65: Add reserved memory nodes
dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
ARM: dts: qcom: sdx65: Add support for SDHCI controller
dt-bindings: arm-smmu: Add binding for SDX65 SMMU
ARM: dts: qcom: sdx65: Enable ARM SMMU
ARM: dts: qcom: sdx65: Add support for TCSR Mutex
ARM: dts: qcom: sdx65: Add Shared memory manager support
.../devicetree/bindings/iommu/arm,smmu.yaml | 1 +
.../devicetree/bindings/mmc/sdhci-msm.txt | 1 +
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 21 ++++
arch/arm/boot/dts/qcom-sdx65.dtsi | 110 +++++++++++++++++++++
4 files changed, 133 insertions(+)
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 0/7] SDX65 devicetree updates
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Hello,
This series adds devicetree nodes for SDX65. It adds reserved memory
nodes, SDHCI, smmu and tcsr mutex support.
Changes from v1:
- Addressed Mani's Comments and made necessary.
- Rebased on top of v5.18-rc2.
Thanks,
Rohit.
Rohit Agarwal (7):
ARM: dts: qcom: sdx65: Add reserved memory nodes
dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
ARM: dts: qcom: sdx65: Add support for SDHCI controller
dt-bindings: arm-smmu: Add binding for SDX65 SMMU
ARM: dts: qcom: sdx65: Enable ARM SMMU
ARM: dts: qcom: sdx65: Add support for TCSR Mutex
ARM: dts: qcom: sdx65: Add Shared memory manager support
.../devicetree/bindings/iommu/arm,smmu.yaml | 1 +
.../devicetree/bindings/mmc/sdhci-msm.txt | 1 +
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 21 ++++
arch/arm/boot/dts/qcom-sdx65.dtsi | 110 +++++++++++++++++++++
4 files changed, 133 insertions(+)
--
2.7.4
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 1/7] ARM: dts: qcom: sdx65: Add reserved memory nodes
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-11 9:50 ` Rohit Agarwal
-1 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
Rohit Agarwal, manivannan.sadhasivam, linux-arm-kernel
Add reserved memory nodes to the SDX65 dtsi as defined by
the memory map.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 21 +++++++++++++++++
arch/arm/boot/dts/qcom-sdx65.dtsi | 45 ++++++++++++++++++++++++++++++++++++
2 files changed, 66 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index ad99f56..79dc31a 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -23,6 +23,27 @@
stdout-path = "serial0:115200n8";
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ mpss_dsm: memory@8c400000 {
+ no-map;
+ reg = <0x8c400000 0x3200000>;
+ };
+
+ ipa_fw_mem: memory@8fced000 {
+ no-map;
+ reg = <0x8fced000 0x10000>;
+ };
+
+ mpss_adsp_mem: memory@90800000 {
+ no-map;
+ reg = <0x90800000 0x10000000>;
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 7e2697f..dcc94c2 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -61,11 +61,56 @@
#size-cells = <1>;
ranges;
+ tz_heap_mem: memory@8fcad000 {
+ no-map;
+ reg = <0x8fcad000 0x40000>;
+ };
+
+ secdata_mem: memory@8fcfd000 {
+ no-map;
+ reg = <0x8fcfd000 0x1000>;
+ };
+
+ hyp_mem: memory@8fd00000 {
+ no-map;
+ reg = <0x8fd00000 0x80000>;
+ };
+
+ access_control_mem: memory@8fd80000 {
+ no-map;
+ reg = <0x8fd80000 0x80000>;
+ };
+
+ aop_mem: memory@8fe00000 {
+ no-map;
+ reg = <0x8fe00000 0x20000>;
+ };
+
+ smem_mem: memory@8fe20000 {
+ no-map;
+ reg = <0x8fe20000 0xc0000>;
+ };
+
cmd_db: reserved-memory@8fee0000 {
compatible = "qcom,cmd-db";
reg = <0x8fee0000 0x20000>;
no-map;
};
+
+ tz_mem: memory@8ff00000 {
+ no-map;
+ reg = <0x8ff00000 0x100000>;
+ };
+
+ tz_apps_mem: memory@90000000 {
+ no-map;
+ reg = <0x90000000 0x500000>;
+ };
+
+ llcc_tcm_mem: memory@15800000 {
+ no-map;
+ reg = <0x15800000 0x800000>;
+ };
};
soc: soc {
--
2.7.4
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 1/7] ARM: dts: qcom: sdx65: Add reserved memory nodes
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add reserved memory nodes to the SDX65 dtsi as defined by
the memory map.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 21 +++++++++++++++++
arch/arm/boot/dts/qcom-sdx65.dtsi | 45 ++++++++++++++++++++++++++++++++++++
2 files changed, 66 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index ad99f56..79dc31a 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -23,6 +23,27 @@
stdout-path = "serial0:115200n8";
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ mpss_dsm: memory@8c400000 {
+ no-map;
+ reg = <0x8c400000 0x3200000>;
+ };
+
+ ipa_fw_mem: memory@8fced000 {
+ no-map;
+ reg = <0x8fced000 0x10000>;
+ };
+
+ mpss_adsp_mem: memory@90800000 {
+ no-map;
+ reg = <0x90800000 0x10000000>;
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 7e2697f..dcc94c2 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -61,11 +61,56 @@
#size-cells = <1>;
ranges;
+ tz_heap_mem: memory@8fcad000 {
+ no-map;
+ reg = <0x8fcad000 0x40000>;
+ };
+
+ secdata_mem: memory@8fcfd000 {
+ no-map;
+ reg = <0x8fcfd000 0x1000>;
+ };
+
+ hyp_mem: memory@8fd00000 {
+ no-map;
+ reg = <0x8fd00000 0x80000>;
+ };
+
+ access_control_mem: memory@8fd80000 {
+ no-map;
+ reg = <0x8fd80000 0x80000>;
+ };
+
+ aop_mem: memory@8fe00000 {
+ no-map;
+ reg = <0x8fe00000 0x20000>;
+ };
+
+ smem_mem: memory@8fe20000 {
+ no-map;
+ reg = <0x8fe20000 0xc0000>;
+ };
+
cmd_db: reserved-memory@8fee0000 {
compatible = "qcom,cmd-db";
reg = <0x8fee0000 0x20000>;
no-map;
};
+
+ tz_mem: memory@8ff00000 {
+ no-map;
+ reg = <0x8ff00000 0x100000>;
+ };
+
+ tz_apps_mem: memory@90000000 {
+ no-map;
+ reg = <0x90000000 0x500000>;
+ };
+
+ llcc_tcm_mem: memory@15800000 {
+ no-map;
+ reg = <0x15800000 0x800000>;
+ };
};
soc: soc {
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 1/7] ARM: dts: qcom: sdx65: Add reserved memory nodes
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add reserved memory nodes to the SDX65 dtsi as defined by
the memory map.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 21 +++++++++++++++++
arch/arm/boot/dts/qcom-sdx65.dtsi | 45 ++++++++++++++++++++++++++++++++++++
2 files changed, 66 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index ad99f56..79dc31a 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -23,6 +23,27 @@
stdout-path = "serial0:115200n8";
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ mpss_dsm: memory@8c400000 {
+ no-map;
+ reg = <0x8c400000 0x3200000>;
+ };
+
+ ipa_fw_mem: memory@8fced000 {
+ no-map;
+ reg = <0x8fced000 0x10000>;
+ };
+
+ mpss_adsp_mem: memory@90800000 {
+ no-map;
+ reg = <0x90800000 0x10000000>;
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 7e2697f..dcc94c2 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -61,11 +61,56 @@
#size-cells = <1>;
ranges;
+ tz_heap_mem: memory@8fcad000 {
+ no-map;
+ reg = <0x8fcad000 0x40000>;
+ };
+
+ secdata_mem: memory@8fcfd000 {
+ no-map;
+ reg = <0x8fcfd000 0x1000>;
+ };
+
+ hyp_mem: memory@8fd00000 {
+ no-map;
+ reg = <0x8fd00000 0x80000>;
+ };
+
+ access_control_mem: memory@8fd80000 {
+ no-map;
+ reg = <0x8fd80000 0x80000>;
+ };
+
+ aop_mem: memory@8fe00000 {
+ no-map;
+ reg = <0x8fe00000 0x20000>;
+ };
+
+ smem_mem: memory@8fe20000 {
+ no-map;
+ reg = <0x8fe20000 0xc0000>;
+ };
+
cmd_db: reserved-memory@8fee0000 {
compatible = "qcom,cmd-db";
reg = <0x8fee0000 0x20000>;
no-map;
};
+
+ tz_mem: memory@8ff00000 {
+ no-map;
+ reg = <0x8ff00000 0x100000>;
+ };
+
+ tz_apps_mem: memory@90000000 {
+ no-map;
+ reg = <0x90000000 0x500000>;
+ };
+
+ llcc_tcm_mem: memory@15800000 {
+ no-map;
+ reg = <0x15800000 0x800000>;
+ };
};
soc: soc {
--
2.7.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-11 9:50 ` Rohit Agarwal
-1 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
Rohit Agarwal, manivannan.sadhasivam, linux-arm-kernel
The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
document the compatible with "qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 6216ed7..e7dec8a 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -25,6 +25,7 @@ Required properties:
"qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
"qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
"qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
+ "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
"qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
NOTE that some old device tree files may be floating around that only
have the string "qcom,sdhci-msm-v4" without the SoC compatible string
--
2.7.4
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
document the compatible with "qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 6216ed7..e7dec8a 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -25,6 +25,7 @@ Required properties:
"qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
"qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
"qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
+ "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
"qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
NOTE that some old device tree files may be floating around that only
have the string "qcom,sdhci-msm-v4" without the SoC compatible string
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
document the compatible with "qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 6216ed7..e7dec8a 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -25,6 +25,7 @@ Required properties:
"qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
"qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
"qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
+ "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
"qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
NOTE that some old device tree files may be floating around that only
have the string "qcom,sdhci-msm-v4" without the SoC compatible string
--
2.7.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* Re: [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-12 11:54 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-12 11:54 UTC (permalink / raw)
To: Rohit Agarwal, will, robin.murphy, joro, robh+dt, krzk+dt,
ulf.hansson, agross, bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
manivannan.sadhasivam, linux-arm-kernel
On 11/04/2022 11:50, Rohit Agarwal wrote:
> The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
> document the compatible with "qcom,sdhci-msm-v5" as the fallback.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
@ 2022-04-12 11:54 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-12 11:54 UTC (permalink / raw)
To: Rohit Agarwal, will, robin.murphy, joro, robh+dt, krzk+dt,
ulf.hansson, agross, bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm
On 11/04/2022 11:50, Rohit Agarwal wrote:
> The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
> document the compatible with "qcom,sdhci-msm-v5" as the fallback.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
@ 2022-04-12 11:54 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-12 11:54 UTC (permalink / raw)
To: Rohit Agarwal, will, robin.murphy, joro, robh+dt, krzk+dt,
ulf.hansson, agross, bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm
On 11/04/2022 11:50, Rohit Agarwal wrote:
> The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
> document the compatible with "qcom,sdhci-msm-v5" as the fallback.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-12 14:25 ` Ulf Hansson
-1 siblings, 0 replies; 39+ messages in thread
From: Ulf Hansson @ 2022-04-12 14:25 UTC (permalink / raw)
To: Rohit Agarwal
Cc: will, robin.murphy, joro, robh+dt, krzk+dt, agross,
bjorn.andersson, manivannan.sadhasivam, linux-arm-kernel, iommu,
devicetree, linux-kernel, linux-mmc, linux-arm-msm,
Shaik Sajida Bhanu, Bhupesh Sharma
+ Shaik, Bhupesh
On Mon, 11 Apr 2022 at 11:50, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>
> The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
> document the compatible with "qcom,sdhci-msm-v5" as the fallback.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
As stated in a couple of other threads for patches extending these
bindings, I would really like to see the binding being converted to
the yaml format first.
It seems like Bhupesh is working on the conversion [1]. If not, please
help him to get this done.
Kind regards
Uffe
[1]
https://www.spinics.net/lists/linux-arm-msm/msg107809.html
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 6216ed7..e7dec8a 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -25,6 +25,7 @@ Required properties:
> "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
> "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
> "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
> + "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
> "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
> NOTE that some old device tree files may be floating around that only
> have the string "qcom,sdhci-msm-v4" without the SoC compatible string
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
@ 2022-04-12 14:25 ` Ulf Hansson
0 siblings, 0 replies; 39+ messages in thread
From: Ulf Hansson @ 2022-04-12 14:25 UTC (permalink / raw)
To: Rohit Agarwal
Cc: will, robin.murphy, joro, robh+dt, krzk+dt, agross,
bjorn.andersson, manivannan.sadhasivam, linux-arm-kernel, iommu,
devicetree, linux-kernel, linux-mmc, linux-arm-msm,
Shaik Sajida Bhanu, Bhupesh Sharma
+ Shaik, Bhupesh
On Mon, 11 Apr 2022 at 11:50, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>
> The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
> document the compatible with "qcom,sdhci-msm-v5" as the fallback.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
As stated in a couple of other threads for patches extending these
bindings, I would really like to see the binding being converted to
the yaml format first.
It seems like Bhupesh is working on the conversion [1]. If not, please
help him to get this done.
Kind regards
Uffe
[1]
https://www.spinics.net/lists/linux-arm-msm/msg107809.html
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 6216ed7..e7dec8a 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -25,6 +25,7 @@ Required properties:
> "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
> "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
> "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
> + "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
> "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
> NOTE that some old device tree files may be floating around that only
> have the string "qcom,sdhci-msm-v4" without the SoC compatible string
> --
> 2.7.4
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 2/7] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
@ 2022-04-12 14:25 ` Ulf Hansson
0 siblings, 0 replies; 39+ messages in thread
From: Ulf Hansson @ 2022-04-12 14:25 UTC (permalink / raw)
To: Rohit Agarwal
Cc: linux-arm-msm, devicetree, Bhupesh Sharma, will, linux-mmc,
linux-kernel, robh+dt, iommu, agross, manivannan.sadhasivam,
krzk+dt, robin.murphy, Shaik Sajida Bhanu, linux-arm-kernel
+ Shaik, Bhupesh
On Mon, 11 Apr 2022 at 11:50, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>
> The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence,
> document the compatible with "qcom,sdhci-msm-v5" as the fallback.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
As stated in a couple of other threads for patches extending these
bindings, I would really like to see the binding being converted to
the yaml format first.
It seems like Bhupesh is working on the conversion [1]. If not, please
help him to get this done.
Kind regards
Uffe
[1]
https://www.spinics.net/lists/linux-arm-msm/msg107809.html
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 6216ed7..e7dec8a 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -25,6 +25,7 @@ Required properties:
> "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
> "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
> "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
> + "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
> "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
> NOTE that some old device tree files may be floating around that only
> have the string "qcom,sdhci-msm-v4" without the SoC compatible string
> --
> 2.7.4
>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 3/7] ARM: dts: qcom: sdx65: Add support for SDHCI controller
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-11 9:50 ` Rohit Agarwal
-1 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
Rohit Agarwal, manivannan.sadhasivam, linux-arm-kernel
Add devicetree support for SDHCI controller found in Qualcomm SDX65
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index dcc94c2..77bca58 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -137,6 +137,19 @@
status = "disabled";
};
+ sdhc_1: sdhci@8804000 {
+ compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0x08804000 0x1000>;
+ reg-names = "hc_mem";
+ interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
spmi_bus: qcom,spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0xc440000 0xd00>,
--
2.7.4
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 3/7] ARM: dts: qcom: sdx65: Add support for SDHCI controller
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add devicetree support for SDHCI controller found in Qualcomm SDX65
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index dcc94c2..77bca58 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -137,6 +137,19 @@
status = "disabled";
};
+ sdhc_1: sdhci@8804000 {
+ compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0x08804000 0x1000>;
+ reg-names = "hc_mem";
+ interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
spmi_bus: qcom,spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0xc440000 0xd00>,
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 3/7] ARM: dts: qcom: sdx65: Add support for SDHCI controller
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add devicetree support for SDHCI controller found in Qualcomm SDX65
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index dcc94c2..77bca58 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -137,6 +137,19 @@
status = "disabled";
};
+ sdhc_1: sdhci@8804000 {
+ compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0x08804000 0x1000>;
+ reg-names = "hc_mem";
+ interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
spmi_bus: qcom,spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0xc440000 0xd00>,
--
2.7.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-11 9:50 ` Rohit Agarwal
-1 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
Rohit Agarwal, manivannan.sadhasivam, linux-arm-kernel
Add devicetree binding for Qualcomm SDX65 SMMU.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index da5381c..1f99bff 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -39,6 +39,7 @@ properties:
- qcom,sc8180x-smmu-500
- qcom,sdm845-smmu-500
- qcom,sdx55-smmu-500
+ - qcom,sdx65-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
--
2.7.4
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add devicetree binding for Qualcomm SDX65 SMMU.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index da5381c..1f99bff 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -39,6 +39,7 @@ properties:
- qcom,sc8180x-smmu-500
- qcom,sdm845-smmu-500
- qcom,sdx55-smmu-500
+ - qcom,sdx65-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add devicetree binding for Qualcomm SDX65 SMMU.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index da5381c..1f99bff 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -39,6 +39,7 @@ properties:
- qcom,sc8180x-smmu-500
- qcom,sdm845-smmu-500
- qcom,sdx55-smmu-500
+ - qcom,sdx65-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
--
2.7.4
^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [PATCH v2 4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-12 11:54 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-12 11:54 UTC (permalink / raw)
To: Rohit Agarwal, will, robin.murphy, joro, robh+dt, krzk+dt,
ulf.hansson, agross, bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
manivannan.sadhasivam, linux-arm-kernel
On 11/04/2022 11:50, Rohit Agarwal wrote:
> Add devicetree binding for Qualcomm SDX65 SMMU.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
@ 2022-04-12 11:54 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-12 11:54 UTC (permalink / raw)
To: Rohit Agarwal, will, robin.murphy, joro, robh+dt, krzk+dt,
ulf.hansson, agross, bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm
On 11/04/2022 11:50, Rohit Agarwal wrote:
> Add devicetree binding for Qualcomm SDX65 SMMU.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
@ 2022-04-12 11:54 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-12 11:54 UTC (permalink / raw)
To: Rohit Agarwal, will, robin.murphy, joro, robh+dt, krzk+dt,
ulf.hansson, agross, bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm
On 11/04/2022 11:50, Rohit Agarwal wrote:
> Add devicetree binding for Qualcomm SDX65 SMMU.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 5/7] ARM: dts: qcom: sdx65: Enable ARM SMMU
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-11 9:50 ` Rohit Agarwal
-1 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
Rohit Agarwal, manivannan.sadhasivam, linux-arm-kernel
Add a node for the ARM SMMU found in the SDX65.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 40 +++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 77bca58..f50a8a4 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -190,6 +190,46 @@
interrupt-controller;
};
+ apps_smmu: iommu@15000000 {
+ compatible = "qcom,sdx65-smmu-500", "arm,mmu-500";
+ reg = <0x15000000 0x40000>;
+ #iommu-cells = <2>;
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
intc: interrupt-controller@17800000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
--
2.7.4
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 5/7] ARM: dts: qcom: sdx65: Enable ARM SMMU
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add a node for the ARM SMMU found in the SDX65.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 40 +++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 77bca58..f50a8a4 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -190,6 +190,46 @@
interrupt-controller;
};
+ apps_smmu: iommu@15000000 {
+ compatible = "qcom,sdx65-smmu-500", "arm,mmu-500";
+ reg = <0x15000000 0x40000>;
+ #iommu-cells = <2>;
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
intc: interrupt-controller@17800000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 5/7] ARM: dts: qcom: sdx65: Enable ARM SMMU
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add a node for the ARM SMMU found in the SDX65.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 40 +++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 77bca58..f50a8a4 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -190,6 +190,46 @@
interrupt-controller;
};
+ apps_smmu: iommu@15000000 {
+ compatible = "qcom,sdx65-smmu-500", "arm,mmu-500";
+ reg = <0x15000000 0x40000>;
+ #iommu-cells = <2>;
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
intc: interrupt-controller@17800000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
--
2.7.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 6/7] ARM: dts: qcom: sdx65: Add support for TCSR Mutex
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-11 9:50 ` Rohit Agarwal
-1 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
Rohit Agarwal, manivannan.sadhasivam, linux-arm-kernel
Add TCSR Mutex node to support Qualcomm Hardware Mutex block
on SDX65 platform.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index f50a8a4..210e55c 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -137,6 +137,12 @@
status = "disabled";
};
+ tcsr_mutex: hwlock@1f40000 {
+ compatible = "qcom,tcsr-mutex";
+ reg = <0x01f40000 0x40000>;
+ #hwlock-cells = <1>;
+ };
+
sdhc_1: sdhci@8804000 {
compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
reg = <0x08804000 0x1000>;
--
2.7.4
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 6/7] ARM: dts: qcom: sdx65: Add support for TCSR Mutex
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add TCSR Mutex node to support Qualcomm Hardware Mutex block
on SDX65 platform.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index f50a8a4..210e55c 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -137,6 +137,12 @@
status = "disabled";
};
+ tcsr_mutex: hwlock@1f40000 {
+ compatible = "qcom,tcsr-mutex";
+ reg = <0x01f40000 0x40000>;
+ #hwlock-cells = <1>;
+ };
+
sdhc_1: sdhci@8804000 {
compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
reg = <0x08804000 0x1000>;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 6/7] ARM: dts: qcom: sdx65: Add support for TCSR Mutex
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add TCSR Mutex node to support Qualcomm Hardware Mutex block
on SDX65 platform.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index f50a8a4..210e55c 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -137,6 +137,12 @@
status = "disabled";
};
+ tcsr_mutex: hwlock@1f40000 {
+ compatible = "qcom,tcsr-mutex";
+ reg = <0x01f40000 0x40000>;
+ #hwlock-cells = <1>;
+ };
+
sdhc_1: sdhci@8804000 {
compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
reg = <0x08804000 0x1000>;
--
2.7.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 7/7] ARM: dts: qcom: sdx65: Add Shared memory manager support
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-11 9:50 ` Rohit Agarwal
-1 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: devicetree, linux-arm-msm, linux-mmc, linux-kernel, iommu,
Rohit Agarwal, manivannan.sadhasivam, linux-arm-kernel
Add smem node to support shared memory manager on SDX65 platform.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 210e55c..8fef644 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -113,6 +113,12 @@
};
};
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem_mem>;
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
--
2.7.4
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 7/7] ARM: dts: qcom: sdx65: Add Shared memory manager support
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add smem node to support shared memory manager on SDX65 platform.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 210e55c..8fef644 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -113,6 +113,12 @@
};
};
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem_mem>;
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH v2 7/7] ARM: dts: qcom: sdx65: Add Shared memory manager support
@ 2022-04-11 9:50 ` Rohit Agarwal
0 siblings, 0 replies; 39+ messages in thread
From: Rohit Agarwal @ 2022-04-11 9:50 UTC (permalink / raw)
To: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
bjorn.andersson
Cc: manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm, Rohit Agarwal
Add smem node to support shared memory manager on SDX65 platform.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 210e55c..8fef644 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -113,6 +113,12 @@
};
};
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem_mem>;
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [PATCH v2 7/7] ARM: dts: qcom: sdx65: Add Shared memory manager support
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-04-13 3:27 ` Bjorn Andersson
-1 siblings, 0 replies; 39+ messages in thread
From: Bjorn Andersson @ 2022-04-13 3:27 UTC (permalink / raw)
To: Rohit Agarwal
Cc: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm
On Mon 11 Apr 04:50 CDT 2022, Rohit Agarwal wrote:
> Add smem node to support shared memory manager on SDX65 platform.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 210e55c..8fef644 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -113,6 +113,12 @@
> };
> };
>
> + smem {
> + compatible = "qcom,smem";
> + memory-region = <&smem_mem>;
> + hwlocks = <&tcsr_mutex 3>;
> + };
As you only have the single region, please move the compatible and
hwlocks properties into the &smem_mem node (see sm8450.dtsi in arm64 as
an example).
I've applied the other dts changes.
Thanks,
Bjorn
> +
> soc: soc {
> #address-cells = <1>;
> #size-cells = <1>;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH v2 7/7] ARM: dts: qcom: sdx65: Add Shared memory manager support
@ 2022-04-13 3:27 ` Bjorn Andersson
0 siblings, 0 replies; 39+ messages in thread
From: Bjorn Andersson @ 2022-04-13 3:27 UTC (permalink / raw)
To: Rohit Agarwal
Cc: will, robin.murphy, joro, robh+dt, krzk+dt, ulf.hansson, agross,
manivannan.sadhasivam, linux-arm-kernel, iommu, devicetree,
linux-kernel, linux-mmc, linux-arm-msm
On Mon 11 Apr 04:50 CDT 2022, Rohit Agarwal wrote:
> Add smem node to support shared memory manager on SDX65 platform.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 210e55c..8fef644 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -113,6 +113,12 @@
> };
> };
>
> + smem {
> + compatible = "qcom,smem";
> + memory-region = <&smem_mem>;
> + hwlocks = <&tcsr_mutex 3>;
> + };
As you only have the single region, please move the compatible and
hwlocks properties into the &smem_mem node (see sm8450.dtsi in arm64 as
an example).
I've applied the other dts changes.
Thanks,
Bjorn
> +
> soc: soc {
> #address-cells = <1>;
> #size-cells = <1>;
> --
> 2.7.4
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH v2 7/7] ARM: dts: qcom: sdx65: Add Shared memory manager support
@ 2022-04-13 3:27 ` Bjorn Andersson
0 siblings, 0 replies; 39+ messages in thread
From: Bjorn Andersson @ 2022-04-13 3:27 UTC (permalink / raw)
To: Rohit Agarwal
Cc: linux-arm-msm, devicetree, ulf.hansson, will, linux-mmc, agross,
linux-kernel, iommu, robh+dt, manivannan.sadhasivam, krzk+dt,
robin.murphy, linux-arm-kernel
On Mon 11 Apr 04:50 CDT 2022, Rohit Agarwal wrote:
> Add smem node to support shared memory manager on SDX65 platform.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 210e55c..8fef644 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -113,6 +113,12 @@
> };
> };
>
> + smem {
> + compatible = "qcom,smem";
> + memory-region = <&smem_mem>;
> + hwlocks = <&tcsr_mutex 3>;
> + };
As you only have the single region, please move the compatible and
hwlocks properties into the &smem_mem node (see sm8450.dtsi in arm64 as
an example).
I've applied the other dts changes.
Thanks,
Bjorn
> +
> soc: soc {
> #address-cells = <1>;
> #size-cells = <1>;
> --
> 2.7.4
>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 0/7] SDX65 devicetree updates
2022-04-11 9:50 ` Rohit Agarwal
(?)
@ 2022-05-06 16:07 ` Will Deacon
-1 siblings, 0 replies; 39+ messages in thread
From: Will Deacon @ 2022-05-06 16:07 UTC (permalink / raw)
To: krzk+dt, robin.murphy, agross, bjorn.andersson, ulf.hansson,
joro, Rohit Agarwal, robh+dt
Cc: catalin.marinas, kernel-team, Will Deacon, linux-arm-msm,
linux-mmc, devicetree, iommu, linux-arm-kernel,
manivannan.sadhasivam, linux-kernel
On Mon, 11 Apr 2022 15:20:08 +0530, Rohit Agarwal wrote:
> This series adds devicetree nodes for SDX65. It adds reserved memory
> nodes, SDHCI, smmu and tcsr mutex support.
>
> Changes from v1:
> - Addressed Mani's Comments and made necessary.
> - Rebased on top of v5.18-rc2.
>
> [...]
Applied SMMU binding patch to will (for-joerg/arm-smmu/updates), thanks!
[4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
https://git.kernel.org/will/c/5a4eb9163471
However, I must confess that I don't understand the point in updating
the binding documentation but not the driver. Should we be matching on
the new compatible string somewhere?
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH v2 0/7] SDX65 devicetree updates
@ 2022-05-06 16:07 ` Will Deacon
0 siblings, 0 replies; 39+ messages in thread
From: Will Deacon @ 2022-05-06 16:07 UTC (permalink / raw)
To: krzk+dt, robin.murphy, agross, bjorn.andersson, ulf.hansson,
joro, Rohit Agarwal, robh+dt
Cc: catalin.marinas, kernel-team, Will Deacon, linux-arm-msm,
linux-mmc, devicetree, iommu, linux-arm-kernel,
manivannan.sadhasivam, linux-kernel
On Mon, 11 Apr 2022 15:20:08 +0530, Rohit Agarwal wrote:
> This series adds devicetree nodes for SDX65. It adds reserved memory
> nodes, SDHCI, smmu and tcsr mutex support.
>
> Changes from v1:
> - Addressed Mani's Comments and made necessary.
> - Rebased on top of v5.18-rc2.
>
> [...]
Applied SMMU binding patch to will (for-joerg/arm-smmu/updates), thanks!
[4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
https://git.kernel.org/will/c/5a4eb9163471
However, I must confess that I don't understand the point in updating
the binding documentation but not the driver. Should we be matching on
the new compatible string somewhere?
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH v2 0/7] SDX65 devicetree updates
@ 2022-05-06 16:07 ` Will Deacon
0 siblings, 0 replies; 39+ messages in thread
From: Will Deacon @ 2022-05-06 16:07 UTC (permalink / raw)
To: krzk+dt, robin.murphy, agross, bjorn.andersson, ulf.hansson,
joro, Rohit Agarwal, robh+dt
Cc: devicetree, Will Deacon, catalin.marinas, manivannan.sadhasivam,
linux-mmc, linux-kernel, iommu, linux-arm-msm, kernel-team,
linux-arm-kernel
On Mon, 11 Apr 2022 15:20:08 +0530, Rohit Agarwal wrote:
> This series adds devicetree nodes for SDX65. It adds reserved memory
> nodes, SDHCI, smmu and tcsr mutex support.
>
> Changes from v1:
> - Addressed Mani's Comments and made necessary.
> - Rebased on top of v5.18-rc2.
>
> [...]
Applied SMMU binding patch to will (for-joerg/arm-smmu/updates), thanks!
[4/7] dt-bindings: arm-smmu: Add binding for SDX65 SMMU
https://git.kernel.org/will/c/5a4eb9163471
However, I must confess that I don't understand the point in updating
the binding documentation but not the driver. Should we be matching on
the new compatible string somewhere?
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 39+ messages in thread