From: Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com> To: <laurent.pinchart@ideasonboard.com>, <dri-devel@lists.freedesktop.org> Cc: <airlied@linux.ie>, <daniel@ffwll.ch>, <linux-kernel@vger.kernel.org>, <vgannava@xilinx.com>, Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com> Subject: [LINUX PATCH 1/2] dt-bindings: display: xlnx: Add DSI 2.0 Tx subsystem documentation Date: Thu, 12 May 2022 19:23:12 +0530 [thread overview] Message-ID: <1652363593-45799-2-git-send-email-venkateshwar.rao.gannavarapu@xilinx.com> (raw) In-Reply-To: <1652363593-45799-1-git-send-email-venkateshwar.rao.gannavarapu@xilinx.com> This patch adds dt binding for Xilinx DSI TX subsystem. The Xilinx MIPI DSI (Display serial interface) Transmitter Subsystem implements the Mobile Industry Processor Interface (MIPI) based display interface. It supports the interface with the programmable logic (FPGA). Signed-off-by: Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com> --- .../bindings/display/xlnx/xlnx,dsi-tx.yaml | 105 +++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml b/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml new file mode 100644 index 0000000..8e23cf5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/xlnx/xlnx,dsi-tx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx DSI Transmitter subsystem + +maintainers: + - Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com> + +description: | + The Xilinx DSI Transmitter Subsystem implements the Mobile Industry + Processor Interface based display interface. It supports the interface + with the programmable logic (FPGA). + + For more details refer to PG238 Xilinx MIPI DSI-V2.0 Tx Subsystem. + +properties: + compatible: + const: xlnx,dsi-tx-v2.0 + + reg: + maxItems: 1 + + clocks: + description: List of clock specifiers + items: + - description: AXI Lite CPU clock + - description: D-phy clock + + clock-names: + items: + - const: s_axis_aclk + - const: dphy_clk_200M + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + description: + Input port node to receive pixel data from the + display controller. Exactly one endpoint must be + specified. + properties: + endpoint: + $ref: /schemas/graph.yaml#/properties/endpoint + description: sub-node describing the input from CRTC + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + DSI output port node to the panel or the next bridge + in the chain + +required: + - compatible + - reg + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + dsi_tx@80020000 { + compatible = "xlnx,dsi-tx-v2.0"; + reg = <0x80020000 0x20000>; + clock-names = "s_axi_aclk", "dphy_clk_200M"; + clocks = <&misc_clk_0>, <&misc_clk_1>; + + panel@0 { + compatible = "auo,b101uan01"; + reg = <0>; + port { + panel_in: endpoint { + remote-endpoint = <&mipi_dsi_out>; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #size-cells = <0>; + #address-cells = <1>; + reg = <0>; + mipi_dsi_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&pl_disp_crtc>; + }; + }; + port@1 { + reg = <1>; + mipi_dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; -- 1.8.3.1
WARNING: multiple messages have this Message-ID (diff)
From: Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com> To: <laurent.pinchart@ideasonboard.com>, <dri-devel@lists.freedesktop.org> Cc: airlied@linux.ie, vgannava@xilinx.com, Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com>, linux-kernel@vger.kernel.org Subject: [LINUX PATCH 1/2] dt-bindings: display: xlnx: Add DSI 2.0 Tx subsystem documentation Date: Thu, 12 May 2022 19:23:12 +0530 [thread overview] Message-ID: <1652363593-45799-2-git-send-email-venkateshwar.rao.gannavarapu@xilinx.com> (raw) In-Reply-To: <1652363593-45799-1-git-send-email-venkateshwar.rao.gannavarapu@xilinx.com> This patch adds dt binding for Xilinx DSI TX subsystem. The Xilinx MIPI DSI (Display serial interface) Transmitter Subsystem implements the Mobile Industry Processor Interface (MIPI) based display interface. It supports the interface with the programmable logic (FPGA). Signed-off-by: Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com> --- .../bindings/display/xlnx/xlnx,dsi-tx.yaml | 105 +++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml b/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml new file mode 100644 index 0000000..8e23cf5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/xlnx/xlnx,dsi-tx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx DSI Transmitter subsystem + +maintainers: + - Venkateshwar Rao Gannavarapu <venkateshwar.rao.gannavarapu@xilinx.com> + +description: | + The Xilinx DSI Transmitter Subsystem implements the Mobile Industry + Processor Interface based display interface. It supports the interface + with the programmable logic (FPGA). + + For more details refer to PG238 Xilinx MIPI DSI-V2.0 Tx Subsystem. + +properties: + compatible: + const: xlnx,dsi-tx-v2.0 + + reg: + maxItems: 1 + + clocks: + description: List of clock specifiers + items: + - description: AXI Lite CPU clock + - description: D-phy clock + + clock-names: + items: + - const: s_axis_aclk + - const: dphy_clk_200M + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + description: + Input port node to receive pixel data from the + display controller. Exactly one endpoint must be + specified. + properties: + endpoint: + $ref: /schemas/graph.yaml#/properties/endpoint + description: sub-node describing the input from CRTC + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + DSI output port node to the panel or the next bridge + in the chain + +required: + - compatible + - reg + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + dsi_tx@80020000 { + compatible = "xlnx,dsi-tx-v2.0"; + reg = <0x80020000 0x20000>; + clock-names = "s_axi_aclk", "dphy_clk_200M"; + clocks = <&misc_clk_0>, <&misc_clk_1>; + + panel@0 { + compatible = "auo,b101uan01"; + reg = <0>; + port { + panel_in: endpoint { + remote-endpoint = <&mipi_dsi_out>; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #size-cells = <0>; + #address-cells = <1>; + reg = <0>; + mipi_dsi_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&pl_disp_crtc>; + }; + }; + port@1 { + reg = <1>; + mipi_dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; -- 1.8.3.1
next prev parent reply other threads:[~2022-05-12 13:53 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-12 13:53 [LINUX PATCH 0/2] Add Xilinx DSI-Tx DRM driver Venkateshwar Rao Gannavarapu 2022-05-12 13:53 ` Venkateshwar Rao Gannavarapu 2022-05-12 13:53 ` Venkateshwar Rao Gannavarapu [this message] 2022-05-12 13:53 ` [LINUX PATCH 1/2] dt-bindings: display: xlnx: Add DSI 2.0 Tx subsystem documentation Venkateshwar Rao Gannavarapu 2022-05-13 13:39 ` Laurent Pinchart 2022-05-13 13:39 ` Laurent Pinchart 2022-05-12 13:53 ` [LINUX PATCH 2/2] drm: xlnx: dsi: driver for Xilinx DSI Tx subsystem Venkateshwar Rao Gannavarapu 2022-05-12 13:53 ` Venkateshwar Rao Gannavarapu 2022-05-13 11:05 ` Sam Ravnborg 2022-05-13 11:05 ` Sam Ravnborg 2022-06-12 21:21 ` Laurent Pinchart 2022-06-12 21:21 ` Laurent Pinchart 2022-06-13 5:53 ` Sam Ravnborg 2022-06-13 5:53 ` Sam Ravnborg 2022-06-12 21:28 ` Laurent Pinchart 2022-06-12 21:28 ` Laurent Pinchart 2022-05-13 13:39 ` Laurent Pinchart 2022-05-13 13:39 ` Laurent Pinchart
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