From: Samuel Holland <samuel@sholland.org>
To: Andre Przywara <andre.przywara@arm.com>,
Jagan Teki <jagan@amarulasolutions.com>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>,
Lukasz Majewski <lukma@denx.de>,
Sean Anderson <seanga2@gmail.com>,
u-boot@lists.denx.de, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 2/2] clk: sunxi: add and use dummy gate clocks
Date: Mon, 9 May 2022 00:00:34 -0500 [thread overview]
Message-ID: <165bd1d2-0cc2-44a6-4190-969bc912a6cc@sholland.org> (raw)
In-Reply-To: <20220506003301.13194-3-andre.przywara@arm.com>
On 5/5/22 7:33 PM, Andre Przywara wrote:
> Some devices enumerate various clocks in their DT, and many drivers
> just blanketly try to enable all of them. This creates problems
> since we only model a few gate clocks, and the clock driver outputs
> a warning when a clock is not described:
> =========
> sunxi_set_gate: (CLK#3) unhandled
> =========
>
> Some clocks don't have an enable bit, or are already enabled in a
> different way, so we might want to just ignore them.
>
> Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define
> a GATE_DUMMY macro that can be used in the clock description array.
> Define a few clocks, used by some pinctrl devices, that way to suppress
> the runtime warnings.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
next prev parent reply other threads:[~2022-05-09 5:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-06 0:32 [PATCH 0/2] sunxi: clk: fix unhandled clocks warnings Andre Przywara
2022-05-06 0:33 ` [PATCH 1/2] clk: sunxi: add PIO bus gate clocks Andre Przywara
2022-05-07 1:47 ` Samuel Holland
2022-05-24 16:12 ` Andre Przywara
2022-05-06 0:33 ` [PATCH 2/2] clk: sunxi: add and use dummy " Andre Przywara
2022-05-09 5:00 ` Samuel Holland [this message]
2022-05-24 16:13 ` Andre Przywara
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