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From: Vinod Polimera <quic_vpolimer@quicinc.com>
To: <dri-devel@lists.freedesktop.org>,
	<linux-arm-msm@vger.kernel.org>,
	<freedreno@lists.freedesktop.org>, <devicetree@vger.kernel.org>
Cc: Vinod Polimera <quic_vpolimer@quicinc.com>,
	<linux-kernel@vger.kernel.org>, <robdclark@gmail.com>,
	<dianders@chromium.org>, <swboyd@chromium.org>,
	<quic_kalyant@quicinc.com>, <dmitry.baryshkov@linaro.org>,
	<quic_khsieh@quicinc.com>, <quic_vproddut@quicinc.com>,
	<quic_bjorande@quicinc.com>, <quic_abhinavk@quicinc.com>,
	<quic_sbillaka@quicinc.com>
Subject: [PATCH v13 07/13] drm/msm/disp/dpu: reset the datapath after timing engine disable
Date: Sun, 12 Feb 2023 21:58:51 +0530	[thread overview]
Message-ID: <1676219337-6526-8-git-send-email-quic_vpolimer@quicinc.com> (raw)
In-Reply-To: <1676219337-6526-1-git-send-email-quic_vpolimer@quicinc.com>

Reset the datapath after disabling the timing gen, such that
it can start on a clean slate when the intf is enabled back.
This was a recommended sequence from the DPU HW programming guide.

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 0396084..3a37429 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -588,6 +588,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc)
 		}
 	}
 
+	dpu_encoder_helper_phys_cleanup(phys_enc);
 	phys_enc->enable_state = DPU_ENC_DISABLED;
 }
 
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Vinod Polimera <quic_vpolimer@quicinc.com>
To: <dri-devel@lists.freedesktop.org>,
	<linux-arm-msm@vger.kernel.org>,
	<freedreno@lists.freedesktop.org>, <devicetree@vger.kernel.org>
Cc: quic_kalyant@quicinc.com, quic_sbillaka@quicinc.com,
	quic_bjorande@quicinc.com, quic_abhinavk@quicinc.com,
	quic_vproddut@quicinc.com, quic_khsieh@quicinc.com,
	dianders@chromium.org, linux-kernel@vger.kernel.org,
	dmitry.baryshkov@linaro.org, swboyd@chromium.org,
	Vinod Polimera <quic_vpolimer@quicinc.com>
Subject: [PATCH v13 07/13] drm/msm/disp/dpu: reset the datapath after timing engine disable
Date: Sun, 12 Feb 2023 21:58:51 +0530	[thread overview]
Message-ID: <1676219337-6526-8-git-send-email-quic_vpolimer@quicinc.com> (raw)
In-Reply-To: <1676219337-6526-1-git-send-email-quic_vpolimer@quicinc.com>

Reset the datapath after disabling the timing gen, such that
it can start on a clean slate when the intf is enabled back.
This was a recommended sequence from the DPU HW programming guide.

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 0396084..3a37429 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -588,6 +588,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc)
 		}
 	}
 
+	dpu_encoder_helper_phys_cleanup(phys_enc);
 	phys_enc->enable_state = DPU_ENC_DISABLED;
 }
 
-- 
2.7.4


  parent reply	other threads:[~2023-02-12 16:30 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-12 16:28 [PATCH v13 00/13] Add PSR support for eDP Vinod Polimera
2023-02-12 16:28 ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 01/13] drm: add helper functions to retrieve old and new crtc Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 02/13] drm/bridge: use atomic enable/disable callbacks for panel bridge Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 03/13] drm/bridge: add psr support for panel bridge callbacks Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 04/13] drm/msm/disp/dpu: check for crtc enable rather than crtc active to release shared resources Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 05/13] drm/msm/disp/dpu: get timing engine status from intf status register Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 06/13] drm/msm/disp/dpu: wait for extra vsync till timing engine status is disabled Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` Vinod Polimera [this message]
2023-02-12 16:28   ` [PATCH v13 07/13] drm/msm/disp/dpu: reset the datapath after timing engine disable Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 08/13] drm/msm/dp: use atomic callbacks for DP bridge ops Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 09/13] drm/msm/dp: Add basic PSR support for eDP Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 10/13] drm/msm/dp: use the eDP bridge ops to validate eDP modes Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 11/13] drm/msm/disp/dpu: use atomic enable/disable callbacks for encoder functions Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 12/13] drm/msm/disp/dpu: add PSR support for eDP interface in dpu driver Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-12 16:28 ` [PATCH v13 13/13] drm/msm/disp/dpu: update dpu_enc crtc state on crtc enable/disable during self refresh Vinod Polimera
2023-02-12 16:28   ` Vinod Polimera
2023-02-17 21:53   ` Dmitry Baryshkov
2023-02-17 21:53     ` Dmitry Baryshkov
2023-03-01 19:06 ` [PATCH v13 00/13] Add PSR support for eDP Doug Anderson
2023-03-01 19:06   ` Doug Anderson
2023-03-01 20:32   ` Doug Anderson
2023-03-01 20:32     ` Doug Anderson
2023-03-02 16:38     ` Vinod Polimera
2023-03-02 16:38       ` Vinod Polimera
2023-03-01 20:34   ` Dmitry Baryshkov
2023-03-01 20:34     ` Dmitry Baryshkov

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