From: Vinod Polimera <quic_vpolimer@quicinc.com> To: <dri-devel@lists.freedesktop.org>, <linux-arm-msm@vger.kernel.org>, <freedreno@lists.freedesktop.org>, <devicetree@vger.kernel.org> Cc: Vinod Polimera <quic_vpolimer@quicinc.com>, <linux-kernel@vger.kernel.org>, <robdclark@gmail.com>, <dianders@chromium.org>, <swboyd@chromium.org>, <quic_kalyant@quicinc.com>, <dmitry.baryshkov@linaro.org>, <quic_khsieh@quicinc.com>, <quic_vproddut@quicinc.com>, <quic_bjorande@quicinc.com>, <quic_abhinavk@quicinc.com>, <quic_sbillaka@quicinc.com> Subject: [PATCH v14 06/14] drm/msm/disp/dpu: wait for extra vsync till timing engine status is disabled Date: Thu, 2 Mar 2023 22:03:09 +0530 [thread overview] Message-ID: <1677774797-31063-7-git-send-email-quic_vpolimer@quicinc.com> (raw) In-Reply-To: <1677774797-31063-1-git-send-email-quic_vpolimer@quicinc.com> There can be a race between timing gen disable and vblank irq. The wait post timing gen disable may return early but intf disable sequence might not be completed. Ensure that, intf status is disabled before we retire the function. Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 48c4810..0396084 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -523,6 +523,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) { unsigned long lock_flags; int ret; + struct intf_status intf_status = {0}; if (!phys_enc->parent || !phys_enc->parent->dev) { DPU_ERROR("invalid encoder/device\n"); @@ -567,6 +568,26 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) } } + if (phys_enc->hw_intf && phys_enc->hw_intf->ops.get_status) + phys_enc->hw_intf->ops.get_status(phys_enc->hw_intf, &intf_status); + + /* + * Wait for a vsync if timing en status is on after timing engine + * is disabled. + */ + if (intf_status.is_en && dpu_encoder_phys_vid_is_master(phys_enc)) { + spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); + dpu_encoder_phys_inc_pending(phys_enc); + spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); + ret = dpu_encoder_phys_vid_wait_for_vblank(phys_enc); + if (ret) { + atomic_set(&phys_enc->pending_kickoff_cnt, 0); + DRM_ERROR("wait disable failed: id:%u intf:%d ret:%d\n", + DRMID(phys_enc->parent), + phys_enc->hw_intf->idx - INTF_0, ret); + } + } + phys_enc->enable_state = DPU_ENC_DISABLED; } -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Polimera <quic_vpolimer@quicinc.com> To: <dri-devel@lists.freedesktop.org>, <linux-arm-msm@vger.kernel.org>, <freedreno@lists.freedesktop.org>, <devicetree@vger.kernel.org> Cc: quic_kalyant@quicinc.com, quic_sbillaka@quicinc.com, quic_bjorande@quicinc.com, quic_abhinavk@quicinc.com, quic_vproddut@quicinc.com, quic_khsieh@quicinc.com, dianders@chromium.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, swboyd@chromium.org, Vinod Polimera <quic_vpolimer@quicinc.com> Subject: [PATCH v14 06/14] drm/msm/disp/dpu: wait for extra vsync till timing engine status is disabled Date: Thu, 2 Mar 2023 22:03:09 +0530 [thread overview] Message-ID: <1677774797-31063-7-git-send-email-quic_vpolimer@quicinc.com> (raw) In-Reply-To: <1677774797-31063-1-git-send-email-quic_vpolimer@quicinc.com> There can be a race between timing gen disable and vblank irq. The wait post timing gen disable may return early but intf disable sequence might not be completed. Ensure that, intf status is disabled before we retire the function. Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 48c4810..0396084 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -523,6 +523,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) { unsigned long lock_flags; int ret; + struct intf_status intf_status = {0}; if (!phys_enc->parent || !phys_enc->parent->dev) { DPU_ERROR("invalid encoder/device\n"); @@ -567,6 +568,26 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) } } + if (phys_enc->hw_intf && phys_enc->hw_intf->ops.get_status) + phys_enc->hw_intf->ops.get_status(phys_enc->hw_intf, &intf_status); + + /* + * Wait for a vsync if timing en status is on after timing engine + * is disabled. + */ + if (intf_status.is_en && dpu_encoder_phys_vid_is_master(phys_enc)) { + spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); + dpu_encoder_phys_inc_pending(phys_enc); + spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); + ret = dpu_encoder_phys_vid_wait_for_vblank(phys_enc); + if (ret) { + atomic_set(&phys_enc->pending_kickoff_cnt, 0); + DRM_ERROR("wait disable failed: id:%u intf:%d ret:%d\n", + DRMID(phys_enc->parent), + phys_enc->hw_intf->idx - INTF_0, ret); + } + } + phys_enc->enable_state = DPU_ENC_DISABLED; } -- 2.7.4
next prev parent reply other threads:[~2023-03-02 16:34 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-02 16:33 [PATCH v14 00/14] Add PSR support for eDP Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 01/14] drm: add helper functions to retrieve old and new crtc Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 02/14] drm/bridge: use atomic enable/disable callbacks for panel bridge Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 03/14] drm/bridge: add psr support for panel bridge callbacks Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 04/14] drm/msm/disp/dpu: check for crtc enable rather than crtc active to release shared resources Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 05/14] drm/msm/disp/dpu: get timing engine status from intf status register Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera [this message] 2023-03-02 16:33 ` [PATCH v14 06/14] drm/msm/disp/dpu: wait for extra vsync till timing engine status is disabled Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 07/14] drm/msm/disp/dpu: reset the datapath after timing engine disable Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 08/14] drm/msm/dp: use atomic callbacks for DP bridge ops Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 09/14] drm/msm/dp: Add basic PSR support for eDP Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 10/14] drm/msm/dp: use the eDP bridge ops to validate eDP modes Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 11/14] drm/msm/disp/dpu: use atomic enable/disable callbacks for encoder functions Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 12/14] drm/msm/disp/dpu: add PSR support for eDP interface in dpu driver Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 13/14] drm/msm/disp/dpu: update dpu_enc crtc state on crtc enable/disable during self refresh Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-14 10:32 ` Vinod Polimera 2023-03-14 10:32 ` Vinod Polimera 2023-03-02 16:33 ` [PATCH v14 14/14] drm/msm/dp: set self refresh aware based on PSR support Vinod Polimera 2023-03-02 16:33 ` Vinod Polimera 2023-03-02 16:40 ` Dmitry Baryshkov 2023-03-02 16:40 ` Dmitry Baryshkov 2023-03-26 16:27 ` Bjorn Andersson 2023-03-26 16:27 ` Bjorn Andersson 2023-03-26 16:35 ` Bjorn Andersson 2023-03-26 16:35 ` Bjorn Andersson 2023-03-27 16:27 ` Stephen Boyd 2023-03-27 16:27 ` Stephen Boyd 2023-03-29 15:16 ` Vinod Polimera 2023-03-29 15:16 ` Vinod Polimera 2023-03-29 15:47 ` Doug Anderson 2023-03-29 15:47 ` Doug Anderson 2023-03-30 14:23 ` Doug Anderson 2023-03-30 14:23 ` Doug Anderson 2023-03-30 14:27 ` Vinod Polimera 2023-03-30 14:27 ` Vinod Polimera 2023-03-26 22:02 ` Dmitry Baryshkov 2023-03-26 22:02 ` Dmitry Baryshkov 2023-03-06 17:35 ` [PATCH v14 00/14] Add PSR support for eDP Doug Anderson 2023-03-06 17:35 ` Doug Anderson 2023-03-07 13:54 ` Dmitry Baryshkov 2023-03-07 13:54 ` Dmitry Baryshkov 2023-03-16 0:44 ` Dmitry Baryshkov 2023-03-16 0:44 ` Dmitry Baryshkov
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