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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Abhinav Kumar <quic_abhinavk@quicinc.com>,
	dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	robdclark@gmail.com, seanpaul@chromium.org, swboyd@chromium.org,
	nganji@codeaurora.org, aravindh@codeaurora.org, daniel@ffwll.ch,
	markyacoub@chromium.org, quic_jesszhan@quicinc.com
Subject: Re: [PATCH 06/12] drm/msm/dpu: make changes to dpu_encoder to support virtual encoder
Date: Sat, 5 Feb 2022 02:36:08 +0300	[thread overview]
Message-ID: <177eca6a-32a8-b121-30ae-d365329df7f2@linaro.org> (raw)
In-Reply-To: <1644009445-17320-7-git-send-email-quic_abhinavk@quicinc.com>

On 05/02/2022 00:17, Abhinav Kumar wrote:
> Make changes to dpu_encoder to support virtual encoder needed
> to support writeback for dpu.

This patch will change significantly if

> 
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 57 +++++++++++++++++++++--------
>   1 file changed, 42 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index e977c05..947069b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -974,6 +974,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
>   	struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
>   	struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC];
>   	struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL };
> +	enum dpu_hw_blk_type blk_type;
>   	int num_lm, num_ctl, num_pp;
>   	int i, j;
>   
> @@ -1061,20 +1062,36 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
>   		phys->hw_pp = dpu_enc->hw_pp[i];
>   		phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]);
>   
> +		if (phys->intf_mode == INTF_MODE_WB_LINE)
> +			blk_type = DPU_HW_BLK_WB;
> +		else
> +			blk_type = DPU_HW_BLK_INTF;
> +
>   		num_blk = dpu_rm_get_assigned_resources(&dpu_kms->rm,
> -			global_state, drm_enc->base.id, DPU_HW_BLK_INTF,
> +			global_state, drm_enc->base.id, blk_type,
>   			hw_blk, ARRAY_SIZE(hw_blk));
> -		for (j = 0; j < num_blk; j++) {
> -			struct dpu_hw_intf *hw_intf;
>   
> -			hw_intf = to_dpu_hw_intf(hw_blk[i]);
> -			if (hw_intf->idx == phys->intf_idx)
> -				phys->hw_intf = hw_intf;
> +		if (blk_type == DPU_HW_BLK_WB) {
> +			for (j = 0; j < num_blk; j++) {
> +				struct dpu_hw_wb *hw_wb;
> +
> +				hw_wb = to_dpu_hw_wb(hw_blk[i]);
> +				if (hw_wb->idx == phys->intf_idx)
> +					phys->hw_wb = hw_wb;
> +			}
> +		} else {
> +			for (j = 0; j < num_blk; j++) {
> +				struct dpu_hw_intf *hw_intf;
> +
> +				hw_intf = to_dpu_hw_intf(hw_blk[i]);
> +				if (hw_intf->idx == phys->intf_idx)
> +					phys->hw_intf = hw_intf;
> +			}
>   		}

I think that if we sequentially call dpu_rm_get_assigned_resources(.., 
DPU_HW_BLK_INTF, ...) and then dpu_rm_get_assigned_resources(.., 
DPU_HW_BLK_WB, ...), the code would be cleaner.

Or even better get the WB direclty using the provided ID.

>   
> -		if (!phys->hw_intf) {
> +		if (!phys->hw_intf && !phys->hw_wb) {
>   			DPU_ERROR_ENC(dpu_enc,
> -				      "no intf block assigned at idx: %d\n", i);
> +				      "no intf or WB block assigned at idx: %d\n", i);
>   			return;
>   		}
>   
> @@ -1224,15 +1241,22 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
>   	mutex_unlock(&dpu_enc->enc_lock);
>   }
>   
> -static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
> +static enum dpu_intf dpu_encoder_get_intf_or_wb(struct dpu_mdss_cfg *catalog,
>   		enum dpu_intf_type type, u32 controller_id)
>   {
>   	int i = 0;
>   
> -	for (i = 0; i < catalog->intf_count; i++) {
> -		if (catalog->intf[i].type == type
> -		    && catalog->intf[i].controller_id == controller_id) {
> -			return catalog->intf[i].id;
> +	if (type != INTF_WB) {
> +		for (i = 0; i < catalog->intf_count; i++) {
> +			if (catalog->intf[i].type == type
> +				&& catalog->intf[i].controller_id == controller_id) {
> +				return catalog->intf[i].id;
> +			}
> +		}
> +	} else {
> +		for (i = 0; i < catalog->wb_count; i++) {
> +			if (catalog->wb[i].id == controller_id)
> +				return catalog->wb[i].id;
>   		}
>   	}
>   
> @@ -2096,6 +2120,9 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
>   	case DRM_MODE_ENCODER_TMDS:
>   		intf_type = INTF_DP;
>   		break;
> +	case DRM_MODE_ENCODER_VIRTUAL:
> +		intf_type = INTF_WB;
> +		break;
>   	}
>   
>   	WARN_ON(disp_info->num_of_h_tiles < 1);
> @@ -2128,11 +2155,11 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
>   		DPU_DEBUG("h_tile_instance %d = %d, split_role %d\n",
>   				i, controller_id, phys_params.split_role);
>   
> -		phys_params.intf_idx = dpu_encoder_get_intf(dpu_kms->catalog,
> +		phys_params.intf_idx = dpu_encoder_get_intf_or_wb(dpu_kms->catalog,
>   													intf_type,
>   													controller_id);
>   		if (phys_params.intf_idx == INTF_MAX) {
> -			DPU_ERROR_ENC(dpu_enc, "could not get intf: type %d, id %d\n",
> +			DPU_ERROR_ENC(dpu_enc, "could not get intf or wb: type %d, id %d\n",
>   						  intf_type, controller_id);
>   			ret = -EINVAL;
>   		}


-- 
With best wishes
Dmitry

WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Abhinav Kumar <quic_abhinavk@quicinc.com>,
	dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, swboyd@chromium.org,
	nganji@codeaurora.org, seanpaul@chromium.org,
	markyacoub@chromium.org, quic_jesszhan@quicinc.com,
	aravindh@codeaurora.org, freedreno@lists.freedesktop.org
Subject: Re: [PATCH 06/12] drm/msm/dpu: make changes to dpu_encoder to support virtual encoder
Date: Sat, 5 Feb 2022 02:36:08 +0300	[thread overview]
Message-ID: <177eca6a-32a8-b121-30ae-d365329df7f2@linaro.org> (raw)
In-Reply-To: <1644009445-17320-7-git-send-email-quic_abhinavk@quicinc.com>

On 05/02/2022 00:17, Abhinav Kumar wrote:
> Make changes to dpu_encoder to support virtual encoder needed
> to support writeback for dpu.

This patch will change significantly if

> 
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 57 +++++++++++++++++++++--------
>   1 file changed, 42 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index e977c05..947069b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -974,6 +974,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
>   	struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
>   	struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC];
>   	struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL };
> +	enum dpu_hw_blk_type blk_type;
>   	int num_lm, num_ctl, num_pp;
>   	int i, j;
>   
> @@ -1061,20 +1062,36 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
>   		phys->hw_pp = dpu_enc->hw_pp[i];
>   		phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]);
>   
> +		if (phys->intf_mode == INTF_MODE_WB_LINE)
> +			blk_type = DPU_HW_BLK_WB;
> +		else
> +			blk_type = DPU_HW_BLK_INTF;
> +
>   		num_blk = dpu_rm_get_assigned_resources(&dpu_kms->rm,
> -			global_state, drm_enc->base.id, DPU_HW_BLK_INTF,
> +			global_state, drm_enc->base.id, blk_type,
>   			hw_blk, ARRAY_SIZE(hw_blk));
> -		for (j = 0; j < num_blk; j++) {
> -			struct dpu_hw_intf *hw_intf;
>   
> -			hw_intf = to_dpu_hw_intf(hw_blk[i]);
> -			if (hw_intf->idx == phys->intf_idx)
> -				phys->hw_intf = hw_intf;
> +		if (blk_type == DPU_HW_BLK_WB) {
> +			for (j = 0; j < num_blk; j++) {
> +				struct dpu_hw_wb *hw_wb;
> +
> +				hw_wb = to_dpu_hw_wb(hw_blk[i]);
> +				if (hw_wb->idx == phys->intf_idx)
> +					phys->hw_wb = hw_wb;
> +			}
> +		} else {
> +			for (j = 0; j < num_blk; j++) {
> +				struct dpu_hw_intf *hw_intf;
> +
> +				hw_intf = to_dpu_hw_intf(hw_blk[i]);
> +				if (hw_intf->idx == phys->intf_idx)
> +					phys->hw_intf = hw_intf;
> +			}
>   		}

I think that if we sequentially call dpu_rm_get_assigned_resources(.., 
DPU_HW_BLK_INTF, ...) and then dpu_rm_get_assigned_resources(.., 
DPU_HW_BLK_WB, ...), the code would be cleaner.

Or even better get the WB direclty using the provided ID.

>   
> -		if (!phys->hw_intf) {
> +		if (!phys->hw_intf && !phys->hw_wb) {
>   			DPU_ERROR_ENC(dpu_enc,
> -				      "no intf block assigned at idx: %d\n", i);
> +				      "no intf or WB block assigned at idx: %d\n", i);
>   			return;
>   		}
>   
> @@ -1224,15 +1241,22 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
>   	mutex_unlock(&dpu_enc->enc_lock);
>   }
>   
> -static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
> +static enum dpu_intf dpu_encoder_get_intf_or_wb(struct dpu_mdss_cfg *catalog,
>   		enum dpu_intf_type type, u32 controller_id)
>   {
>   	int i = 0;
>   
> -	for (i = 0; i < catalog->intf_count; i++) {
> -		if (catalog->intf[i].type == type
> -		    && catalog->intf[i].controller_id == controller_id) {
> -			return catalog->intf[i].id;
> +	if (type != INTF_WB) {
> +		for (i = 0; i < catalog->intf_count; i++) {
> +			if (catalog->intf[i].type == type
> +				&& catalog->intf[i].controller_id == controller_id) {
> +				return catalog->intf[i].id;
> +			}
> +		}
> +	} else {
> +		for (i = 0; i < catalog->wb_count; i++) {
> +			if (catalog->wb[i].id == controller_id)
> +				return catalog->wb[i].id;
>   		}
>   	}
>   
> @@ -2096,6 +2120,9 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
>   	case DRM_MODE_ENCODER_TMDS:
>   		intf_type = INTF_DP;
>   		break;
> +	case DRM_MODE_ENCODER_VIRTUAL:
> +		intf_type = INTF_WB;
> +		break;
>   	}
>   
>   	WARN_ON(disp_info->num_of_h_tiles < 1);
> @@ -2128,11 +2155,11 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
>   		DPU_DEBUG("h_tile_instance %d = %d, split_role %d\n",
>   				i, controller_id, phys_params.split_role);
>   
> -		phys_params.intf_idx = dpu_encoder_get_intf(dpu_kms->catalog,
> +		phys_params.intf_idx = dpu_encoder_get_intf_or_wb(dpu_kms->catalog,
>   													intf_type,
>   													controller_id);
>   		if (phys_params.intf_idx == INTF_MAX) {
> -			DPU_ERROR_ENC(dpu_enc, "could not get intf: type %d, id %d\n",
> +			DPU_ERROR_ENC(dpu_enc, "could not get intf or wb: type %d, id %d\n",
>   						  intf_type, controller_id);
>   			ret = -EINVAL;
>   		}


-- 
With best wishes
Dmitry

  reply	other threads:[~2022-02-04 23:36 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-04 21:17 [PATCH 00/12] Add writeback block support for DPU Abhinav Kumar
2022-02-04 21:17 ` Abhinav Kumar
2022-02-04 21:17 ` [PATCH 01/12] drm/msm/dpu: add writeback blocks to the sm8250 DPU catalog Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 22:48   ` Dmitry Baryshkov
2022-02-04 22:48     ` Dmitry Baryshkov
2022-02-04 21:17 ` [PATCH 02/12] drm/msm/dpu: add dpu_hw_wb abstraction for writeback blocks Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 22:56   ` Dmitry Baryshkov
2022-02-04 22:56     ` Dmitry Baryshkov
2022-04-14 21:28     ` Abhinav Kumar
2022-04-14 21:28       ` Abhinav Kumar
2022-04-14 21:41       ` Dmitry Baryshkov
2022-04-14 21:41         ` Dmitry Baryshkov
2022-02-04 21:17 ` [PATCH 03/12] drm/msm/dpu: add writeback blocks to DPU RM Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 23:43   ` Dmitry Baryshkov
2022-02-04 23:43     ` Dmitry Baryshkov
2022-04-14 21:30     ` Abhinav Kumar
2022-04-14 21:30       ` Abhinav Kumar
2022-02-04 21:17 ` [PATCH 04/12] drm/msm/dpu: add changes to support writeback in hw_ctl Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 22:19   ` Dmitry Baryshkov
2022-02-04 22:19     ` Dmitry Baryshkov
2022-04-14 21:50     ` Abhinav Kumar
2022-04-14 21:50       ` Abhinav Kumar
2022-04-14 23:25       ` Dmitry Baryshkov
2022-04-14 23:25         ` Dmitry Baryshkov
2022-04-15  0:01         ` Abhinav Kumar
2022-04-15  0:01           ` Abhinav Kumar
2022-04-15  0:19           ` Dmitry Baryshkov
2022-04-15  0:27             ` [Freedreno] " Abhinav Kumar
2022-04-15  0:27               ` Abhinav Kumar
2022-04-15  0:30               ` Abhinav Kumar
2022-04-15  0:30                 ` Abhinav Kumar
2022-02-04 23:35   ` kernel test robot
2022-02-04 21:17 ` [PATCH 05/12] drm/msm/dpu: add an API to reset the encoder related hw blocks Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 23:46   ` Dmitry Baryshkov
2022-02-04 23:46     ` Dmitry Baryshkov
2022-04-14 21:53     ` Abhinav Kumar
2022-04-14 21:53       ` Abhinav Kumar
2022-02-04 21:17 ` [PATCH 06/12] drm/msm/dpu: make changes to dpu_encoder to support virtual encoder Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 23:36   ` Dmitry Baryshkov [this message]
2022-02-04 23:36     ` Dmitry Baryshkov
2022-04-14 21:54     ` Abhinav Kumar
2022-04-14 21:54       ` Abhinav Kumar
2022-04-14 22:26   ` Marijn Suijten
2022-04-14 22:26     ` Marijn Suijten
2022-04-14 22:30     ` [Freedreno] " Abhinav Kumar
2022-04-14 22:30       ` Abhinav Kumar
2022-04-15 19:25       ` Abhinav Kumar
2022-04-15 19:25         ` Abhinav Kumar
2022-04-15 23:14         ` Marijn Suijten
2022-04-15 23:14           ` Marijn Suijten
2022-02-04 21:17 ` [PATCH 07/12] drm/msm/dpu: add encoder operations to prepare/cleanup wb job Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 23:42   ` Dmitry Baryshkov
2022-02-04 23:42     ` Dmitry Baryshkov
2022-02-04 21:17 ` [PATCH 08/12] drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 23:19   ` Dmitry Baryshkov
2022-02-04 23:19     ` Dmitry Baryshkov
2022-04-14 22:16     ` [Freedreno] " Abhinav Kumar
2022-04-14 22:16       ` Abhinav Kumar
2022-04-15  0:24       ` Dmitry Baryshkov
2022-04-15  0:24         ` Dmitry Baryshkov
2022-04-19 20:19         ` Abhinav Kumar
2022-04-19 20:19           ` Abhinav Kumar
2022-02-05  0:46   ` kernel test robot
2022-02-04 21:17 ` [PATCH 09/12] drm/msm/dpu: add the writeback connector layer Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 23:24   ` Dmitry Baryshkov
2022-02-04 23:24     ` Dmitry Baryshkov
2022-02-05  2:08   ` kernel test robot
2022-02-04 21:17 ` [PATCH 10/12] drm/msm/dpu: initialize dpu encoder and connector for writeback Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 22:34   ` Dmitry Baryshkov
2022-02-04 22:34     ` Dmitry Baryshkov
2022-04-14 22:21     ` [Freedreno] " Abhinav Kumar
2022-04-14 22:21       ` Abhinav Kumar
2022-02-04 21:17 ` [PATCH 11/12] drm/msm/dpu: gracefully handle null fb commits " Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 22:43   ` Dmitry Baryshkov
2022-02-04 22:43     ` Dmitry Baryshkov
2022-04-14 23:17     ` Abhinav Kumar
2022-04-14 23:17       ` Abhinav Kumar
2022-04-15  0:36       ` Dmitry Baryshkov
2022-04-15  0:36         ` Dmitry Baryshkov
2022-04-15  1:50         ` Abhinav Kumar
2022-04-15  1:50           ` Abhinav Kumar
2022-02-04 21:17 ` [PATCH 12/12] drm/msm/dpu: add writeback blocks to the display snapshot Abhinav Kumar
2022-02-04 21:17   ` Abhinav Kumar
2022-02-04 22:36   ` Dmitry Baryshkov
2022-02-04 22:36     ` Dmitry Baryshkov
2022-03-03 22:46 ` [PATCH 00/12] Add writeback block support for DPU Stephen Boyd
2022-03-03 22:46   ` Stephen Boyd
2022-03-03 23:40   ` Abhinav Kumar
2022-03-03 23:40     ` Abhinav Kumar

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