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From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	iommu@lists.linux-foundation.org,
	Samuel Holland <samuel@sholland.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org,
	Samuel Holland <samuel@sholland.org>,
	Chen-Yu Tsai <wens@csie.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <mripard@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 0/5] iommu/sun50i: Allwinner D1 support
Date: Thu, 28 Apr 2022 07:45:33 +0200	[thread overview]
Message-ID: <1849776.IobQ9Gjlxr@jernej-laptop> (raw)
In-Reply-To: <20220428010401.11323-1-samuel@sholland.org>

Hi Samuel!

Dne četrtek, 28. april 2022 ob 03:03:55 CEST je Samuel Holland napisal(a):
> D1 is a RISC-V SoC from Allwinner's sunxi family. This series adds IOMMU
> binding and driver support.
> 
> One piece is still missing to use the IOMMU for DMA allocations: a call
> to iommu_setup_dma_ops(). On ARM64 this is handled by the architecture's
> code. RISC-V does not currently select ARCH_HAS_SETUP_DMA_OPS, but it
> will once Zicbom support[1] is merged.
> 
> [1]: https://lore.kernel.org/lkml/20220307224620.1933061-2-heiko@sntech.de/
> 
> So I cannot follow virtio-iommu.c and call iommu_setup_dma_ops() when
> ARCH_HAS_SETUP_DMA_OPS=n. However, if I apply the following patch on top
> of Heiko's non-coherent DMA series, the display engine successfully uses
> the IOMMU to allocate its framebuffer:

Did you test this on any other device than display pipeline? It should be 
supported by Cedrus too, right? I think there are still some corner cases to 
fix on Cedrus before IOMMU fully works.

Best regards,
Jernej

> 
> --- a/arch/riscv/mm/dma-noncoherent.c
> +++ b/arch/riscv/mm/dma-noncoherent.c
> @@ -6,6 +6,7 @@
>   */
> 
>  #include <linux/dma-direct.h>
> +#include <linux/dma-iommu.h>
>  #include <linux/dma-map-ops.h>
>  #include <linux/mm.h>
> 
> @@ -53,4 +54,7 @@
>  {
>  	/* If a specific device is dma-coherent, set it here */
>  	dev->dma_coherent = coherent;
> +
> +	if (iommu)
> +		iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
>  }
> 
> 
> Samuel Holland (5):
>   dt-bindings: iommu: sun50i: Add compatible for Allwinner D1
>   iommu/sun50i: Support variants without an external reset
>   iommu/sun50i: Ensure bypass is disabled
>   iommu/sun50i: Add support for the D1 variant
>   iommu/sun50i: Ensure the IOMMU can be used for DMA
> 
>  .../iommu/allwinner,sun50i-h6-iommu.yaml      | 16 +++++++++++--
>  drivers/iommu/Kconfig                         |  1 +
>  drivers/iommu/sun50i-iommu.c                  | 24 +++++++++++++++++--
>  3 files changed, 37 insertions(+), 4 deletions(-)





WARNING: multiple messages have this Message-ID (diff)
From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	iommu@lists.linux-foundation.org,
	Samuel Holland <samuel@sholland.org>
Cc: devicetree@vger.kernel.org, Heiko Stuebner <heiko@sntech.de>,
	Samuel Holland <samuel@sholland.org>,
	linux-kernel@vger.kernel.org, Maxime Ripard <mripard@kernel.org>,
	Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 0/5] iommu/sun50i: Allwinner D1 support
Date: Thu, 28 Apr 2022 07:45:33 +0200	[thread overview]
Message-ID: <1849776.IobQ9Gjlxr@jernej-laptop> (raw)
In-Reply-To: <20220428010401.11323-1-samuel@sholland.org>

Hi Samuel!

Dne četrtek, 28. april 2022 ob 03:03:55 CEST je Samuel Holland napisal(a):
> D1 is a RISC-V SoC from Allwinner's sunxi family. This series adds IOMMU
> binding and driver support.
> 
> One piece is still missing to use the IOMMU for DMA allocations: a call
> to iommu_setup_dma_ops(). On ARM64 this is handled by the architecture's
> code. RISC-V does not currently select ARCH_HAS_SETUP_DMA_OPS, but it
> will once Zicbom support[1] is merged.
> 
> [1]: https://lore.kernel.org/lkml/20220307224620.1933061-2-heiko@sntech.de/
> 
> So I cannot follow virtio-iommu.c and call iommu_setup_dma_ops() when
> ARCH_HAS_SETUP_DMA_OPS=n. However, if I apply the following patch on top
> of Heiko's non-coherent DMA series, the display engine successfully uses
> the IOMMU to allocate its framebuffer:

Did you test this on any other device than display pipeline? It should be 
supported by Cedrus too, right? I think there are still some corner cases to 
fix on Cedrus before IOMMU fully works.

Best regards,
Jernej

> 
> --- a/arch/riscv/mm/dma-noncoherent.c
> +++ b/arch/riscv/mm/dma-noncoherent.c
> @@ -6,6 +6,7 @@
>   */
> 
>  #include <linux/dma-direct.h>
> +#include <linux/dma-iommu.h>
>  #include <linux/dma-map-ops.h>
>  #include <linux/mm.h>
> 
> @@ -53,4 +54,7 @@
>  {
>  	/* If a specific device is dma-coherent, set it here */
>  	dev->dma_coherent = coherent;
> +
> +	if (iommu)
> +		iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
>  }
> 
> 
> Samuel Holland (5):
>   dt-bindings: iommu: sun50i: Add compatible for Allwinner D1
>   iommu/sun50i: Support variants without an external reset
>   iommu/sun50i: Ensure bypass is disabled
>   iommu/sun50i: Add support for the D1 variant
>   iommu/sun50i: Ensure the IOMMU can be used for DMA
> 
>  .../iommu/allwinner,sun50i-h6-iommu.yaml      | 16 +++++++++++--
>  drivers/iommu/Kconfig                         |  1 +
>  drivers/iommu/sun50i-iommu.c                  | 24 +++++++++++++++++--
>  3 files changed, 37 insertions(+), 4 deletions(-)




_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	iommu@lists.linux-foundation.org,
	Samuel Holland <samuel@sholland.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org,
	Samuel Holland <samuel@sholland.org>,
	Chen-Yu Tsai <wens@csie.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <mripard@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 0/5] iommu/sun50i: Allwinner D1 support
Date: Thu, 28 Apr 2022 07:45:33 +0200	[thread overview]
Message-ID: <1849776.IobQ9Gjlxr@jernej-laptop> (raw)
In-Reply-To: <20220428010401.11323-1-samuel@sholland.org>

Hi Samuel!

Dne četrtek, 28. april 2022 ob 03:03:55 CEST je Samuel Holland napisal(a):
> D1 is a RISC-V SoC from Allwinner's sunxi family. This series adds IOMMU
> binding and driver support.
> 
> One piece is still missing to use the IOMMU for DMA allocations: a call
> to iommu_setup_dma_ops(). On ARM64 this is handled by the architecture's
> code. RISC-V does not currently select ARCH_HAS_SETUP_DMA_OPS, but it
> will once Zicbom support[1] is merged.
> 
> [1]: https://lore.kernel.org/lkml/20220307224620.1933061-2-heiko@sntech.de/
> 
> So I cannot follow virtio-iommu.c and call iommu_setup_dma_ops() when
> ARCH_HAS_SETUP_DMA_OPS=n. However, if I apply the following patch on top
> of Heiko's non-coherent DMA series, the display engine successfully uses
> the IOMMU to allocate its framebuffer:

Did you test this on any other device than display pipeline? It should be 
supported by Cedrus too, right? I think there are still some corner cases to 
fix on Cedrus before IOMMU fully works.

Best regards,
Jernej

> 
> --- a/arch/riscv/mm/dma-noncoherent.c
> +++ b/arch/riscv/mm/dma-noncoherent.c
> @@ -6,6 +6,7 @@
>   */
> 
>  #include <linux/dma-direct.h>
> +#include <linux/dma-iommu.h>
>  #include <linux/dma-map-ops.h>
>  #include <linux/mm.h>
> 
> @@ -53,4 +54,7 @@
>  {
>  	/* If a specific device is dma-coherent, set it here */
>  	dev->dma_coherent = coherent;
> +
> +	if (iommu)
> +		iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
>  }
> 
> 
> Samuel Holland (5):
>   dt-bindings: iommu: sun50i: Add compatible for Allwinner D1
>   iommu/sun50i: Support variants without an external reset
>   iommu/sun50i: Ensure bypass is disabled
>   iommu/sun50i: Add support for the D1 variant
>   iommu/sun50i: Ensure the IOMMU can be used for DMA
> 
>  .../iommu/allwinner,sun50i-h6-iommu.yaml      | 16 +++++++++++--
>  drivers/iommu/Kconfig                         |  1 +
>  drivers/iommu/sun50i-iommu.c                  | 24 +++++++++++++++++--
>  3 files changed, 37 insertions(+), 4 deletions(-)





_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	iommu@lists.linux-foundation.org,
	Samuel Holland <samuel@sholland.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org,
	Samuel Holland <samuel@sholland.org>,
	Chen-Yu Tsai <wens@csie.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <mripard@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 0/5] iommu/sun50i: Allwinner D1 support
Date: Thu, 28 Apr 2022 07:45:33 +0200	[thread overview]
Message-ID: <1849776.IobQ9Gjlxr@jernej-laptop> (raw)
In-Reply-To: <20220428010401.11323-1-samuel@sholland.org>

Hi Samuel!

Dne četrtek, 28. april 2022 ob 03:03:55 CEST je Samuel Holland napisal(a):
> D1 is a RISC-V SoC from Allwinner's sunxi family. This series adds IOMMU
> binding and driver support.
> 
> One piece is still missing to use the IOMMU for DMA allocations: a call
> to iommu_setup_dma_ops(). On ARM64 this is handled by the architecture's
> code. RISC-V does not currently select ARCH_HAS_SETUP_DMA_OPS, but it
> will once Zicbom support[1] is merged.
> 
> [1]: https://lore.kernel.org/lkml/20220307224620.1933061-2-heiko@sntech.de/
> 
> So I cannot follow virtio-iommu.c and call iommu_setup_dma_ops() when
> ARCH_HAS_SETUP_DMA_OPS=n. However, if I apply the following patch on top
> of Heiko's non-coherent DMA series, the display engine successfully uses
> the IOMMU to allocate its framebuffer:

Did you test this on any other device than display pipeline? It should be 
supported by Cedrus too, right? I think there are still some corner cases to 
fix on Cedrus before IOMMU fully works.

Best regards,
Jernej

> 
> --- a/arch/riscv/mm/dma-noncoherent.c
> +++ b/arch/riscv/mm/dma-noncoherent.c
> @@ -6,6 +6,7 @@
>   */
> 
>  #include <linux/dma-direct.h>
> +#include <linux/dma-iommu.h>
>  #include <linux/dma-map-ops.h>
>  #include <linux/mm.h>
> 
> @@ -53,4 +54,7 @@
>  {
>  	/* If a specific device is dma-coherent, set it here */
>  	dev->dma_coherent = coherent;
> +
> +	if (iommu)
> +		iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
>  }
> 
> 
> Samuel Holland (5):
>   dt-bindings: iommu: sun50i: Add compatible for Allwinner D1
>   iommu/sun50i: Support variants without an external reset
>   iommu/sun50i: Ensure bypass is disabled
>   iommu/sun50i: Add support for the D1 variant
>   iommu/sun50i: Ensure the IOMMU can be used for DMA
> 
>  .../iommu/allwinner,sun50i-h6-iommu.yaml      | 16 +++++++++++--
>  drivers/iommu/Kconfig                         |  1 +
>  drivers/iommu/sun50i-iommu.c                  | 24 +++++++++++++++++--
>  3 files changed, 37 insertions(+), 4 deletions(-)





_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-04-28  5:45 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-28  1:03 [PATCH 0/5] iommu/sun50i: Allwinner D1 support Samuel Holland
2022-04-28  1:03 ` Samuel Holland
2022-04-28  1:03 ` Samuel Holland
2022-04-28  1:03 ` Samuel Holland
2022-04-28  1:03 ` [PATCH 1/5] dt-bindings: iommu: sun50i: Add compatible for Allwinner D1 Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  7:19   ` Krzysztof Kozlowski
2022-04-28  7:19     ` Krzysztof Kozlowski
2022-04-28  7:19     ` Krzysztof Kozlowski
2022-04-28  7:19     ` Krzysztof Kozlowski
2022-04-28  1:03 ` [PATCH 2/5] iommu/sun50i: Support variants without an external reset Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  5:34   ` Jernej Škrabec
2022-04-28  5:34     ` Jernej Škrabec
2022-04-28  5:34     ` Jernej Škrabec
2022-04-28  5:34     ` Jernej Škrabec
2022-04-28  7:43   ` Philipp Zabel
2022-04-28  7:43     ` Philipp Zabel
2022-04-28  7:43     ` Philipp Zabel
2022-04-28  7:43     ` Philipp Zabel
2022-04-28  1:03 ` [PATCH 3/5] iommu/sun50i: Ensure bypass is disabled Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  5:43   ` Jernej Škrabec
2022-04-28  5:43     ` Jernej Škrabec
2022-04-28  5:43     ` Jernej Škrabec
2022-04-28  5:43     ` Jernej Škrabec
2022-04-28  1:03 ` [PATCH 4/5] iommu/sun50i: Add support for the D1 variant Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  1:03   ` Samuel Holland
2022-04-28  5:34   ` Jernej Škrabec
2022-04-28  5:34     ` Jernej Škrabec
2022-04-28  5:34     ` Jernej Škrabec
2022-04-28  5:34     ` Jernej Škrabec
2022-04-28  1:04 ` [PATCH 5/5] iommu/sun50i: Ensure the IOMMU can be used for DMA Samuel Holland
2022-04-28  1:04   ` Samuel Holland
2022-04-28  1:04   ` Samuel Holland
2022-04-28  1:04   ` Samuel Holland
2022-04-28  5:35   ` Jernej Škrabec
2022-04-28  5:35     ` Jernej Škrabec
2022-04-28  5:35     ` Jernej Škrabec
2022-04-28  5:35     ` Jernej Škrabec
2022-04-28 11:12   ` Robin Murphy
2022-04-28 11:12     ` Robin Murphy
2022-04-28 11:12     ` Robin Murphy
2022-04-28 11:12     ` Robin Murphy
2022-04-28  5:45 ` Jernej Škrabec [this message]
2022-04-28  5:45   ` [PATCH 0/5] iommu/sun50i: Allwinner D1 support Jernej Škrabec
2022-04-28  5:45   ` Jernej Škrabec
2022-04-28  5:45   ` Jernej Škrabec

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