From: Xingyu Wu <xingyu.wu@starfivetech.com> To: Stephen Boyd <sboyd@kernel.org>, Emil Renner Berthing <kernel@esmil.dk>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org> Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>, "Paul Walmsley" <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: Re: [PATCH v1 03/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Date: Tue, 31 Jan 2023 14:51:06 +0800 [thread overview] Message-ID: <1ccec4ad-962b-65d7-b168-69d7e073d358@starfivetech.com> (raw) In-Reply-To: <f6f558a0daafa454c02fe29cd904cfcd.sboyd@kernel.org> On 2023/1/31 8:35, Stephen Boyd wrote: > Quoting Xingyu Wu (2023-01-30 00:02:28) >> On 2023/1/26 10:33, Stephen Boyd wrote: >> > Quoting Xingyu Wu (2023-01-19 18:44:37) >> >> diff --git a/drivers/clk/starfive/clk-starfive-jh7110-stg.c b/drivers/clk/starfive/clk-starfive-jh7110-stg.c >> >> new file mode 100644 >> >> index 000000000000..c2740f44e796 >> >> --- /dev/null >> >> +++ b/drivers/clk/starfive/clk-starfive-jh7110-stg.c > [...] >> >> + parents[i].fw_name = "nocstg_bus"; >> >> + else if (pidx == JH7110_STGCLK_APB_BUS) >> >> + parents[i].fw_name = "apb_bus"; >> > >> > Can this be an array lookup instead of a pile of conditions? >> > >> > if (pidx < JH7110_STGCLK_END) >> > ... >> > else >> > parents[i].fw_name = fw_table[pidx - JH7110_STGCLK_END]; >> > >> > Or even better, don't use strings at all and just make the 'pidx' number >> > (possibly minus the end constant) be the 'clocks' property index that >> > you want. >> >> It seen to be a good way that there uses an array. >> Based on the another way, can I use the 'pidx' number to get the 'clock-names' property >> to be the parent clock name? > > The binding is your design. It is incorrect if the binding is referencing clocks > provided by the same node though. If that's the case, simply use the hw > pointer directly. There are external clocks and some of which belong to the SYS clock part. Our clocks are divided into SYS, AON, STG, ISP and VOUT parts and they are different nodes. So I think I use the clock names maybe better than use the hw pointer. > >> >> > >> >> + } >> >> + >> >> + clk->hw.init = &init; >> >> + clk->idx = idx; >> >> + clk->max_div = max & JH71X0_CLK_DIV_MASK; >> >> + >> >> + ret = devm_clk_hw_register(&pdev->dev, &clk->hw); >> >> + if (ret) >> >> + return ret; >> >> + } >> >> + >> >> + ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_stgclk_get, priv); >> >> + if (ret) >> >> + return ret; >> >> + >> >> + return jh7110_reset_controller_register(priv, "reset-stg", 2); >> > >> > Is this also devm-ified? >> >> No, it need to be freed actively. I will advise Hal Feng this. >> > > Oh, that's not good. Will add this in nest patch. Best regards, Xingyu Wu
WARNING: multiple messages have this Message-ID (diff)
From: Xingyu Wu <xingyu.wu@starfivetech.com> To: Stephen Boyd <sboyd@kernel.org>, Emil Renner Berthing <kernel@esmil.dk>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org> Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>, "Paul Walmsley" <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: Re: [PATCH v1 03/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Date: Tue, 31 Jan 2023 14:51:06 +0800 [thread overview] Message-ID: <1ccec4ad-962b-65d7-b168-69d7e073d358@starfivetech.com> (raw) In-Reply-To: <f6f558a0daafa454c02fe29cd904cfcd.sboyd@kernel.org> On 2023/1/31 8:35, Stephen Boyd wrote: > Quoting Xingyu Wu (2023-01-30 00:02:28) >> On 2023/1/26 10:33, Stephen Boyd wrote: >> > Quoting Xingyu Wu (2023-01-19 18:44:37) >> >> diff --git a/drivers/clk/starfive/clk-starfive-jh7110-stg.c b/drivers/clk/starfive/clk-starfive-jh7110-stg.c >> >> new file mode 100644 >> >> index 000000000000..c2740f44e796 >> >> --- /dev/null >> >> +++ b/drivers/clk/starfive/clk-starfive-jh7110-stg.c > [...] >> >> + parents[i].fw_name = "nocstg_bus"; >> >> + else if (pidx == JH7110_STGCLK_APB_BUS) >> >> + parents[i].fw_name = "apb_bus"; >> > >> > Can this be an array lookup instead of a pile of conditions? >> > >> > if (pidx < JH7110_STGCLK_END) >> > ... >> > else >> > parents[i].fw_name = fw_table[pidx - JH7110_STGCLK_END]; >> > >> > Or even better, don't use strings at all and just make the 'pidx' number >> > (possibly minus the end constant) be the 'clocks' property index that >> > you want. >> >> It seen to be a good way that there uses an array. >> Based on the another way, can I use the 'pidx' number to get the 'clock-names' property >> to be the parent clock name? > > The binding is your design. It is incorrect if the binding is referencing clocks > provided by the same node though. If that's the case, simply use the hw > pointer directly. There are external clocks and some of which belong to the SYS clock part. Our clocks are divided into SYS, AON, STG, ISP and VOUT parts and they are different nodes. So I think I use the clock names maybe better than use the hw pointer. > >> >> > >> >> + } >> >> + >> >> + clk->hw.init = &init; >> >> + clk->idx = idx; >> >> + clk->max_div = max & JH71X0_CLK_DIV_MASK; >> >> + >> >> + ret = devm_clk_hw_register(&pdev->dev, &clk->hw); >> >> + if (ret) >> >> + return ret; >> >> + } >> >> + >> >> + ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_stgclk_get, priv); >> >> + if (ret) >> >> + return ret; >> >> + >> >> + return jh7110_reset_controller_register(priv, "reset-stg", 2); >> > >> > Is this also devm-ified? >> >> No, it need to be freed actively. I will advise Hal Feng this. >> > > Oh, that's not good. Will add this in nest patch. Best regards, Xingyu Wu _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-01-31 6:55 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-20 2:44 [PATCH v1 00/11] Add new partial clock and reset drivers for StarFive JH7110 Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 8:11 ` Krzysztof Kozlowski 2023-01-20 8:11 ` Krzysztof Kozlowski 2023-01-30 6:17 ` Xingyu Wu 2023-01-30 6:17 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 02/11] reset: starfive: jh7110: Add StarFive System-Top-Group reset support Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 03/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-26 2:33 ` Stephen Boyd 2023-01-26 2:33 ` Stephen Boyd 2023-01-30 8:02 ` Xingyu Wu 2023-01-30 8:02 ` Xingyu Wu 2023-01-31 0:35 ` Stephen Boyd 2023-01-31 0:35 ` Stephen Boyd 2023-01-31 6:51 ` Xingyu Wu [this message] 2023-01-31 6:51 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 04/11] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 8:12 ` Krzysztof Kozlowski 2023-01-20 8:12 ` Krzysztof Kozlowski 2023-01-30 8:03 ` Xingyu Wu 2023-01-30 8:03 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 05/11] reset: starfive: jh7110: Add StarFive Image-Signal-Process reset support Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 06/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-26 2:35 ` Stephen Boyd 2023-01-26 2:35 ` Stephen Boyd 2023-01-30 8:09 ` Xingyu Wu 2023-01-30 8:09 ` Xingyu Wu 2023-01-31 0:38 ` Stephen Boyd 2023-01-31 0:38 ` Stephen Boyd 2023-01-31 6:52 ` Xingyu Wu 2023-01-31 6:52 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 07/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 8:13 ` Krzysztof Kozlowski 2023-01-20 8:13 ` Krzysztof Kozlowski 2023-01-30 8:10 ` Xingyu Wu 2023-01-30 8:10 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 08/11] reset: starfive: jh7110: Add StarFive Video-Output reset support Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 09/11] clk: starfive: Add StarFive JH7110 Video-Output clock driver Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 11/11] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu
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