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From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Hal Feng <hal.feng@starfivetech.com>,
	<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v1 06/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
Date: Mon, 30 Jan 2023 16:09:11 +0800	[thread overview]
Message-ID: <20969224-3212-be89-cefc-9c1d7bbf75f6@starfivetech.com> (raw)
In-Reply-To: <eb37200702b27d239b2689daefc85ffa.sboyd@kernel.org>

On 2023/1/26 10:35, Stephen Boyd wrote:
> Quoting Xingyu Wu (2023-01-19 18:44:40)
>> diff --git a/drivers/clk/starfive/clk-starfive-jh7110-isp.c b/drivers/clk/starfive/clk-starfive-jh7110-isp.c
>> new file mode 100644
>> index 000000000000..f9fc94b4c6f8
>> --- /dev/null
>> +++ b/drivers/clk/starfive/clk-starfive-jh7110-isp.c
>> @@ -0,0 +1,218 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * StarFive JH7110 Image-Signal-Process Clock Driver
>> + *
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + */
>> +
>> +#include <linux/clk.h>
> 
> Same include comment. This signals this is a clk consumer, which it
> isn't?

This driver need to use 'clk_bulk_data' struct and some functions like
'devm_clk_bulk_get()' and 'clk_bulk_prepare_enable()' from this include.

Best regards,
Xingyu Wu

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linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Hal Feng <hal.feng@starfivetech.com>,
	<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v1 06/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
Date: Mon, 30 Jan 2023 16:09:11 +0800	[thread overview]
Message-ID: <20969224-3212-be89-cefc-9c1d7bbf75f6@starfivetech.com> (raw)
In-Reply-To: <eb37200702b27d239b2689daefc85ffa.sboyd@kernel.org>

On 2023/1/26 10:35, Stephen Boyd wrote:
> Quoting Xingyu Wu (2023-01-19 18:44:40)
>> diff --git a/drivers/clk/starfive/clk-starfive-jh7110-isp.c b/drivers/clk/starfive/clk-starfive-jh7110-isp.c
>> new file mode 100644
>> index 000000000000..f9fc94b4c6f8
>> --- /dev/null
>> +++ b/drivers/clk/starfive/clk-starfive-jh7110-isp.c
>> @@ -0,0 +1,218 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * StarFive JH7110 Image-Signal-Process Clock Driver
>> + *
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + */
>> +
>> +#include <linux/clk.h>
> 
> Same include comment. This signals this is a clk consumer, which it
> isn't?

This driver need to use 'clk_bulk_data' struct and some functions like
'devm_clk_bulk_get()' and 'clk_bulk_prepare_enable()' from this include.

Best regards,
Xingyu Wu

  reply	other threads:[~2023-01-30  8:13 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-20  2:44 [PATCH v1 00/11] Add new partial clock and reset drivers for StarFive JH7110 Xingyu Wu
2023-01-20  2:44 ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  8:11   ` Krzysztof Kozlowski
2023-01-20  8:11     ` Krzysztof Kozlowski
2023-01-30  6:17     ` Xingyu Wu
2023-01-30  6:17       ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 02/11] reset: starfive: jh7110: Add StarFive System-Top-Group reset support Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 03/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-26  2:33   ` Stephen Boyd
2023-01-26  2:33     ` Stephen Boyd
2023-01-30  8:02     ` Xingyu Wu
2023-01-30  8:02       ` Xingyu Wu
2023-01-31  0:35       ` Stephen Boyd
2023-01-31  0:35         ` Stephen Boyd
2023-01-31  6:51         ` Xingyu Wu
2023-01-31  6:51           ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 04/11] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  8:12   ` Krzysztof Kozlowski
2023-01-20  8:12     ` Krzysztof Kozlowski
2023-01-30  8:03     ` Xingyu Wu
2023-01-30  8:03       ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 05/11] reset: starfive: jh7110: Add StarFive Image-Signal-Process reset support Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 06/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-26  2:35   ` Stephen Boyd
2023-01-26  2:35     ` Stephen Boyd
2023-01-30  8:09     ` Xingyu Wu [this message]
2023-01-30  8:09       ` Xingyu Wu
2023-01-31  0:38   ` Stephen Boyd
2023-01-31  0:38     ` Stephen Boyd
2023-01-31  6:52     ` Xingyu Wu
2023-01-31  6:52       ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 07/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  8:13   ` Krzysztof Kozlowski
2023-01-20  8:13     ` Krzysztof Kozlowski
2023-01-30  8:10     ` Xingyu Wu
2023-01-30  8:10       ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 08/11] reset: starfive: jh7110: Add StarFive Video-Output reset support Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 09/11] clk: starfive: Add StarFive JH7110 Video-Output clock driver Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu
2023-01-20  2:44 ` [PATCH v1 11/11] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Xingyu Wu
2023-01-20  2:44   ` Xingyu Wu

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