* [PATCH 0/4] pinctrl: sh-pfc: Add VIN stf8 pins
@ 2020-09-14 23:37 Niklas Söderlund
2020-09-14 23:37 ` [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions Niklas Söderlund
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Niklas Söderlund @ 2020-09-14 23:37 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund
Hello,
This series upports pinctrl configuration for VIN4 and VIN5 SFT8 pins
from the Renesas BSP. All patches are are based on work from Takeshi
Kihara.
Niklas Söderlund (2):
pinctrl: sh-pfc: r8a77990: Add VIN stf8 pins
pinctrl: sh-pfc: r8a77965: Add VIN stf8 pins
Takeshi Kihara (2):
pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions
pinctrl: sh-pfc: r8a7796: Add VIN pins, groups and functions
drivers/pinctrl/sh-pfc/pfc-r8a77951.c | 28 +++++++++++++++++++++++
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 28 +++++++++++++++++++++++
drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 32 +++++++++++++++++++++++++++
drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 32 +++++++++++++++++++++++++++
4 files changed, 120 insertions(+)
--
2.28.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions
2020-09-14 23:37 [PATCH 0/4] pinctrl: sh-pfc: Add VIN stf8 pins Niklas Söderlund
@ 2020-09-14 23:37 ` Niklas Söderlund
2020-09-15 8:23 ` Sergei Shtylyov
2020-09-23 9:57 ` Geert Uytterhoeven
2020-09-14 23:37 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: " Niklas Söderlund
` (2 subsequent siblings)
3 siblings, 2 replies; 12+ messages in thread
From: Niklas Söderlund @ 2020-09-14 23:37 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Takeshi Kihara, Niklas Söderlund
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds VIN{4,5} pins, groups and functions to the R8A77951 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Niklas: Rework to fit upstream driver]
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
drivers/pinctrl/sh-pfc/pfc-r8a77951.c | 28 +++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c b/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
index a94ebe0bf5d06127..afba52ae92009f17 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
@@ -4074,6 +4074,18 @@ static const union vin_data vin4_data_b_mux = {
VI4_DATA22_MARK, VI4_DATA23_MARK,
},
};
+static const unsigned int vin4_data8_sft8_pins[] = {
+ RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_data8_sft8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
static const unsigned int vin4_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
@@ -4128,6 +4140,18 @@ static const union vin_data16 vin5_data_mux = {
VI5_DATA14_MARK, VI5_DATA15_MARK,
},
};
+static const unsigned int vin5_data8_sft8_pins[] = {
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+ RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin5_data8_sft8_mux[] = {
+ VI5_DATA8_MARK, VI5_DATA9_MARK,
+ VI5_DATA10_MARK, VI5_DATA11_MARK,
+ VI5_DATA12_MARK, VI5_DATA13_MARK,
+ VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
static const unsigned int vin5_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
@@ -4470,6 +4494,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_data8_sft8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4478,6 +4503,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 10),
VIN_DATA_PIN_GROUP(vin5_data, 12),
VIN_DATA_PIN_GROUP(vin5_data, 16),
+ SH_PFC_PIN_GROUP(vin5_data8_sft8),
SH_PFC_PIN_GROUP(vin5_sync),
SH_PFC_PIN_GROUP(vin5_field),
SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -5022,6 +5048,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_data8_sft8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -5033,6 +5060,7 @@ static const char * const vin5_groups[] = {
"vin5_data10",
"vin5_data12",
"vin5_data16",
+ "vin5_data8_sft8",
"vin5_sync",
"vin5_field",
"vin5_clkenb",
--
2.28.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add VIN pins, groups and functions
2020-09-14 23:37 [PATCH 0/4] pinctrl: sh-pfc: Add VIN stf8 pins Niklas Söderlund
2020-09-14 23:37 ` [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions Niklas Söderlund
@ 2020-09-14 23:37 ` Niklas Söderlund
2020-09-15 8:24 ` Sergei Shtylyov
2020-09-14 23:37 ` [PATCH 3/4] pinctrl: sh-pfc: r8a77990: Add VIN stf8 pins Niklas Söderlund
2020-09-14 23:37 ` [PATCH 4/4] pinctrl: sh-pfc: r8a77965: " Niklas Söderlund
3 siblings, 1 reply; 12+ messages in thread
From: Niklas Söderlund @ 2020-09-14 23:37 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Takeshi Kihara, Niklas Söderlund
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds VIN{4,5} pins, groups and functions to the R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Niklas: Rework to fit upstream driver]
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index a2496baca85d23f8..a50beb81a342f636 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -4048,6 +4048,18 @@ static const union vin_data vin4_data_b_mux = {
VI4_DATA22_MARK, VI4_DATA23_MARK,
},
};
+static const unsigned int vin4_data8_sft8_pins[] = {
+ RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_data8_sft8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
static const unsigned int vin4_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
@@ -4102,6 +4114,18 @@ static const union vin_data16 vin5_data_mux = {
VI5_DATA14_MARK, VI5_DATA15_MARK,
},
};
+static const unsigned int vin5_data8_sft8_pins[] = {
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+ RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin5_data8_sft8_mux[] = {
+ VI5_DATA8_MARK, VI5_DATA9_MARK,
+ VI5_DATA10_MARK, VI5_DATA11_MARK,
+ VI5_DATA12_MARK, VI5_DATA13_MARK,
+ VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
static const unsigned int vin5_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
@@ -4440,6 +4464,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_data8_sft8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4448,6 +4473,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 10),
VIN_DATA_PIN_GROUP(vin5_data, 12),
VIN_DATA_PIN_GROUP(vin5_data, 16),
+ SH_PFC_PIN_GROUP(vin5_data8_sft8),
SH_PFC_PIN_GROUP(vin5_sync),
SH_PFC_PIN_GROUP(vin5_field),
SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -4978,6 +5004,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_data8_sft8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -4989,6 +5016,7 @@ static const char * const vin5_groups[] = {
"vin5_data10",
"vin5_data12",
"vin5_data16",
+ "vin5_data8_sft8",
"vin5_sync",
"vin5_field",
"vin5_clkenb",
--
2.28.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/4] pinctrl: sh-pfc: r8a77990: Add VIN stf8 pins
2020-09-14 23:37 [PATCH 0/4] pinctrl: sh-pfc: Add VIN stf8 pins Niklas Söderlund
2020-09-14 23:37 ` [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions Niklas Söderlund
2020-09-14 23:37 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: " Niklas Söderlund
@ 2020-09-14 23:37 ` Niklas Söderlund
2020-09-15 8:17 ` Sergei Shtylyov
2020-09-14 23:37 ` [PATCH 4/4] pinctrl: sh-pfc: r8a77965: " Niklas Söderlund
3 siblings, 1 reply; 12+ messages in thread
From: Niklas Söderlund @ 2020-09-14 23:37 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund
This patch adds VIN{4,5} sft8 pins to the R8A77990 SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 32 +++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
index c926a59dd21ceadc..1304559f04e5de4e 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
@@ -3644,6 +3644,20 @@ static const union vin_data vin4_data_b_mux = {
},
};
+static const unsigned int vin4_data8_sft8_pins[] = {
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+ RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 10),
+ RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 14),
+};
+
+static const unsigned int vin4_data8_sft8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
+
static const unsigned int vin4_sync_pins[] = {
/* HSYNC, VSYNC */
RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 24),
@@ -3718,6 +3732,20 @@ static const unsigned int vin5_data8_b_mux[] = {
VI5_DATA6_B_MARK, VI5_DATA7_B_MARK,
};
+static const unsigned int vin5_data8_sft8_pins[] = {
+ RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+ RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 11),
+ RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 10),
+ RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+};
+
+static const unsigned int vin5_data8_sft8_mux[] = {
+ VI5_DATA8_A_MARK, VI5_DATA9_A_MARK,
+ VI5_DATA10_A_MARK, VI5_DATA11_A_MARK,
+ VI5_DATA12_A_MARK, VI5_DATA13_A_MARK,
+ VI5_DATA14_A_MARK, VI5_DATA15_A_MARK,
+};
+
static const unsigned int vin5_sync_a_pins[] = {
/* HSYNC_N, VSYNC_N */
RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 9),
@@ -3997,6 +4025,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_data8_sft8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4006,6 +4035,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 12, _a),
VIN_DATA_PIN_GROUP(vin5_data, 16, _a),
SH_PFC_PIN_GROUP(vin5_data8_b),
+ SH_PFC_PIN_GROUP(vin5_data8_sft8),
SH_PFC_PIN_GROUP(vin5_sync_a),
SH_PFC_PIN_GROUP(vin5_field_a),
SH_PFC_PIN_GROUP(vin5_clkenb_a),
@@ -4439,6 +4469,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_data8_sft8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -4451,6 +4482,7 @@ static const char * const vin5_groups[] = {
"vin5_data12_a",
"vin5_data16_a",
"vin5_data8_b",
+ "vin5_data8_sft8",
"vin5_sync_a",
"vin5_field_a",
"vin5_clkenb_a",
--
2.28.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/4] pinctrl: sh-pfc: r8a77965: Add VIN stf8 pins
2020-09-14 23:37 [PATCH 0/4] pinctrl: sh-pfc: Add VIN stf8 pins Niklas Söderlund
` (2 preceding siblings ...)
2020-09-14 23:37 ` [PATCH 3/4] pinctrl: sh-pfc: r8a77990: Add VIN stf8 pins Niklas Söderlund
@ 2020-09-14 23:37 ` Niklas Söderlund
2020-09-15 8:18 ` Sergei Shtylyov
3 siblings, 1 reply; 12+ messages in thread
From: Niklas Söderlund @ 2020-09-14 23:37 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund
This patch adds VIN{4,5} sft8 pins to the R8A77965 SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 32 +++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
index 6616f5210b9d96d4..7dc05733b571fa41 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
@@ -4285,6 +4285,20 @@ static const union vin_data vin4_data_b_mux = {
},
};
+static const unsigned int vin4_data8_sft8_pins[] = {
+ RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+
+static const unsigned int vin4_data8_sft8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
+
static const unsigned int vin4_sync_pins[] = {
/* VSYNC_N, HSYNC_N */
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18),
@@ -4345,6 +4359,20 @@ static const union vin_data16 vin5_data_mux = {
},
};
+static const unsigned int vin5_data8_sft8_pins[] = {
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+ RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+
+static const unsigned int vin5_data8_sft8_mux[] = {
+ VI5_DATA8_MARK, VI5_DATA9_MARK,
+ VI5_DATA10_MARK, VI5_DATA11_MARK,
+ VI5_DATA12_MARK, VI5_DATA13_MARK,
+ VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
+
static const unsigned int vin5_sync_pins[] = {
/* VSYNC_N, HSYNC_N */
RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 10),
@@ -4689,6 +4717,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_data8_sft8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4697,6 +4726,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 10),
VIN_DATA_PIN_GROUP(vin5_data, 12),
VIN_DATA_PIN_GROUP(vin5_data, 16),
+ SH_PFC_PIN_GROUP(vin5_data8_sft8),
SH_PFC_PIN_GROUP(vin5_sync),
SH_PFC_PIN_GROUP(vin5_field),
SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -5231,6 +5261,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_data8_sft8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -5242,6 +5273,7 @@ static const char * const vin5_groups[] = {
"vin5_data10",
"vin5_data12",
"vin5_data16",
+ "vin5_data8_sft8",
"vin5_sync",
"vin5_field",
"vin5_clkenb",
--
2.28.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 3/4] pinctrl: sh-pfc: r8a77990: Add VIN stf8 pins
2020-09-14 23:37 ` [PATCH 3/4] pinctrl: sh-pfc: r8a77990: Add VIN stf8 pins Niklas Söderlund
@ 2020-09-15 8:17 ` Sergei Shtylyov
0 siblings, 0 replies; 12+ messages in thread
From: Sergei Shtylyov @ 2020-09-15 8:17 UTC (permalink / raw)
To: Niklas Söderlund, Geert Uytterhoeven; +Cc: linux-renesas-soc
Hello!
On 15.09.2020 2:37, Niklas Söderlund wrote:
> This patch adds VIN{4,5} sft8 pins to the R8A77990 SoC.
So, is it sft8 or stf8? :-)
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 32 +++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
> index c926a59dd21ceadc..1304559f04e5de4e 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
[...]
MBR, Sergei
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] pinctrl: sh-pfc: r8a77965: Add VIN stf8 pins
2020-09-14 23:37 ` [PATCH 4/4] pinctrl: sh-pfc: r8a77965: " Niklas Söderlund
@ 2020-09-15 8:18 ` Sergei Shtylyov
2020-09-15 8:50 ` Geert Uytterhoeven
0 siblings, 1 reply; 12+ messages in thread
From: Sergei Shtylyov @ 2020-09-15 8:18 UTC (permalink / raw)
To: Niklas Söderlund, Geert Uytterhoeven; +Cc: linux-renesas-soc
On 15.09.2020 2:37, Niklas Söderlund wrote:
> This patch adds VIN{4,5} sft8 pins to the R8A77965 SoC.
Same question here. And what is SFT8 anyway? :-)
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
MBR, Sergei
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions
2020-09-14 23:37 ` [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions Niklas Söderlund
@ 2020-09-15 8:23 ` Sergei Shtylyov
2020-09-23 9:57 ` Geert Uytterhoeven
1 sibling, 0 replies; 12+ messages in thread
From: Sergei Shtylyov @ 2020-09-15 8:23 UTC (permalink / raw)
To: Niklas Söderlund, Geert Uytterhoeven
Cc: linux-renesas-soc, Takeshi Kihara
On 15.09.2020 2:37, Niklas Söderlund wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Re: subject -- you seem to be only adding the SFT8 pins/groups/funcs...
> This patch adds VIN{4,5} pins, groups and functions to the R8A77951 SoC.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [Niklas: Rework to fit upstream driver]
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> drivers/pinctrl/sh-pfc/pfc-r8a77951.c | 28 +++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c b/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> index a94ebe0bf5d06127..afba52ae92009f17 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> @@ -4074,6 +4074,18 @@ static const union vin_data vin4_data_b_mux = {
> VI4_DATA22_MARK, VI4_DATA23_MARK,
> },
> };
> +static const unsigned int vin4_data8_sft8_pins[] = {
> + RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
> + RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin4_data8_sft8_mux[] = {
> + VI4_DATA8_MARK, VI4_DATA9_MARK,
> + VI4_DATA10_MARK, VI4_DATA11_MARK,
> + VI4_DATA12_MARK, VI4_DATA13_MARK,
> + VI4_DATA14_MARK, VI4_DATA15_MARK,
> +};
> static const unsigned int vin4_sync_pins[] = {
> /* HSYNC#, VSYNC# */
> RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
> @@ -4128,6 +4140,18 @@ static const union vin_data16 vin5_data_mux = {
> VI5_DATA14_MARK, VI5_DATA15_MARK,
> },
> };
> +static const unsigned int vin5_data8_sft8_pins[] = {
> + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
> + RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin5_data8_sft8_mux[] = {
> + VI5_DATA8_MARK, VI5_DATA9_MARK,
> + VI5_DATA10_MARK, VI5_DATA11_MARK,
> + VI5_DATA12_MARK, VI5_DATA13_MARK,
> + VI5_DATA14_MARK, VI5_DATA15_MARK,
> +};
> static const unsigned int vin5_sync_pins[] = {
> /* HSYNC#, VSYNC# */
> RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
> @@ -4470,6 +4494,7 @@ static const struct {
> SH_PFC_PIN_GROUP(vin4_data18_b),
> VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
> VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
> + SH_PFC_PIN_GROUP(vin4_data8_sft8),
> SH_PFC_PIN_GROUP(vin4_sync),
> SH_PFC_PIN_GROUP(vin4_field),
> SH_PFC_PIN_GROUP(vin4_clkenb),
> @@ -4478,6 +4503,7 @@ static const struct {
> VIN_DATA_PIN_GROUP(vin5_data, 10),
> VIN_DATA_PIN_GROUP(vin5_data, 12),
> VIN_DATA_PIN_GROUP(vin5_data, 16),
> + SH_PFC_PIN_GROUP(vin5_data8_sft8),
> SH_PFC_PIN_GROUP(vin5_sync),
> SH_PFC_PIN_GROUP(vin5_field),
> SH_PFC_PIN_GROUP(vin5_clkenb),
> @@ -5022,6 +5048,7 @@ static const char * const vin4_groups[] = {
> "vin4_data18_b",
> "vin4_data20_b",
> "vin4_data24_b",
> + "vin4_data8_sft8",
> "vin4_sync",
> "vin4_field",
> "vin4_clkenb",
> @@ -5033,6 +5060,7 @@ static const char * const vin5_groups[] = {
> "vin5_data10",
> "vin5_data12",
> "vin5_data16",
> + "vin5_data8_sft8",
> "vin5_sync",
> "vin5_field",
> "vin5_clkenb",
MBR, Sergei
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add VIN pins, groups and functions
2020-09-14 23:37 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: " Niklas Söderlund
@ 2020-09-15 8:24 ` Sergei Shtylyov
0 siblings, 0 replies; 12+ messages in thread
From: Sergei Shtylyov @ 2020-09-15 8:24 UTC (permalink / raw)
To: Niklas Söderlund, Geert Uytterhoeven
Cc: linux-renesas-soc, Takeshi Kihara
On 15.09.2020 2:37, Niklas Söderlund wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> This patch adds VIN{4,5} pins, groups and functions to the R8A7796 SoC.
Same question on the subject/changelog here...
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [Niklas: Rework to fit upstream driver]
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> index a2496baca85d23f8..a50beb81a342f636 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> @@ -4048,6 +4048,18 @@ static const union vin_data vin4_data_b_mux = {
> VI4_DATA22_MARK, VI4_DATA23_MARK,
> },
> };
> +static const unsigned int vin4_data8_sft8_pins[] = {
> + RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
> + RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin4_data8_sft8_mux[] = {
> + VI4_DATA8_MARK, VI4_DATA9_MARK,
> + VI4_DATA10_MARK, VI4_DATA11_MARK,
> + VI4_DATA12_MARK, VI4_DATA13_MARK,
> + VI4_DATA14_MARK, VI4_DATA15_MARK,
> +};
> static const unsigned int vin4_sync_pins[] = {
> /* HSYNC#, VSYNC# */
> RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
> @@ -4102,6 +4114,18 @@ static const union vin_data16 vin5_data_mux = {
> VI5_DATA14_MARK, VI5_DATA15_MARK,
> },
> };
> +static const unsigned int vin5_data8_sft8_pins[] = {
> + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
> + RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin5_data8_sft8_mux[] = {
> + VI5_DATA8_MARK, VI5_DATA9_MARK,
> + VI5_DATA10_MARK, VI5_DATA11_MARK,
> + VI5_DATA12_MARK, VI5_DATA13_MARK,
> + VI5_DATA14_MARK, VI5_DATA15_MARK,
> +};
> static const unsigned int vin5_sync_pins[] = {
> /* HSYNC#, VSYNC# */
> RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
> @@ -4440,6 +4464,7 @@ static const struct {
> SH_PFC_PIN_GROUP(vin4_data18_b),
> VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
> VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
> + SH_PFC_PIN_GROUP(vin4_data8_sft8),
> SH_PFC_PIN_GROUP(vin4_sync),
> SH_PFC_PIN_GROUP(vin4_field),
> SH_PFC_PIN_GROUP(vin4_clkenb),
> @@ -4448,6 +4473,7 @@ static const struct {
> VIN_DATA_PIN_GROUP(vin5_data, 10),
> VIN_DATA_PIN_GROUP(vin5_data, 12),
> VIN_DATA_PIN_GROUP(vin5_data, 16),
> + SH_PFC_PIN_GROUP(vin5_data8_sft8),
> SH_PFC_PIN_GROUP(vin5_sync),
> SH_PFC_PIN_GROUP(vin5_field),
> SH_PFC_PIN_GROUP(vin5_clkenb),
> @@ -4978,6 +5004,7 @@ static const char * const vin4_groups[] = {
> "vin4_data18_b",
> "vin4_data20_b",
> "vin4_data24_b",
> + "vin4_data8_sft8",
> "vin4_sync",
> "vin4_field",
> "vin4_clkenb",
> @@ -4989,6 +5016,7 @@ static const char * const vin5_groups[] = {
> "vin5_data10",
> "vin5_data12",
> "vin5_data16",
> + "vin5_data8_sft8",
> "vin5_sync",
> "vin5_field",
> "vin5_clkenb",
MBR, Sergei
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] pinctrl: sh-pfc: r8a77965: Add VIN stf8 pins
2020-09-15 8:18 ` Sergei Shtylyov
@ 2020-09-15 8:50 ` Geert Uytterhoeven
2020-09-15 9:12 ` Sergei Shtylyov
0 siblings, 1 reply; 12+ messages in thread
From: Geert Uytterhoeven @ 2020-09-15 8:50 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: Niklas Söderlund, Linux-Renesas
Hi Sergei,
On Tue, Sep 15, 2020 at 10:18 AM Sergei Shtylyov
<sergei.shtylyov@gmail.com> wrote:
> On 15.09.2020 2:37, Niklas Söderlund wrote:
> > This patch adds VIN{4,5} sft8 pins to the R8A77965 SoC.
>
> Same question here. And what is SFT8 anyway? :-)
https://lore.kernel.org/linux-renesas-soc/CAMuHMdXdDkPX447AibYNjUwGHkYxC3sE-18G2DNVQR2T-jxX2w@mail.gmail.com
Would you prefer "vin[45]_g8"?
Or perhaps even "vin[45]_green8"?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] pinctrl: sh-pfc: r8a77965: Add VIN stf8 pins
2020-09-15 8:50 ` Geert Uytterhoeven
@ 2020-09-15 9:12 ` Sergei Shtylyov
0 siblings, 0 replies; 12+ messages in thread
From: Sergei Shtylyov @ 2020-09-15 9:12 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Niklas Söderlund, Linux-Renesas
Hello!
On 15.09.2020 11:50, Geert Uytterhoeven wrote:
[...]
>> On 15.09.2020 2:37, Niklas Söderlund wrote:
>>> This patch adds VIN{4,5} sft8 pins to the R8A77965 SoC.
>>
>> Same question here. And what is SFT8 anyway? :-)
>
> https://lore.kernel.org/linux-renesas-soc/CAMuHMdXdDkPX447AibYNjUwGHkYxC3sE-18G2DNVQR2T-jxX2w@mail.gmail.com
So SFT is short for "shifted"? :-O
I'd also like to know the use case...
> Would you prefer "vin[45]_g8"?
Hm, probably...
> Or perhaps even "vin[45]_green8"?
>
> Gr{oetje,eeting}s,
>
> Geert
MBR, Sergei
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions
2020-09-14 23:37 ` [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions Niklas Söderlund
2020-09-15 8:23 ` Sergei Shtylyov
@ 2020-09-23 9:57 ` Geert Uytterhoeven
1 sibling, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2020-09-23 9:57 UTC (permalink / raw)
To: Niklas Söderlund; +Cc: Linux-Renesas, Takeshi Kihara, Laurent Pinchart
Hi Niklas,
CC Laurent.
On Tue, Sep 15, 2020 at 1:38 AM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> This patch adds VIN{4,5} pins, groups and functions to the R8A77951 SoC.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [Niklas: Rework to fit upstream driver]
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Thanks for your patch!
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77951.c
> @@ -4074,6 +4074,18 @@ static const union vin_data vin4_data_b_mux = {
> VI4_DATA22_MARK, VI4_DATA23_MARK,
> },
> };
> +static const unsigned int vin4_data8_sft8_pins[] = {
> + RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
> + RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin4_data8_sft8_mux[] = {
> + VI4_DATA8_MARK, VI4_DATA9_MARK,
> + VI4_DATA10_MARK, VI4_DATA11_MARK,
> + VI4_DATA12_MARK, VI4_DATA13_MARK,
> + VI4_DATA14_MARK, VI4_DATA15_MARK,
> +};
I'm not so fond of the "sft8" suffix.
What about using "vin4_g8" instead of "vin4_data8_sft8", cfr. "[PATCH v3]
pinctrl: renesas: r8a7790: Add VIN1-B and VIN2-G pins, groups and
functions"?
https://lore.kernel.org/linux-renesas-soc/20200917195924.20384-1-prabhakar.mahadev-lad.rj@bp.renesas.com
> static const unsigned int vin4_sync_pins[] = {
> /* HSYNC#, VSYNC# */
> RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
> @@ -4128,6 +4140,18 @@ static const union vin_data16 vin5_data_mux = {
> VI5_DATA14_MARK, VI5_DATA15_MARK,
> },
> };
> +static const unsigned int vin5_data8_sft8_pins[] = {
> + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
> + RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin5_data8_sft8_mux[] = {
> + VI5_DATA8_MARK, VI5_DATA9_MARK,
> + VI5_DATA10_MARK, VI5_DATA11_MARK,
> + VI5_DATA12_MARK, VI5_DATA13_MARK,
> + VI5_DATA14_MARK, VI5_DATA15_MARK,
> +};
I'm not so fond of the "sft8" suffix.
However, as this is a 16-bit instead of a 24-bit interface, "vin5_g8"
doesn't sound appropriate to me.
Anyone with a good suggestion?
> static const unsigned int vin5_sync_pins[] = {
> /* HSYNC#, VSYNC# */
> RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
> @@ -4470,6 +4494,7 @@ static const struct {
> SH_PFC_PIN_GROUP(vin4_data18_b),
> VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
> VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
> + SH_PFC_PIN_GROUP(vin4_data8_sft8),
warning: excess elements in array initializer
You have to increase the size of the .common[] array, to match the
actual number of entries.
Booting a kernel with CONFIG_DEBUG_PINCTRL=y also helps.
The same comments apply to patches 2-4.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-09-23 9:57 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-14 23:37 [PATCH 0/4] pinctrl: sh-pfc: Add VIN stf8 pins Niklas Söderlund
2020-09-14 23:37 ` [PATCH 1/4] pinctrl: sh-pfc: r8a77951: Add VIN pins, groups and functions Niklas Söderlund
2020-09-15 8:23 ` Sergei Shtylyov
2020-09-23 9:57 ` Geert Uytterhoeven
2020-09-14 23:37 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: " Niklas Söderlund
2020-09-15 8:24 ` Sergei Shtylyov
2020-09-14 23:37 ` [PATCH 3/4] pinctrl: sh-pfc: r8a77990: Add VIN stf8 pins Niklas Söderlund
2020-09-15 8:17 ` Sergei Shtylyov
2020-09-14 23:37 ` [PATCH 4/4] pinctrl: sh-pfc: r8a77965: " Niklas Söderlund
2020-09-15 8:18 ` Sergei Shtylyov
2020-09-15 8:50 ` Geert Uytterhoeven
2020-09-15 9:12 ` Sergei Shtylyov
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