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From: Jerome Brunet <jbrunet@baylibre.com>
To: Remi Pommarel <repk@triplefau.lt>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Yue Wang <yue.wang@Amlogic.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <andrew.murray@arm.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-amlogic@lists.infradead.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/5] PCI: amlogic: Make PCIe working reliably on AXG platforms
Date: Thu, 26 Dec 2019 10:57:39 +0100	[thread overview]
Message-ID: <1jblrvpfxo.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <20191224173942.18160-1-repk@triplefau.lt>


On Tue 24 Dec 2019 at 18:39, Remi Pommarel <repk@triplefau.lt> wrote:

> PCIe device probing failures have been seen on AXG platforms and were due
> to unreliable clock signal output. Setting HHI_MIPI_CNTL0[26] bit in
> MIPI's PHY registers solved the problem. This bit appears to control band
> gap reference.
>
> As discussed here [1] one of these shared MIPI/PCIE PHY register bits was
> mistakenly implemented in the clock driver as CLKID_MIPI_ENABLE. This adds
> a PHY driver to control this bit through syscon subsystem instead, as well
> as setting the band gap one in order to get reliable PCIE communication.
>
> While at it adding this PHY make AXG code close to G12A one thus allowing
> to remove some specific platform handling in pci-meson driver.
>
> Please note that CLKID_MIPI_ENABLE removable will be done in a different
> serie.
>
> Changes since v2:
>  - Remove shared MIPI/PCIE device driver and use syscon to access register
>    in PCIE only driver instead
>  - Include devicetree documentation
>
> Changes sinve v1:
>  - Move HHI_MIPI_CNTL0 bit control in its own PHY driver
>  - Add a PHY driver for PCIE_PHY registers
>  - Modify pci-meson.c to make use of both PHYs and remove specific
>    handling for AXG and G12A
>
> [1] https://lkml.org/lkml/2019/12/16/119
>
> Remi Pommarel (5):
>   phy: amlogic: Add Amlogic AXG PCIE PHY Driver
>   PCI: amlogic: Use AXG PCIE PHY
>   arm64: dts: meson-axg: Add PCIE PHY node
>   dt-bindings: PCI: meson: Update PCIE bindings documentation
>   dt-bindings: Add AXG PCIE PHY bindings

Hi Remi,

Usually, you should put the dt documentation first in the series.
This way the properties are documented before being used

>
>  .../bindings/pci/amlogic,meson-pcie.txt       |  22 +--
>  .../bindings/phy/amlogic,meson-axg-pcie.yaml  |  51 +++++
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   9 +
>  drivers/pci/controller/dwc/pci-meson.c        | 116 ++---------
>  drivers/phy/amlogic/Kconfig                   |  11 ++
>  drivers/phy/amlogic/Makefile                  |   1 +
>  drivers/phy/amlogic/phy-meson-axg-pcie.c      | 185 ++++++++++++++++++
>  7 files changed, 287 insertions(+), 108 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml
>  create mode 100644 drivers/phy/amlogic/phy-meson-axg-pcie.c


WARNING: multiple messages have this Message-ID (diff)
From: Jerome Brunet <jbrunet@baylibre.com>
To: Remi Pommarel <repk@triplefau.lt>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Yue Wang <yue.wang@Amlogic.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <andrew.murray@arm.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 0/5] PCI: amlogic: Make PCIe working reliably on AXG platforms
Date: Thu, 26 Dec 2019 10:57:39 +0100	[thread overview]
Message-ID: <1jblrvpfxo.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <20191224173942.18160-1-repk@triplefau.lt>


On Tue 24 Dec 2019 at 18:39, Remi Pommarel <repk@triplefau.lt> wrote:

> PCIe device probing failures have been seen on AXG platforms and were due
> to unreliable clock signal output. Setting HHI_MIPI_CNTL0[26] bit in
> MIPI's PHY registers solved the problem. This bit appears to control band
> gap reference.
>
> As discussed here [1] one of these shared MIPI/PCIE PHY register bits was
> mistakenly implemented in the clock driver as CLKID_MIPI_ENABLE. This adds
> a PHY driver to control this bit through syscon subsystem instead, as well
> as setting the band gap one in order to get reliable PCIE communication.
>
> While at it adding this PHY make AXG code close to G12A one thus allowing
> to remove some specific platform handling in pci-meson driver.
>
> Please note that CLKID_MIPI_ENABLE removable will be done in a different
> serie.
>
> Changes since v2:
>  - Remove shared MIPI/PCIE device driver and use syscon to access register
>    in PCIE only driver instead
>  - Include devicetree documentation
>
> Changes sinve v1:
>  - Move HHI_MIPI_CNTL0 bit control in its own PHY driver
>  - Add a PHY driver for PCIE_PHY registers
>  - Modify pci-meson.c to make use of both PHYs and remove specific
>    handling for AXG and G12A
>
> [1] https://lkml.org/lkml/2019/12/16/119
>
> Remi Pommarel (5):
>   phy: amlogic: Add Amlogic AXG PCIE PHY Driver
>   PCI: amlogic: Use AXG PCIE PHY
>   arm64: dts: meson-axg: Add PCIE PHY node
>   dt-bindings: PCI: meson: Update PCIE bindings documentation
>   dt-bindings: Add AXG PCIE PHY bindings

Hi Remi,

Usually, you should put the dt documentation first in the series.
This way the properties are documented before being used

>
>  .../bindings/pci/amlogic,meson-pcie.txt       |  22 +--
>  .../bindings/phy/amlogic,meson-axg-pcie.yaml  |  51 +++++
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   9 +
>  drivers/pci/controller/dwc/pci-meson.c        | 116 ++---------
>  drivers/phy/amlogic/Kconfig                   |  11 ++
>  drivers/phy/amlogic/Makefile                  |   1 +
>  drivers/phy/amlogic/phy-meson-axg-pcie.c      | 185 ++++++++++++++++++
>  7 files changed, 287 insertions(+), 108 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml
>  create mode 100644 drivers/phy/amlogic/phy-meson-axg-pcie.c


_______________________________________________
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linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  parent reply	other threads:[~2019-12-26  9:57 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-24 17:39 [PATCH v3 0/5] PCI: amlogic: Make PCIe working reliably on AXG platforms Remi Pommarel
2019-12-24 17:39 ` Remi Pommarel
2019-12-24 17:39 ` [PATCH v3 1/5] phy: amlogic: Add Amlogic AXG PCIE PHY Driver Remi Pommarel
2019-12-24 17:39   ` Remi Pommarel
2019-12-24 17:39 ` [PATCH v3 2/5] PCI: amlogic: Use AXG PCIE PHY Remi Pommarel
2019-12-24 17:39   ` Remi Pommarel
2019-12-24 17:39 ` [PATCH v3 3/5] arm64: dts: meson-axg: Add PCIE PHY node Remi Pommarel
2019-12-24 17:39   ` Remi Pommarel
2019-12-24 17:39 ` [PATCH v3 4/5] dt-bindings: PCI: meson: Update PCIE bindings documentation Remi Pommarel
2019-12-24 17:39   ` Remi Pommarel
2020-01-04  0:21   ` Rob Herring
2020-01-04  0:21     ` Rob Herring
2019-12-24 17:39 ` [PATCH v3 5/5] dt-bindings: Add AXG PCIE PHY bindings Remi Pommarel
2019-12-24 17:39   ` Remi Pommarel
2019-12-25 19:02   ` Remi Pommarel
2019-12-25 19:02     ` Remi Pommarel
2019-12-26 20:10   ` Martin Blumenstingl
2019-12-26 20:10     ` Martin Blumenstingl
2020-01-04  0:24   ` Rob Herring
2020-01-04  0:24     ` Rob Herring
2019-12-26  9:57 ` Jerome Brunet [this message]
2019-12-26  9:57   ` [PATCH v3 0/5] PCI: amlogic: Make PCIe working reliably on AXG platforms Jerome Brunet

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