[PATCH 0/7] usb: ehci: omap: Adding OMAP4 support

[PATCH 0/7] usb: ehci: omap: Adding OMAP4 support

[Keshava Munegowda]

The OMAP4 EHCI supports only two ports and hence two TLL channels.
Each port is driven by seperate clocks. Following interface mode 
exists in EHCI controller of OMAP4.
- External PHY mode , with 12 pin ULPI
- USBTLL mode
- HSIC mode 
The External PHY mode is validated with these patches and other modes are TODOs
for later. 
The TLL clocks are enabled and channels are configuared only when
USBTLL mode is choosen.
 
The summary is of patches - 

	1/7  	Add the base address of EHCI controller
	2/7     based on omap3 and omap4 ; the processor specific clocks
		enabled. formats the code of ehci-omap.c so that OMAP4 specific 
		changes can be easily inserted.  
	3/7 	Adding OMAP4 support.
	4/7	Introduces the Kconfig macro to include the ehci driver
		as platform driver 
	5/7 	This is hack to do the mux setting for EHCI pad configuration;
		This patch will be replaced when the mux framework for omap4
		is introduced.
	6/7	Adds the EHCI IRQ number and base address resources in 
		ehci initialization.
	7/7	The EHCI init fuction invocation from 4430 sdp init.

diffstat is below:
 drivers/usb/host/Kconfig                       |    8 
 drivers/usb/host/ehci-hcd.c                    |    2 
 drivers/usb/host/ehci-omap.c                   |  539 +++++++++++++++++--------
 3 files changed 

-- keshava
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[RFC] [PATCH 1/7] usb: ehci-omap: Add the HSUSB base address

[Keshava Munegowda]

Update omap44xx.h with base addresses for USBHOST and USBTLL.
This patch will be replaced with the HWMOD(hardware mode) implementation later.

Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
---
 arch/arm/plat-omap/include/plat/omap44xx.h |    5 +++++
 1 file changed, 5 insertions(+)

Index: kernel-omap4-base/arch/arm/plat-omap/include/plat/omap44xx.h
===================================================================
--- kernel-omap4-base.orig/arch/arm/plat-omap/include/plat/omap44xx.h
+++ kernel-omap4-base/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -52,5 +52,10 @@
 #define OMAP4_MMU1_BASE			0x55082000
 #define OMAP4_MMU2_BASE			0x4A066000
 
+#define OMAP44XX_USBTLL_BASE		(L4_44XX_BASE + 0x62000)
+#define OMAP44XX_UHH_CONFIG_BASE	(L4_44XX_BASE + 0x64000)
+#define OMAP44XX_HSUSB_OHCI_BASE	(L4_44XX_BASE + 0x64800)
+#define OMAP44XX_HSUSB_EHCI_BASE	(L4_44XX_BASE + 0x64C00)
+
 #endif /* __ASM_ARCH_OMAP44XX_H */
 

[RFC] [PATCH 2/7] usb: ehci-omap: don't execute OMAP3-specific code on non-OMAP3

[Keshava Munegowda]

Formats the code so that omap4 ehci host driver can be inserted
in TODO location later. The function cpu_is_omap44xx is used to determine
the OMAP3 or OAMP4 processor. This function will be later replaced by
hwmode changes.

There are No functional changes in this patch.

Signed-off-by: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
Signed-off-by: Anand Gadiyar <gadiyar-l0cyMroinI0@public.gmane.org>
---
 drivers/usb/host/ehci-omap.c |  295 +++++++++++++++++++++----------------------
 1 file changed, 150 insertions(+), 145 deletions(-)

Index: linux-2.6/drivers/usb/host/ehci-omap.c
===================================================================
--- linux-2.6.orig/drivers/usb/host/ehci-omap.c
+++ linux-2.6/drivers/usb/host/ehci-omap.c
@@ -297,194 +297,184 @@ static int omap_start_ehc(struct ehci_hc
 		udelay(10);
 	}
 
-	/* Enable Clocks for USBHOST */
-	omap->usbhost_ick = clk_get(omap->dev, "usbhost_ick");
-	if (IS_ERR(omap->usbhost_ick)) {
-		ret =  PTR_ERR(omap->usbhost_ick);
-		goto err_host_ick;
-	}
-	clk_enable(omap->usbhost_ick);
+	if (cpu_is_omap44xx()) {
+		/* TODO */
+	} else {
+		/* Enable Clocks for USBHOST */
+		omap->usbhost_ick = clk_get(omap->dev, "usbhost_ick");
+		if (IS_ERR(omap->usbhost_ick)) {
+			ret =  PTR_ERR(omap->usbhost_ick);
+			goto err_host;
+		}
+		clk_enable(omap->usbhost_ick);
 
-	omap->usbhost_hs_fck = clk_get(omap->dev, "usbhost_120m_fck");
-	if (IS_ERR(omap->usbhost_hs_fck)) {
-		ret = PTR_ERR(omap->usbhost_hs_fck);
-		goto err_host_hs_fck;
-	}
-	clk_enable(omap->usbhost_hs_fck);
+		omap->usbhost_hs_fck = clk_get(omap->dev, "usbhost_120m_fck");
+		if (IS_ERR(omap->usbhost_hs_fck)) {
+			ret = PTR_ERR(omap->usbhost_hs_fck);
+			goto err_host_hs_fck;
+		}
+		clk_enable(omap->usbhost_hs_fck);
 
-	omap->usbhost_fs_fck = clk_get(omap->dev, "usbhost_48m_fck");
-	if (IS_ERR(omap->usbhost_fs_fck)) {
-		ret = PTR_ERR(omap->usbhost_fs_fck);
-		goto err_host_fs_fck;
-	}
-	clk_enable(omap->usbhost_fs_fck);
+		omap->usbhost_fs_fck = clk_get(omap->dev, "usbhost_48m_fck");
+		if (IS_ERR(omap->usbhost_fs_fck)) {
+			ret = PTR_ERR(omap->usbhost_fs_fck);
+			goto err_host_fs_fck;
+		}
+		clk_enable(omap->usbhost_fs_fck);
 
-	/* Configure TLL for 60Mhz clk for ULPI */
-	omap->usbtll_fck = clk_get(omap->dev, "usbtll_fck");
-	if (IS_ERR(omap->usbtll_fck)) {
-		ret = PTR_ERR(omap->usbtll_fck);
-		goto err_tll_fck;
-	}
-	clk_enable(omap->usbtll_fck);
+		/* Configure TLL for 60Mhz clk for ULPI */
+		omap->usbtll_fck = clk_get(omap->dev, "usbtll_fck");
+		if (IS_ERR(omap->usbtll_fck)) {
+			ret = PTR_ERR(omap->usbtll_fck);
+			goto err_tll_fck;
+		}
+		clk_enable(omap->usbtll_fck);
 
-	omap->usbtll_ick = clk_get(omap->dev, "usbtll_ick");
-	if (IS_ERR(omap->usbtll_ick)) {
-		ret = PTR_ERR(omap->usbtll_ick);
-		goto err_tll_ick;
-	}
-	clk_enable(omap->usbtll_ick);
+		omap->usbtll_ick = clk_get(omap->dev, "usbtll_ick");
+		if (IS_ERR(omap->usbtll_ick)) {
+			ret = PTR_ERR(omap->usbtll_ick);
+			goto err_tll_ick;
+		}
+		clk_enable(omap->usbtll_ick);
 
-	/* perform TLL soft reset, and wait until reset is complete */
-	ehci_omap_writel(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
+		/* perform TLL soft reset, and wait until reset is complete */
+		ehci_omap_writel(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
 			OMAP_USBTLL_SYSCONFIG_SOFTRESET);
 
-	/* Wait for TLL reset to complete */
-	while (!(ehci_omap_readl(omap->tll_base, OMAP_USBTLL_SYSSTATUS)
+		/* Wait for TLL reset to complete */
+		while (!(ehci_omap_readl(omap->tll_base, OMAP_USBTLL_SYSSTATUS)
 			& OMAP_USBTLL_SYSSTATUS_RESETDONE)) {
-		cpu_relax();
+			cpu_relax();
 
-		if (time_after(jiffies, timeout)) {
-			dev_dbg(omap->dev, "operation timed out\n");
-			ret = -EINVAL;
-			goto err_sys_status;
+			if (time_after(jiffies, timeout)) {
+				dev_dbg(omap->dev, "operation timed out\n");
+				ret = -EINVAL;
+				goto err_sys_status;
+			}
 		}
-	}
 
-	dev_dbg(omap->dev, "TLL RESET DONE\n");
+		dev_dbg(omap->dev, "TLL RESET DONE\n");
 
-	/* (1<<3) = no idle mode only for initial debugging */
-	ehci_omap_writel(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
+		/* (1<<3) = no idle mode only for initial debugging */
+		ehci_omap_writel(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
 			OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
 			OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
 			OMAP_USBTLL_SYSCONFIG_CACTIVITY);
 
-
-	/* Put UHH in NoIdle/NoStandby mode */
-	reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_SYSCONFIG);
-	reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP
+		/* Put UHH in NoIdle/NoStandby mode */
+		reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_SYSCONFIG);
+		reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP
 			| OMAP_UHH_SYSCONFIG_SIDLEMODE
 			| OMAP_UHH_SYSCONFIG_CACTIVITY
 			| OMAP_UHH_SYSCONFIG_MIDLEMODE);
-	reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE;
+		reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE;
 
-	ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
+		ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
 
-	reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
+		reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
 
-	/* setup ULPI bypass and burst configurations */
-	reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
+		/* setup ULPI bypass and burst configurations */
+		reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
 			| OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
 			| OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
-	reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
+		reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
 
-	if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_UNKNOWN)
-		reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS;
-	if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_UNKNOWN)
-		reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS;
-	if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_UNKNOWN)
-		reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS;
-
-	/* Bypass the TLL module for PHY mode operation */
-	if (cpu_is_omap3430() && (omap_rev() <= OMAP3430_REV_ES2_1)) {
-		dev_dbg(omap->dev, "OMAP3 ES version <= ES2.1\n");
-		if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
-			(omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
+		if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_UNKNOWN)
+			reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS;
+		if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_UNKNOWN)
+			reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS;
+		if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_UNKNOWN)
+			reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS;
+
+		/* Bypass the TLL module for PHY mode operation */
+		if (cpu_is_omap3430() && (omap_rev() <= OMAP3430_REV_ES2_1)) {
+			dev_dbg(omap->dev, "OMAP3 ES version <= ES2.1\n");
+			if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
+				||
+				(omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
+				||
 				(omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY))
-			reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
-		else
-			reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
-	} else {
-		dev_dbg(omap->dev, "OMAP3 ES version > ES2.1\n");
-		if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
-			reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
-		else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
-			reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
-
-		if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
-			reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
-		else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
-			reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
-
-		if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)
-			reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
-		else if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
-			reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
-
-	}
-	ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
-	dev_dbg(omap->dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
-
+				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
+			else
+				reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
+		} else {
+			dev_dbg(omap->dev, "OMAP3 ES version > ES2.1\n");
+			if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
+				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
+			else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
+				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
+
+			if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
+				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
+			else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
+				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
+
+			if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)
+				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
+			else if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
+				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
+		}
+		ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
+		dev_dbg(omap->dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
 
-	/*
-	 * An undocumented "feature" in the OMAP3 EHCI controller,
-	 * causes suspended ports to be taken out of suspend when
-	 * the USBCMD.Run/Stop bit is cleared (for example when
-	 * we do ehci_bus_suspend).
-	 * This breaks suspend-resume if the root-hub is allowed
-	 * to suspend. Writing 1 to this undocumented register bit
-	 * disables this feature and restores normal behavior.
-	 */
-	ehci_omap_writel(omap->ehci_base, EHCI_INSNREG04,
+		/*
+		 * An undocumented "feature" in the OMAP3 EHCI controller,
+		 * causes suspended ports to be taken out of suspend when
+		 * the USBCMD.Run/Stop bit is cleared (for example when
+		 * we do ehci_bus_suspend).
+		 * This breaks suspend-resume if the root-hub is allowed
+		 * to suspend. Writing 1 to this undocumented register bit
+		 * disables this feature and restores normal behavior.
+		 */
+		ehci_omap_writel(omap->ehci_base, EHCI_INSNREG04,
 				EHCI_INSNREG04_DISABLE_UNSUSPEND);
 
-	if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
-		(omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
+		if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
+			(omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
 			(omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
 
-		if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
-			tll_ch_mask |= OMAP_TLL_CHANNEL_1_EN_MASK;
-		if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
-			tll_ch_mask |= OMAP_TLL_CHANNEL_2_EN_MASK;
-		if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
-			tll_ch_mask |= OMAP_TLL_CHANNEL_3_EN_MASK;
-
-		/* Enable UTMI mode for required TLL channels */
-		omap_usb_utmi_init(omap, tll_ch_mask, OMAP_TLL_CHANNEL_COUNT);
-	}
-
-	if (omap->phy_reset) {
-		/* Refer ISSUE1:
-		 * Hold the PHY in RESET for enough time till
-		 * PHY is settled and ready
-		 */
-		udelay(10);
-
-		if (gpio_is_valid(omap->reset_gpio_port[0]))
-			gpio_set_value(omap->reset_gpio_port[0], 1);
-
-		if (gpio_is_valid(omap->reset_gpio_port[1]))
-			gpio_set_value(omap->reset_gpio_port[1], 1);
-	}
+			if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
+				tll_ch_mask |= OMAP_TLL_CHANNEL_1_EN_MASK;
+			if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
+				tll_ch_mask |= OMAP_TLL_CHANNEL_2_EN_MASK;
+			if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
+				tll_ch_mask |= OMAP_TLL_CHANNEL_3_EN_MASK;
+
+			/* Enable UTMI mode for required TLL channels */
+			omap_usb_utmi_init(omap, tll_ch_mask,
+					OMAP_TLL_CHANNEL_COUNT);
+		}
 
-	/* Soft reset the PHY using PHY reset command over ULPI */
-	if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
-		omap_ehci_soft_phy_reset(omap, 0);
-	if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
-		omap_ehci_soft_phy_reset(omap, 1);
+		/* Soft reset the PHY using PHY reset command over ULPI */
+		if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
+			omap_ehci_soft_phy_reset(omap, 0);
+		if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
+			omap_ehci_soft_phy_reset(omap, 1);
 
-	return 0;
+		goto ok_host;
 
 err_sys_status:
-	clk_disable(omap->usbtll_ick);
-	clk_put(omap->usbtll_ick);
+		clk_disable(omap->usbtll_ick);
+		clk_put(omap->usbtll_ick);
 
 err_tll_ick:
-	clk_disable(omap->usbtll_fck);
-	clk_put(omap->usbtll_fck);
+		clk_disable(omap->usbtll_fck);
+		clk_put(omap->usbtll_fck);
 
 err_tll_fck:
-	clk_disable(omap->usbhost_fs_fck);
-	clk_put(omap->usbhost_fs_fck);
+		clk_disable(omap->usbhost_fs_fck);
+		clk_put(omap->usbhost_fs_fck);
 
 err_host_fs_fck:
-	clk_disable(omap->usbhost_hs_fck);
-	clk_put(omap->usbhost_hs_fck);
+		clk_disable(omap->usbhost_hs_fck);
+		clk_put(omap->usbhost_hs_fck);
 
 err_host_hs_fck:
-	clk_disable(omap->usbhost_ick);
-	clk_put(omap->usbhost_ick);
+		clk_disable(omap->usbhost_ick);
+		clk_put(omap->usbhost_ick);
+	}
 
-err_host_ick:
+err_host:
 	if (omap->phy_reset) {
 		if (gpio_is_valid(omap->reset_gpio_port[0]))
 			gpio_free(omap->reset_gpio_port[0]);
@@ -492,8 +482,23 @@ err_host_ick:
 		if (gpio_is_valid(omap->reset_gpio_port[1]))
 			gpio_free(omap->reset_gpio_port[1]);
 	}

[RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support

[Keshava Munegowda]

Update the ehci-omap driver to add support for OMAP4.

The OMAP4 has two ports compared to 3 on the OMAP3.
Each port has its own functional clock, compared to a single clock
for all ports on OMAP3. The clock can be internally sourced 
(TLL mode, HSIC mode), or externally provided (ULPI PHY).

Register bit positions for mode selections
(TLL, HSIC or ULPI PHY) have changed.

Signed-off-by: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
Signed-off-by: Anand Gadiyar <gadiyar-l0cyMroinI0@public.gmane.org>
---
 drivers/usb/host/ehci-omap.c |  208 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 205 insertions(+), 3 deletions(-)

Index: linux-2.6/drivers/usb/host/ehci-omap.c
===================================================================
--- linux-2.6.orig/drivers/usb/host/ehci-omap.c
+++ linux-2.6/drivers/usb/host/ehci-omap.c
@@ -127,6 +127,31 @@
 #define	EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT		8
 #define	EHCI_INSNREG05_ULPI_WRDATA_SHIFT		0
 
+/* OMAP4 specific */
+#define OMAP_UHH_SYSCONFIG_IDLEMODE_RESET		(~(0xC))
+#define OMAP_UHH_SYSCONFIG_FIDLEMODE_SET		(0 << 2)
+#define OMAP_UHH_SYSCONFIG_NIDLEMODE_SET		(1 << 2)
+#define OMAP_UHH_SYSCONFIG_SIDLEMODE_SET		(2 << 2)
+#define OMAP_UHH_SYSCONFIG_SWIDLMODE_SET		(3 << 2)
+
+#define OMAP_UHH_SYSCONFIG_STDYMODE_RESET		(~(3 << 4))
+#define OMAP_UHH_SYSCONFIG_FSTDYMODE_SET		(0 << 4)
+#define OMAP_UHH_SYSCONFIG_NSTDYMODE_SET		(1 << 4)
+#define OMAP_UHH_SYSCONFIG_SSTDYMODE_SET		(2 << 4)
+#define OMAP_UHH_SYSCONFIG_SWSTDMODE_SET		(3 << 4)
+
+#define OMAP_UHH_HOST_PORTS_RESET			(~(0xF << 16))
+#define OMAP_UHH_HOST_P1_SET_ULPIPHY			(0 << 16)
+#define OMAP_UHH_HOST_P1_SET_ULPITLL			(1 << 16)
+#define OMAP_UHH_HOST_P1_SET_HSIC			(3 << 16)
+
+#define OMAP_UHH_HOST_P2_SET_ULPIPHY			(0 << 18)
+#define OMAP_UHH_HOST_P2_SET_ULPITLL			(1 << 18)
+#define OMAP_UHH_HOST_P2_SET_HSIC			(3 << 18)
+#define OMAP4_UHH_SYSCONFIG_SOFTRESET			(1 << 0)
+
+#define OMAP4_TLL_CHANNEL_COUNT				2
+
 /*-------------------------------------------------------------------------*/
 
 static inline void ehci_omap_writel(void __iomem *base, u32 reg, u32 val)
@@ -160,6 +185,10 @@ struct ehci_hcd_omap {
 	struct clk		*usbhost_fs_fck;
 	struct clk		*usbtll_fck;
 	struct clk		*usbtll_ick;
+	struct clk		*xclk60mhsp1_ck;
+	struct clk		*xclk60mhsp2_ck;
+	struct clk		*utmi_p1_fck;
+	struct clk		*utmi_p2_fck;
 
 	/* FIXME the following two workarounds are
 	 * board specific not silicon-specific so these
@@ -298,7 +327,163 @@ static int omap_start_ehc(struct ehci_hc
 	}
 
 	if (cpu_is_omap44xx()) {
-		/* TODO */
+		/* Enable clocks for OMAP4 USBHOST */
+		omap->usbhost_hs_fck = clk_get(omap->dev, "usb_host_fck");
+		if (IS_ERR(omap->usbhost_hs_fck)) {
+			ret = PTR_ERR(omap->usbhost_hs_fck);
+			goto err_host;
+		}
+		clk_enable(omap->usbhost_hs_fck);
+
+		omap->usbhost_fs_fck = clk_get(omap->dev, "usb_host_fs_fck");
+		if (IS_ERR(omap->usbhost_fs_fck)) {
+			ret = PTR_ERR(omap->usbhost_fs_fck);
+			goto err_44host_fs_fck;
+		}
+		clk_enable(omap->usbhost_fs_fck);
+
+		omap->xclk60mhsp1_ck = clk_get(omap->dev, "xclk60mhsp1_ck");
+		if (IS_ERR(omap->xclk60mhsp1_ck)) {
+			ret = PTR_ERR(omap->xclk60mhsp1_ck);
+			goto err_xclk60mhsp1_ck;
+		}
+
+		omap->utmi_p1_fck = clk_get(omap->dev, "utmi_p1_gfclk_ck");
+		if (IS_ERR(omap->utmi_p1_fck)) {
+			ret = PTR_ERR(omap->utmi_p1_fck);
+			goto err_xclk60mhsp1_ck;
+		}
+
+		/* Set the clock parent as External clock  */
+		ret = clk_set_parent(omap->utmi_p1_fck, omap->xclk60mhsp1_ck);
+		if (ret != 0)
+			goto err_xclk60mhsp1_ck;
+
+		clk_enable(omap->utmi_p1_fck);
+
+		omap->xclk60mhsp2_ck = clk_get(omap->dev, "xclk60mhsp2_ck");
+		if (IS_ERR(omap->xclk60mhsp2_ck)) {
+			ret = PTR_ERR(omap->xclk60mhsp2_ck);
+			goto err_xclk60mhsp2_ck;
+		}
+
+		omap->utmi_p2_fck = clk_get(omap->dev, "utmi_p2_gfclk_ck");
+		if (IS_ERR(omap->utmi_p2_fck)) {
+			ret = PTR_ERR(omap->utmi_p2_fck);
+			goto err_xclk60mhsp2_ck;
+		}
+
+		/* Set the clock parent as External clock  */
+		ret = clk_set_parent(omap->utmi_p2_fck, omap->xclk60mhsp2_ck);
+
+		if (ret != 0)
+			goto err_xclk60mhsp2_ck;
+
+		clk_enable(omap->utmi_p2_fck);
+
+		/* Put UHH in NoIdle/NoStandby mode */
+		reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_SYSCONFIG);
+		reg &= OMAP_UHH_SYSCONFIG_IDLEMODE_RESET;
+		reg |= OMAP_UHH_SYSCONFIG_NIDLEMODE_SET;
+
+		reg &= OMAP_UHH_SYSCONFIG_STDYMODE_RESET;
+		reg |= OMAP_UHH_SYSCONFIG_NSTDYMODE_SET;
+
+		ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
+		reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
+		/* setup ULPI bypass and burst configurations */
+		reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN |
+			OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN |
+			OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
+		reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
+
+		/* set p1 & p2 modes */
+		reg &= OMAP_UHH_HOST_PORTS_RESET;
+		if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
+			reg |= OMAP_UHH_HOST_P1_SET_ULPIPHY;
+		else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
+			reg |= OMAP_UHH_HOST_P1_SET_ULPITLL;
+
+		if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
+			reg |= OMAP_UHH_HOST_P2_SET_ULPIPHY;
+		else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
+			reg |= OMAP_UHH_HOST_P2_SET_ULPITLL;
+
+		ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
+		dev_dbg(omap->dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
+
+		if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
+			(omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)) {
+			omap->usbtll_ick = clk_get(omap->dev, "usb_tll_ick");
+			if (IS_ERR(omap->usbtll_ick)) {
+				ret = PTR_ERR(omap->usbtll_ick);
+				goto err_44tll_ick;
+			}
+			clk_enable(omap->usbtll_ick);
+
+			/* perform TLL soft reset, and wait
+			 * until reset is complete */
+			ehci_omap_writel(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
+					OMAP_USBTLL_SYSCONFIG_SOFTRESET);
+
+			/* Wait for TLL reset to complete */
+			while (!(ehci_omap_readl(omap->tll_base,
+				OMAP_USBTLL_SYSSTATUS) &
+				OMAP_USBTLL_SYSSTATUS_RESETDONE)) {
+				cpu_relax();
+
+				if (time_after(jiffies, timeout)) {
+					dev_dbg(omap->dev,
+						"operation timed out\n");
+					ret = -EINVAL;
+					goto err_44sys_status;
+				}
+			}
+
+			dev_dbg(omap->dev, "TLL RESET DONE\n");
+
+			/* (1<<3) = no idle mode only for initial debugging */
+			ehci_omap_writel(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
+					OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
+					OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
+					OMAP_USBTLL_SYSCONFIG_CACTIVITY);
+
+			if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
+				tll_ch_mask |= OMAP_TLL_CHANNEL_1_EN_MASK;
+
+			if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
+				tll_ch_mask |= OMAP_TLL_CHANNEL_2_EN_MASK;
+
+			/* Enable UTMI mode for required TLL channels */
+			omap_usb_utmi_init(omap, tll_ch_mask,
+						OMAP4_TLL_CHANNEL_COUNT);
+		}
+
+		goto ok_host;
+
+err_44sys_status:
+		clk_disable(omap->usbtll_ick);
+		clk_put(omap->usbtll_ick);
+
+err_44tll_ick:
+		clk_disable(omap->utmi_p2_fck);
+		clk_put(omap->utmi_p2_fck);
+		clk_put(omap->xclk60mhsp2_ck);
+
+err_xclk60mhsp2_ck:
+		clk_disable(omap->utmi_p1_fck);
+		clk_put(omap->utmi_p1_fck);
+		clk_put(omap->xclk60mhsp1_ck);
+
+err_xclk60mhsp1_ck:
+		clk_disable(omap->usbhost_fs_fck);
+		clk_put(omap->usbhost_fs_fck);
+
+err_44host_fs_fck:
+		clk_disable(omap->usbhost_hs_fck);
+		clk_put(omap->usbhost_hs_fck);
+
+		goto err_host;
 	} else {
 		/* Enable Clocks for USBHOST */
 		omap->usbhost_ick = clk_get(omap->dev, "usbhost_ick");
@@ -508,8 +693,13 @@ static void omap_stop_ehc(struct ehci_hc
 	dev_dbg(omap->dev, "stopping TI EHCI USB Controller\n");
 
 	/* Reset OMAP modules for insmod/rmmod to work */
-	ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG,
-			OMAP_UHH_SYSCONFIG_SOFTRESET);
+	if (cpu_is_omap44xx())
+		ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG,
+					OMAP4_UHH_SYSCONFIG_SOFTRESET);
+	else
+		ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG,
+					OMAP_UHH_SYSCONFIG_SOFTRESET);
+
 	while (!(ehci_omap_readl(omap->uhh_base, OMAP_UHH_SYSSTATUS)
 				& (1 << 0))) {
 		cpu_relax();
@@ -556,6 +746,18 @@ static void omap_stop_ehc(struct ehci_hc
 		omap->usbhost_ick = NULL;
 	}
 
+	if (omap->utmi_p2_fck != NULL) {
+		clk_disable(omap->utmi_p2_fck);
+		clk_put(omap->utmi_p2_fck);
+		omap->utmi_p2_fck = NULL;
+	}
+
+	if (omap->utmi_p1_fck != NULL) {
+		clk_disable(omap->utmi_p1_fck);
+		clk_put(omap->utmi_p1_fck);
+		omap->utmi_p1_fck = NULL;
+	}
+
 	if (omap->usbhost_fs_fck != NULL) {
 		clk_disable(omap->usbhost_fs_fck);
 		clk_put(omap->usbhost_fs_fck);
--
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[RFC] [PATCH 4/7] omap: usb: ehci: IO mux mode settings for omap4

[Keshava Munegowda]

This patch adds mux-mode settings for EHCI pads on OMAP4.
This is a hack for now, 
This code be replaced when the mux framework is introduced for OMAP4.

Signed-off-by: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
Signed-off-by: Anand Gadiyar <gadiyar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-omap2/usb-ehci.c |  109 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 109 insertions(+)

Index: linux-2.6/arch/arm/mach-omap2/usb-ehci.c
===================================================================
--- linux-2.6.orig/arch/arm/mach-omap2/usb-ehci.c
+++ linux-2.6/arch/arm/mach-omap2/usb-ehci.c
@@ -214,6 +214,115 @@ static void setup_ehci_io_mux(const enum
 	return;
 }
 
+static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
+{
+	/*
+	 * FIXME: This funtion should use mux framework functions;
+	 * For now, we are hardcoding this.
+	 */
+	switch (port_mode[0]) {
+	case EHCI_HCD_OMAP_MODE_PHY:
+
+		/* HUSB1_PHY CLK , INPUT ENABLED, PULLDOWN  */
+		omap_writew(0x010C, 0x4A1000C2);
+
+		/* HUSB1 STP */
+		omap_writew(0x0004, 0x4A1000C4);
+
+		/* HUSB1_DIR */
+		omap_writew(0x010C, 0x4A1000C6);
+
+		/* HUSB1_NXT */
+		omap_writew(0x010C, 0x4A1000C8);
+
+		/* HUSB1_DATA0 */
+		omap_writew(0x010C, 0x4A1000CA);
+
+		/* HUSB1_DATA1 */
+		omap_writew(0x010C, 0x4A1000CC);
+
+		/* HUSB1_DATA2 */
+		omap_writew(0x010C, 0x4A1000CE);
+
+		/* HUSB1_DATA3 */
+		omap_writew(0x010C, 0x4A1000D0);
+
+		/* HUSB1_DATA4 */
+		omap_writew(0x010C, 0x4A1000D2);
+
+		/* HUSB1_DATA5 */
+		omap_writew(0x010C, 0x4A1000D4);
+
+		/* HUSB1_DATA6 */
+		omap_writew(0x010C, 0x4A1000D6);
+
+		/* HUSB1_DATA7 */
+		omap_writew(0x010C, 0x4A1000D8);
+
+		break;
+
+	case EHCI_HCD_OMAP_MODE_TLL:
+		/* TODO */
+
+		break;
+	case EHCI_HCD_OMAP_MODE_UNKNOWN:
+		/* FALLTHROUGH */
+	default:
+		break;
+	}
+
+	switch (port_mode[1]) {
+	case EHCI_HCD_OMAP_MODE_PHY:
+		/* HUSB2_PHY CLK , INPUT PULLDOWN ENABLED  */
+		omap_writew(0x010C, 0x4A100160);
+
+		/* HUSB2 STP */
+		omap_writew(0x0002, 0x4A100162);
+
+		/* HUSB2_DIR */
+		omap_writew(0x010A, 0x4A100164);
+
+		/* HUSB2_NXT */
+		omap_writew(0x010A, 0x4A100166);
+
+		/* HUSB2_DATA0 */
+		omap_writew(0x010A, 0x4A100168);
+
+		/* HUSB2_DATA1 */
+		omap_writew(0x010A, 0x4A10016A);
+
+		/* HUSB2_DATA2 */
+		omap_writew(0x010A, 0x4A10016C);
+
+		/* HUSB2_DATA3 */
+		omap_writew(0x010A, 0x4A10016E);
+
+		/* HUSB2_DATA4 */
+		omap_writew(0x010A, 0x4A100170);
+
+		/* HUSB2_DATA5 */
+		omap_writew(0x010A, 0x4A100172);
+
+		/* HUSB2_DATA6 */
+		omap_writew(0x010A, 0x4A100174);
+
+		/* HUSB2_DATA7 */
+		omap_writew(0x010A, 0x4A100176);
+
+		break;
+
+	case EHCI_HCD_OMAP_MODE_TLL:
+		/* TODO */
+
+		break;
+	case EHCI_HCD_OMAP_MODE_UNKNOWN:
+		/* FALLTHROUGH */
+	default:
+		break;
+	}
+	return;
+}
+
 void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
 {
 	platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
--
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[RFC] [PATCH 5/7] omap: usb: ehci: Initialize resources for omap4

[Keshava Munegowda]

Update resources (IRQ number, base addresses) for EHCI on OMAP4.
This patch will be replaced when the driver is converted to
take advantage of hwmod (hardware mode).

Signed-off-by: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
Signed-off-by: Anand Gadiyar <gadiyar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-omap2/usb-ehci.c |   26 ++++++++++++++++++--------
 1 file changed, 18 insertions(+), 8 deletions(-)

Index: linux-2.6/arch/arm/mach-omap2/usb-ehci.c
===================================================================
--- linux-2.6.orig/arch/arm/mach-omap2/usb-ehci.c
+++ linux-2.6/arch/arm/mach-omap2/usb-ehci.c
@@ -34,22 +34,15 @@
 
 static struct resource ehci_resources[] = {
 	{
-		.start	= OMAP34XX_EHCI_BASE,
-		.end	= OMAP34XX_EHCI_BASE + SZ_1K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= OMAP34XX_UHH_CONFIG_BASE,
-		.end	= OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= OMAP34XX_USBTLL_BASE,
-		.end	= OMAP34XX_USBTLL_BASE + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
 	{         /* general IRQ */
-		.start   = INT_34XX_EHCI_IRQ,
 		.flags   = IORESOURCE_IRQ,
 	}
 };
@@ -328,8 +321,25 @@ void __init usb_ehci_init(const struct e
 	platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
 
 	/* Setup Pin IO MUX for EHCI */
-	if (cpu_is_omap34xx())
+	if (cpu_is_omap34xx()) {
+		ehci_resources[0].start	= OMAP34XX_EHCI_BASE;
+		ehci_resources[0].end	= OMAP34XX_EHCI_BASE + SZ_1K - 1;
+		ehci_resources[1].start	= OMAP34XX_UHH_CONFIG_BASE;
+		ehci_resources[1].end	= OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
+		ehci_resources[2].start	= OMAP34XX_USBTLL_BASE;
+		ehci_resources[2].end	= OMAP34XX_USBTLL_BASE + SZ_4K - 1;
+		ehci_resources[3].start = INT_34XX_EHCI_IRQ;
 		setup_ehci_io_mux(pdata->port_mode);
+	} else if (cpu_is_omap44xx()) {
+		ehci_resources[0].start	= OMAP44XX_HSUSB_EHCI_BASE;
+		ehci_resources[0].end	= OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
+		ehci_resources[1].start	= OMAP44XX_UHH_CONFIG_BASE;
+		ehci_resources[1].end	= OMAP44XX_UHH_CONFIG_BASE + SZ_2K - 1;
+		ehci_resources[2].start	= OMAP44XX_USBTLL_BASE;
+		ehci_resources[2].end	= OMAP44XX_USBTLL_BASE + SZ_4K - 1;
+		ehci_resources[3].start = OMAP44XX_IRQ_EHCI;
+		setup_4430ehci_io_mux(pdata->port_mode);
+	}
 
 	if (platform_device_register(&ehci_device) < 0) {
 		printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
--
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[RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Keshava Munegowda]

Introduce the CONFIG_USB_EHCI_HCD_OMAP3 option to select
EHCI support on OMAP3 and later chips. This scales better
than having a long line of dependencies for each new OMAP
with EHCI support.

Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
---
 drivers/usb/host/Kconfig    |    8 ++++++++
 drivers/usb/host/ehci-hcd.c |    2 +-
 2 files changed, 9 insertions(+), 1 deletion(-)

Index: linux-2.6/drivers/usb/host/ehci-hcd.c
===================================================================
--- linux-2.6.orig/drivers/usb/host/ehci-hcd.c
+++ linux-2.6/drivers/usb/host/ehci-hcd.c
@@ -1157,7 +1157,7 @@ MODULE_LICENSE ("GPL");
 #define	PLATFORM_DRIVER		ehci_hcd_au1xxx_driver
 #endif
 
-#ifdef CONFIG_ARCH_OMAP3
+#ifdef CONFIG_USB_EHCI_HCD_OMAP3
 #include "ehci-omap.c"
 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
 #endif
Index: linux-2.6/drivers/usb/host/Kconfig
===================================================================
--- linux-2.6.orig/drivers/usb/host/Kconfig
+++ linux-2.6/drivers/usb/host/Kconfig
@@ -126,6 +126,14 @@ config USB_EHCI_MXC
 	---help---
 	  Variation of ARC USB block used in some Freescale chips.
 
+config USB_EHCI_HCD_OMAP3
+	bool "EHCI support for OMAP3 and later chips"
+	depends on USB_EHCI_HCD && (ARCH_OMAP3 || ARCH_OMAP4)
+	default y
+	--- help ---
+	  Enables support for the on-chip EHCI controller on
+	  OMAP3 and later chips.
+
 config USB_EHCI_HCD_PPC_OF
 	bool "EHCI support for PPC USB controller on OF platform bus"
 	depends on USB_EHCI_HCD && PPC_OF

[RFC] [PATCH 7/7] omap: ehci: enable the ehci port on OMAP4SDP

[Keshava Munegowda]

The OMAP4 SDP has EHCI port1 hooked up to an external SMSC3320
transciever. GPIO 157 is used to power on the transceiver.

Signed-off-by: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
Signed-off-by: Anand Gadiyar <gadiyar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-omap2/board-4430sdp.c |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

Index: linux-2.6/arch/arm/mach-omap2/board-4430sdp.c
===================================================================
--- linux-2.6.orig/arch/arm/mach-omap2/board-4430sdp.c
+++ linux-2.6/arch/arm/mach-omap2/board-4430sdp.c
@@ -40,6 +40,7 @@
 #define ETH_KS8851_IRQ			34
 #define ETH_KS8851_POWER_ON		48
 #define ETH_KS8851_QUART		138
+#define OMAP4SDP_MDM_PWR_EN_GPIO	157
 
 static struct gpio_led sdp4430_gpio_leds[] = {
 	{
@@ -412,6 +413,17 @@ static struct i2c_board_info __initdata 
 		I2C_BOARD_INFO("tmp105", 0x48),
 	},
 };
+
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+	.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+	.phy_reset  = false,
+	.reset_gpio_port[0]  = -EINVAL,
+	.reset_gpio_port[1]  = -EINVAL,
+	.reset_gpio_port[2]  = -EINVAL
+};
+
 static int __init omap4_i2c_init(void)
 {
 	/*
@@ -434,6 +446,14 @@ static void __init omap_4430sdp_init(voi
 	platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
 	omap_serial_init();
 	omap4_twl6030_hsmmc_init(mmc);
+
+	/* Power on the ULPI PHY */
+	if (gpio_is_valid(OMAP4SDP_MDM_PWR_EN_GPIO)) {
+		/* FIXME: Assumes pad is muxed for GPIO mode */
+		gpio_request(OMAP4SDP_MDM_PWR_EN_GPIO, "USBB1 PHY VMDM_3V3");
+		gpio_direction_output(OMAP4SDP_MDM_PWR_EN_GPIO, 1);
+	}
+	usb_ehci_init(&ehci_pdata);
 	/* OMAP4 SDP uses internal transceiver so register nop transceiver */
 	usb_nop_xceiv_register();
 	/* FIXME: allow multi-omap to boot until musb is updated for omap4 */
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Re: [RFC] [PATCH 2/7] usb: ehci-omap: don't execute OMAP3-specific code on non-OMAP3

[Felipe Balbi]

On Thu, Aug 19, 2010 at 01:49:32AM +0200, ext Keshava Munegowda wrote:
>@@ -297,194 +297,184 @@ static int omap_start_ehc(struct ehci_hc
>                udelay(10);
>        }
>
>-       /* Enable Clocks for USBHOST */
>-       omap->usbhost_ick = clk_get(omap->dev, "usbhost_ick");
>-       if (IS_ERR(omap->usbhost_ick)) {
>-               ret =  PTR_ERR(omap->usbhost_ick);
>-               goto err_host_ick;
>-       }
>-       clk_enable(omap->usbhost_ick);
>+       if (cpu_is_omap44xx()) {
>+               /* TODO */

please don't. Come back when you have clock framework support for omap4, 
this patch is anyway useless as you will revert it as soon as clock 
framework support is done. NAK

if you don't have clk support on omap4, make clk_* empty stubs.

-- 
balbi

DefectiveByDesign.org

Re: [RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support

[Felipe Balbi]

Hi,

On Thu, Aug 19, 2010 at 01:49:33AM +0200, ext Keshava Munegowda wrote:
>@@ -298,7 +327,163 @@ static int omap_start_ehc(struct ehci_hc
> 	}
>
> 	if (cpu_is_omap44xx()) {
>-		/* TODO */

driver should never make use of cpu_is_omap* calls neither machine_is_* 
for that matter. Driver shouldn't care about correct clock names either. 
You need to find a better to handle differences between omap3 and omap4.

-- 
balbi

DefectiveByDesign.org

Re: [RFC] [PATCH 5/7] omap: usb: ehci: Initialize resources for omap4

[Felipe Balbi]

On Thu, Aug 19, 2010 at 01:49:35AM +0200, ext Keshava Munegowda wrote:
>@@ -328,8 +321,25 @@ void __init usb_ehci_init(const struct e
> 	platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
>
> 	/* Setup Pin IO MUX for EHCI */
>-	if (cpu_is_omap34xx())
>+	if (cpu_is_omap34xx()) {
>+		ehci_resources[0].start	= OMAP34XX_EHCI_BASE;
>+		ehci_resources[0].end	= OMAP34XX_EHCI_BASE + SZ_1K - 1;
>+		ehci_resources[1].start	= OMAP34XX_UHH_CONFIG_BASE;
>+		ehci_resources[1].end	= OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
>+		ehci_resources[2].start	= OMAP34XX_USBTLL_BASE;
>+		ehci_resources[2].end	= OMAP34XX_USBTLL_BASE + SZ_4K - 1;
>+		ehci_resources[3].start = INT_34XX_EHCI_IRQ;
> 		setup_ehci_io_mux(pdata->port_mode);

rename this to setup_3430ehci_io_mux() while at that.

-- 
balbi

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Re: [RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Felipe Balbi]

On Thu, Aug 19, 2010 at 01:49:36AM +0200, ext Keshava Munegowda wrote:
>@@ -126,6 +126,14 @@ config USB_EHCI_MXC
> 	---help---
> 	  Variation of ARC USB block used in some Freescale chips.
>
>+config USB_EHCI_HCD_OMAP3

USB_EHCI_HCD_OMAP would be enough as you already have omap3 and omap4 
supported.

-- 
balbi

DefectiveByDesign.org

Re: [RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Felipe Balbi]

hi again,

On Thu, Aug 19, 2010 at 01:49:36AM +0200, ext Keshava Munegowda wrote:
>@@ -126,6 +126,14 @@ config USB_EHCI_MXC
> 	---help---
> 	  Variation of ARC USB block used in some Freescale chips.
>
>+config USB_EHCI_HCD_OMAP3
>+	bool "EHCI support for OMAP3 and later chips"
>+	depends on USB_EHCI_HCD && (ARCH_OMAP3 || ARCH_OMAP4)

this line doesn't scale. When we have another omap release this will 
become e.g. ARCH_OMAP3 || ARCH_OMAP4 || ARCH_OMAP5 || ARCH_OMAP6 etc 
etc, so instead of depending on ARCH_OMAPX, depend only on ARCH_OMAP and 
make the architecture select the USB_ARCH_HAS_EHCI like this:

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b48bacf..872b30a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -43,6 +43,7 @@ config ARCH_OMAP4
  	depends on ARCH_OMAP2PLUS
  	select CPU_V7
  	select ARM_GIC
+       select USB_ARCH_HAS_EHCI
  
  comment "OMAP Core Type"
  	depends on ARCH_OMAP2


-- 
balbi

DefectiveByDesign.org
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RE: [RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support

[Gadiyar, Anand]

Felipe Balbi wrote:
> On Thu, Aug 19, 2010 at 01:49:33AM +0200, ext Keshava Munegowda wrote:
> >@@ -298,7 +327,163 @@ static int omap_start_ehc(struct ehci_hc
> > 	}
> >
> > 	if (cpu_is_omap44xx()) {
> >-		/* TODO */
> 
> driver should never make use of cpu_is_omap* calls neither machine_is_* 
> for that matter. Driver shouldn't care about correct clock names either. 
> You need to find a better to handle differences between omap3 and omap4.
> 

The differences between OMAP3 and OMAP4 are:
- The OMAP4 has a different set of clocks which do not exist on OMAP3.
- The register bits for configuring port modes is different

For the clock handling:
One approach: On OMAP3, have a set of dummy clocks corresponding to the
per-port clocks on OMAP4. Then the driver wouldn't need to know which
SoC it is running on.

Another approach:
Have a different glue layer driver for OMAP4.

For the register bit differences, we do need to know which SoC we are
running on to be able to use the correct register bits. For this, 

One approach:
At the very minimum, we need a set of clocks to be enabled to be able to
read the UHH_REVISION register, and we could use that to figure out which
bits we need to use.

The other approach I can think of is to have platform data tell us (I'm
guessing this is a bad idea).

What do you think?

- Anand


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Re: [RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support

[Felipe Balbi]

Hi,

On Fri, Aug 20, 2010 at 07:47:07AM +0200, ext Gadiyar, Anand wrote:
>The differences between OMAP3 and OMAP4 are:
>- The OMAP4 has a different set of clocks which do not exist on OMAP3.
>- The register bits for configuring port modes is different

is it a different ip core or just a modification of the previous ?

>For the clock handling:
>One approach: On OMAP3, have a set of dummy clocks corresponding to the
>per-port clocks on OMAP4. Then the driver wouldn't need to know which
>SoC it is running on.
>
>Another approach:
>Have a different glue layer driver for OMAP4.
>
>For the register bit differences, we do need to know which SoC we are
>running on to be able to use the correct register bits. For this,

isn't the ehci ip revision different ? Why don't you use that instead of 
cpu_is_omap* 

>One approach:
>At the very minimum, we need a set of clocks to be enabled to be able to
>read the UHH_REVISION register, and we could use that to figure out which
>bits we need to use.

exactly

>The other approach I can think of is to have platform data tell us (I'm
>guessing this is a bad idea).

yeah, that would be bad...

>What do you think?

another approach:

make ohci and ehci play well together have an omap3-specific and one 
omap4-specific MFD-like driver that will instantiate ehci and ohci 
platform_drivers and handle clock + locking to shared address space.

then you define a set of accessor functions for registers with different 
offset that act differently depending on revision of the ip core.

Does that work ?

-- 
balbi

DefectiveByDesign.org

RE: [RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Gadiyar, Anand]

Felipe Balbi wrote:
> On Thu, Aug 19, 2010 at 01:49:36AM +0200, ext Keshava Munegowda wrote:
> >@@ -126,6 +126,14 @@ config USB_EHCI_MXC
> > 	---help---
> > 	  Variation of ARC USB block used in some Freescale chips.
> >
> >+config USB_EHCI_HCD_OMAP3
> >+	bool "EHCI support for OMAP3 and later chips"
> >+	depends on USB_EHCI_HCD && (ARCH_OMAP3 || ARCH_OMAP4)
> 
> this line doesn't scale. When we have another omap release this will 
> become e.g. ARCH_OMAP3 || ARCH_OMAP4 || ARCH_OMAP5 || ARCH_OMAP6 etc 
> etc, so instead of depending on ARCH_OMAPX, depend only on ARCH_OMAP and 
> make the architecture select the USB_ARCH_HAS_EHCI like this:

ARCH_OMAP includes OMAP1/2, and these chips do not have any EHCI controllers.

Is this okay?

- Anand
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RE: [RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support

[Shilimkar, Santosh]

+ Benoit, Paul
> -----Original Message-----
> From: linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [mailto:linux-omap-
> owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf Of Gadiyar, Anand
> Sent: Friday, August 20, 2010 11:17 AM
> To: felipe.balbi-xNZwKgViW5gAvxtiuMwx3w@public.gmane.org; Munegowda, Keshava
> Cc: linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Subject: RE: [RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support
> 
> Felipe Balbi wrote:
> > On Thu, Aug 19, 2010 at 01:49:33AM +0200, ext Keshava Munegowda wrote:
> > >@@ -298,7 +327,163 @@ static int omap_start_ehc(struct ehci_hc
> > > 	}
> > >
> > > 	if (cpu_is_omap44xx()) {
> > >-		/* TODO */
> >
> > driver should never make use of cpu_is_omap* calls neither machine_is_*
> > for that matter. Driver shouldn't care about correct clock names either.
> > You need to find a better to handle differences between omap3 and omap4.
> >
> 
> The differences between OMAP3 and OMAP4 are:
> - The OMAP4 has a different set of clocks which do not exist on OMAP3.
> - The register bits for configuring port modes is different
> 
> For the clock handling:
> One approach: On OMAP3, have a set of dummy clocks corresponding to the
> per-port clocks on OMAP4. Then the driver wouldn't need to know which
> SoC it is running on.
> 
One similar problem was with GFX between OMAP4 versions. The clock
tree was completely different. Even DSS on OMAP3 and OMAP4 has different
clock tree.
Paul and Benoit suggested that this can be handled within the framework.
I know USB is a special case because of different scenario's has different
clock needs.

You can list down the problems here. May be we can handle this in
a more generic way using the frameworks rather than glue layer.

Regards,
Santosh
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RE: [RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support

[Gadiyar, Anand]

Felipe Balbi wrote:
> Hi,
> 
> On Fri, Aug 20, 2010 at 07:47:07AM +0200, ext Gadiyar, Anand wrote:
> >The differences between OMAP3 and OMAP4 are:
> >- The OMAP4 has a different set of clocks which do not exist on OMAP3.
> >- The register bits for configuring port modes is different
> 
> is it a different ip core or just a modification of the previous ?
> 
> >For the clock handling:
> >One approach: On OMAP3, have a set of dummy clocks corresponding to the
> >per-port clocks on OMAP4. Then the driver wouldn't need to know which
> >SoC it is running on.
> >
> >Another approach:
> >Have a different glue layer driver for OMAP4.
> >
> >For the register bit differences, we do need to know which SoC we are
> >running on to be able to use the correct register bits. For this,
> 
> isn't the ehci ip revision different ? Why don't you use that instead of 
> cpu_is_omap* 
> 

Yes the revision - but that's not as good a test as using UHH_REVISION.
The difference between the IPs is a function of the UHH_REVISION, and to
me reading EHCI revision/capabilities is more hack-ish than just using
UHH_REVSION.

> >One approach:
> >At the very minimum, we need a set of clocks to be enabled to be able to
> >read the UHH_REVISION register, and we could use that to figure out which
> >bits we need to use.
> 
> exactly
> 
> >The other approach I can think of is to have platform data tell us (I'm
> >guessing this is a bad idea).
> 
> yeah, that would be bad...
> 
> >What do you think?
> 
> another approach:
> 
> make ohci and ehci play well together

Yes - this is long overdue and work in progress.

> have an omap3-specific and one 
> omap4-specific MFD-like driver that will instantiate ehci and ohci 
> platform_drivers and handle clock + locking to shared address space.
> 
> then you define a set of accessor functions for registers with different 
> offset that act differently depending on revision of the ip core.
> 
> Does that work ?

The shared address spaces need to be configured once at init - their values
are board dependent and wouldn't need to be changed at runtime.

This should work. We'll work on it.

- Anand

Re: [RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Felipe Balbi]

On Fri, Aug 20, 2010 at 07:59:16AM +0200, ext Gadiyar, Anand wrote:
>Felipe Balbi wrote:
>> On Thu, Aug 19, 2010 at 01:49:36AM +0200, ext Keshava Munegowda wrote:
>> >@@ -126,6 +126,14 @@ config USB_EHCI_MXC
>> > 	---help---
>> > 	  Variation of ARC USB block used in some Freescale chips.
>> >
>> >+config USB_EHCI_HCD_OMAP3
>> >+	bool "EHCI support for OMAP3 and later chips"
>> >+	depends on USB_EHCI_HCD && (ARCH_OMAP3 || ARCH_OMAP4)
>>
>> this line doesn't scale. When we have another omap release this will
>> become e.g. ARCH_OMAP3 || ARCH_OMAP4 || ARCH_OMAP5 || ARCH_OMAP6 etc
>> etc, so instead of depending on ARCH_OMAPX, depend only on ARCH_OMAP and
>> make the architecture select the USB_ARCH_HAS_EHCI like this:
>
>ARCH_OMAP includes OMAP1/2, and these chips do not have any EHCI controllers.
>
>Is this okay?

as long as noone selects USB_ARCH_HAS_EHCI for omap1/2 it's fine.

-- 
balbi

DefectiveByDesign.org
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RE: [RFC] [PATCH 3/7] usb: ehci-omap: omap: Add OMAP4 support

[Gadiyar, Anand]

Felipe Balbi wrote:
> Hi,
> 
> On Fri, Aug 20, 2010 at 07:47:07AM +0200, ext Gadiyar, Anand wrote:
> >The differences between OMAP3 and OMAP4 are:
> >- The OMAP4 has a different set of clocks which do not exist 
> on OMAP3.
> >- The register bits for configuring port modes is different
> 
> is it a different ip core or just a modification of the previous ?
> 

Newer revision of the same core. But the revision registers have
completely different values. Good enough to distinguish between
the cores.

- Anand


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RE: [RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Gadiyar, Anand]

Felipe Balbi wrote:
> >> >@@ -126,6 +126,14 @@ config USB_EHCI_MXC
> >> > 	---help---
> >> > 	  Variation of ARC USB block used in some Freescale chips.
> >> >
> >> >+config USB_EHCI_HCD_OMAP3
> >> >+	bool "EHCI support for OMAP3 and later chips"
> >> >+	depends on USB_EHCI_HCD && (ARCH_OMAP3 || ARCH_OMAP4)
> >>
> >> this line doesn't scale. When we have another omap release this will
> >> become e.g. ARCH_OMAP3 || ARCH_OMAP4 || ARCH_OMAP5 || ARCH_OMAP6 etc
> >> etc, so instead of depending on ARCH_OMAPX, depend only on ARCH_OMAP and
> >> make the architecture select the USB_ARCH_HAS_EHCI like this:
> >
> >ARCH_OMAP includes OMAP1/2, and these chips do not have any EHCI controllers.
> >
> >Is this okay?
> 
> as long as noone selects USB_ARCH_HAS_EHCI for omap1/2 it's fine.
> 

We have the ability to support OMAP2 and OMAP3 in the same kernel
image (for example when you build with omap3_defconfig).

So USB_ARCH_HAS_EHCI will get selected due to OMAP3 being present.

However, no platform devices will be registered in the OMAP2 board files,
so this should be okay (will try this on OMAP2 to check).

- Anand

Re: [RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Felipe Balbi]

On Fri, Aug 20, 2010 at 08:32:04AM +0200, ext Gadiyar, Anand wrote:
>We have the ability to support OMAP2 and OMAP3 in the same kernel
>image (for example when you build with omap3_defconfig).
>
>So USB_ARCH_HAS_EHCI will get selected due to OMAP3 being present.
>
>However, no platform devices will be registered in the OMAP2 board files,
>so this should be okay (will try this on OMAP2 to check).

correct :-) so it shouldn't be a problem the driver won't try to probe.

-- 
balbi

DefectiveByDesign.org

RE: [RFC] [PATCH 6/7] usb: ehci: Introduce CONFIG_USB_EHCI_HCD_OMAP3

[Menon, Nishanth]

> -----Original Message-----
> From: linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org 
> [mailto:linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf Of Felipe Balbi
> Sent: Friday, August 20, 2010 4:14 AM
> To: Gadiyar, Anand
> Cc: Balbi Felipe (Nokia-MS/Helsinki); Munegowda, Keshava; 
> linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Subject: Re: [RFC] [PATCH 6/7] usb: ehci: Introduce 
> CONFIG_USB_EHCI_HCD_OMAP3
> 
> On Fri, Aug 20, 2010 at 08:32:04AM +0200, ext Gadiyar, Anand wrote:
> >We have the ability to support OMAP2 and OMAP3 in the same kernel
> >image (for example when you build with omap3_defconfig).
> >
> >So USB_ARCH_HAS_EHCI will get selected due to OMAP3 being present.
> >
> >However, no platform devices will be registered in the OMAP2 
> board files,
> >so this should be okay (will try this on OMAP2 to check).
> 
> correct :-) so it shouldn't be a problem the driver won't try 
> to probe.
> 
Curious - Oct 20th now - 2 months? - any chance of seeing a non RFC patch to 
l-o for the same?
https://patchwork.kernel.org/project/linux-omap/list/?page=1 does not show
me a refreshed patchset that will apply anymore.

Regards,
Nishanth Menon
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