From: Tony Lindgren <tony@atomide.com>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
bryan.wu@canonical.com
Subject: Re: [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Date: Tue, 21 Sep 2010 09:16:00 -0700 [thread overview]
Message-ID: <20100921161600.GT4611@atomide.com> (raw)
In-Reply-To: <20100914185907.GG8647@atomide.com>
* Tony Lindgren <tony@atomide.com> [100914 12:04]:
>
> Here's a patch for __flush_icache_all. I believe this is the last
> remaining patch we need.
>
> The only other thing I can think of are the conflicts with
> CONFIG_CPU_32v6K, on early ARM1136 and later ARM11 systems if somebody
> wants to compile a kernel that supports both. But that's not needed for
> omap2, so we can boot now omap2, 3 and 4 with a single defconfig :)
Here's an updated version with a typo fix s/fluch/flush/ from Anand.
Regards,
Tony
From: Tony Lindgren <tony@atomide.com>
Date: Mon, 20 Sep 2010 16:37:16 -0700
Subject: [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Do this by adding flush_icache_all to cache_fns for ARMv6 and 7.
As flush_icache_all may neeed to be called from flush_kern_cache_all,
add it as the first entry in the cache_fns.
Note that now we can remove the ARM_ERRATA_411920 dependency
to !SMP so it can be selected on UP ARMv6 processors, such
as omap2.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1017,7 +1017,7 @@ endif
config ARM_ERRATA_411920
bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
- depends on CPU_V6 && !SMP
+ depends on CPU_V6
help
Invalidation of the Instruction Cache operation can
fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -156,6 +156,12 @@
* Please note that the implementation of these, and the required
* effects are cache-type (VIVT/VIPT/PIPT) specific.
*
+ * flush_icache_all()
+ *
+ * Unconditionally clean and invalidate the entire icache.
+ * Currently only needed for cache-v6.S and cache-v7.S, see
+ * __flush_icache_all for the generic implementation.
+ *
* flush_kern_all()
*
* Unconditionally clean and invalidate the entire cache.
@@ -206,6 +212,7 @@
*/
struct cpu_cache_fns {
+ void (*flush_icache_all)(void);
void (*flush_kern_all)(void);
void (*flush_user_all)(void);
void (*flush_user_range)(unsigned long, unsigned long, unsigned int);
@@ -227,6 +234,7 @@ struct cpu_cache_fns {
extern struct cpu_cache_fns cpu_cache;
+#define __cpuc_flush_icache_all cpu_cache.flush_icache_all
#define __cpuc_flush_kern_all cpu_cache.flush_kern_all
#define __cpuc_flush_user_all cpu_cache.flush_user_all
#define __cpuc_flush_user_range cpu_cache.flush_user_range
@@ -246,6 +254,7 @@ extern struct cpu_cache_fns cpu_cache;
#else
+#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
@@ -253,6 +262,7 @@ extern struct cpu_cache_fns cpu_cache;
#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
+extern void __cpuc_flush_icache_all(void);
extern void __cpuc_flush_kern_all(void);
extern void __cpuc_flush_user_all(void);
extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int);
@@ -291,6 +301,37 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *,
/*
* Convert calls to our calling convention.
*/
+
+/* Invalidate I-cache */
+#define __flush_icache_all_generic() \
+ asm("mcr p15, 0, %0, c7, c5, 0" \
+ : : "r" (0));
+
+/* Invalidate I-cache inner shareable */
+#define __flush_icache_all_v7_smp() \
+ asm("mcr p15, 0, %0, c7, c1, 0" \
+ : : "r" (0));
+
+/*
+ * Optimized __flush_icache_all for the common cases. Note that UP ARMv7
+ * will fall through to use __flush_icache_all_generic.
+ */
+#if (defined(CONFIG_CPU_V7) && defined(CONFIG_CPU_V6)) || \
+ defined(CONFIG_SMP_ON_UP)
+#define __flush_icache_preferred __cpuc_flush_icache_all
+#elif __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
+#define __flush_icache_preferred __flush_icache_all_v7_smp
+#elif __LINUX_ARM_ARCH__ == 6 && defined(CONFIG_ARM_ERRATA_411920)
+#define __flush_icache_preferred __cpuc_flush_icache_all
+#else
+#define __flush_icache_preferred __flush_icache_all_generic
+#endif
+
+static inline void __flush_icache_all(void)
+{
+ __flush_icache_preferred();
+}
+
#define flush_cache_all() __cpuc_flush_kern_all()
static inline void vivt_flush_cache_mm(struct mm_struct *mm)
@@ -366,21 +407,6 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
extern void flush_dcache_page(struct page *);
-static inline void __flush_icache_all(void)
-{
-#ifdef CONFIG_ARM_ERRATA_411920
- extern void v6_icache_inval_all(void);
- v6_icache_inval_all();
-#elif defined(CONFIG_SMP) && __LINUX_ARM_ARCH__ >= 7
- asm("mcr p15, 0, %0, c7, c1, 0 @ invalidate I-cache inner shareable\n"
- :
- : "r" (0));
-#else
- asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
- :
- : "r" (0));
-#endif
-}
static inline void flush_kernel_vmap_range(void *addr, int size)
{
if ((cache_is_vivt() || cache_is_vipt_aliasing()))
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -21,18 +21,22 @@
#define D_CACHE_LINE_SIZE 32
#define BTB_FLUSH_SIZE 8
-#ifdef CONFIG_ARM_ERRATA_411920
/*
- * Invalidate the entire I cache (this code is a workaround for the ARM1136
- * erratum 411920 - Invalidate Instruction Cache operation can fail. This
- * erratum is present in 1136, 1156 and 1176. It does not affect the MPCore.
+ * v6_flush_icache_all()
+ *
+ * Flush the whole I-cache.
*
- * Registers:
- * r0 - set to 0
- * r1 - corrupted
+ * ARM1136 erratum 411920 - Invalidate Instruction Cache operation can fail.
+ * This erratum is present in 1136, 1156 and 1176. It does not affect the
+ * MPCore.
+ *
+ * Registers:
+ * r0 - set to 0
+ * r1 - corrupted
*/
-ENTRY(v6_icache_inval_all)
+ENTRY(v6_flush_icache_all)
mov r0, #0
+#ifdef CONFIG_ARM_ERRATA_411920
mrs r1, cpsr
cpsid ifa @ disable interrupts
mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
@@ -43,8 +47,11 @@ ENTRY(v6_icache_inval_all)
.rept 11 @ ARM Ltd recommends at least
nop @ 11 NOPs
.endr
- mov pc, lr
+#else
+ mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
#endif
+ mov pc, lr
+ENDPROC(v6_flush_icache_all)
/*
* v6_flush_cache_all()
@@ -60,7 +67,7 @@ ENTRY(v6_flush_kern_cache_all)
#ifndef CONFIG_ARM_ERRATA_411920
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
#else
- b v6_icache_inval_all
+ b v6_flush_icache_all
#endif
#else
mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate
@@ -138,7 +145,7 @@ ENTRY(v6_coherent_user_range)
#ifndef CONFIG_ARM_ERRATA_411920
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
#else
- b v6_icache_inval_all
+ b v6_flush_icache_all
#endif
#else
mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
@@ -312,6 +319,7 @@ ENDPROC(v6_dma_unmap_area)
.type v6_cache_fns, #object
ENTRY(v6_cache_fns)
+ .long v6_flush_icache_all
.long v6_flush_kern_cache_all
.long v6_flush_user_cache_all
.long v6_flush_user_cache_range
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -18,6 +18,21 @@
#include "proc-macros.S"
/*
+ * v7_flush_icache_all()
+ *
+ * Flush the whole I-cache.
+ *
+ * Registers:
+ * r0 - set to 0
+ */
+ENTRY(v7_flush_icache_all)
+ mov r0, #0
+ ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable
+ ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
+ mov pc, lr
+ENDPROC(v7_flush_icache_all)
+
+/*
* v7_flush_dcache_all()
*
* Flush the whole D-cache.
@@ -303,6 +318,7 @@ ENDPROC(v7_dma_unmap_area)
.type v7_cache_fns, #object
ENTRY(v7_cache_fns)
+ .long v7_flush_icache_all
.long v7_flush_kern_cache_all
.long v7_flush_user_cache_all
.long v7_flush_user_cache_range
WARNING: multiple messages have this Message-ID (diff)
From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Date: Tue, 21 Sep 2010 09:16:00 -0700 [thread overview]
Message-ID: <20100921161600.GT4611@atomide.com> (raw)
In-Reply-To: <20100914185907.GG8647@atomide.com>
* Tony Lindgren <tony@atomide.com> [100914 12:04]:
>
> Here's a patch for __flush_icache_all. I believe this is the last
> remaining patch we need.
>
> The only other thing I can think of are the conflicts with
> CONFIG_CPU_32v6K, on early ARM1136 and later ARM11 systems if somebody
> wants to compile a kernel that supports both. But that's not needed for
> omap2, so we can boot now omap2, 3 and 4 with a single defconfig :)
Here's an updated version with a typo fix s/fluch/flush/ from Anand.
Regards,
Tony
From: Tony Lindgren <tony@atomide.com>
Date: Mon, 20 Sep 2010 16:37:16 -0700
Subject: [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Do this by adding flush_icache_all to cache_fns for ARMv6 and 7.
As flush_icache_all may neeed to be called from flush_kern_cache_all,
add it as the first entry in the cache_fns.
Note that now we can remove the ARM_ERRATA_411920 dependency
to !SMP so it can be selected on UP ARMv6 processors, such
as omap2.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1017,7 +1017,7 @@ endif
config ARM_ERRATA_411920
bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
- depends on CPU_V6 && !SMP
+ depends on CPU_V6
help
Invalidation of the Instruction Cache operation can
fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -156,6 +156,12 @@
* Please note that the implementation of these, and the required
* effects are cache-type (VIVT/VIPT/PIPT) specific.
*
+ * flush_icache_all()
+ *
+ * Unconditionally clean and invalidate the entire icache.
+ * Currently only needed for cache-v6.S and cache-v7.S, see
+ * __flush_icache_all for the generic implementation.
+ *
* flush_kern_all()
*
* Unconditionally clean and invalidate the entire cache.
@@ -206,6 +212,7 @@
*/
struct cpu_cache_fns {
+ void (*flush_icache_all)(void);
void (*flush_kern_all)(void);
void (*flush_user_all)(void);
void (*flush_user_range)(unsigned long, unsigned long, unsigned int);
@@ -227,6 +234,7 @@ struct cpu_cache_fns {
extern struct cpu_cache_fns cpu_cache;
+#define __cpuc_flush_icache_all cpu_cache.flush_icache_all
#define __cpuc_flush_kern_all cpu_cache.flush_kern_all
#define __cpuc_flush_user_all cpu_cache.flush_user_all
#define __cpuc_flush_user_range cpu_cache.flush_user_range
@@ -246,6 +254,7 @@ extern struct cpu_cache_fns cpu_cache;
#else
+#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
@@ -253,6 +262,7 @@ extern struct cpu_cache_fns cpu_cache;
#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
+extern void __cpuc_flush_icache_all(void);
extern void __cpuc_flush_kern_all(void);
extern void __cpuc_flush_user_all(void);
extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int);
@@ -291,6 +301,37 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *,
/*
* Convert calls to our calling convention.
*/
+
+/* Invalidate I-cache */
+#define __flush_icache_all_generic() \
+ asm("mcr p15, 0, %0, c7, c5, 0" \
+ : : "r" (0));
+
+/* Invalidate I-cache inner shareable */
+#define __flush_icache_all_v7_smp() \
+ asm("mcr p15, 0, %0, c7, c1, 0" \
+ : : "r" (0));
+
+/*
+ * Optimized __flush_icache_all for the common cases. Note that UP ARMv7
+ * will fall through to use __flush_icache_all_generic.
+ */
+#if (defined(CONFIG_CPU_V7) && defined(CONFIG_CPU_V6)) || \
+ defined(CONFIG_SMP_ON_UP)
+#define __flush_icache_preferred __cpuc_flush_icache_all
+#elif __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
+#define __flush_icache_preferred __flush_icache_all_v7_smp
+#elif __LINUX_ARM_ARCH__ == 6 && defined(CONFIG_ARM_ERRATA_411920)
+#define __flush_icache_preferred __cpuc_flush_icache_all
+#else
+#define __flush_icache_preferred __flush_icache_all_generic
+#endif
+
+static inline void __flush_icache_all(void)
+{
+ __flush_icache_preferred();
+}
+
#define flush_cache_all() __cpuc_flush_kern_all()
static inline void vivt_flush_cache_mm(struct mm_struct *mm)
@@ -366,21 +407,6 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
extern void flush_dcache_page(struct page *);
-static inline void __flush_icache_all(void)
-{
-#ifdef CONFIG_ARM_ERRATA_411920
- extern void v6_icache_inval_all(void);
- v6_icache_inval_all();
-#elif defined(CONFIG_SMP) && __LINUX_ARM_ARCH__ >= 7
- asm("mcr p15, 0, %0, c7, c1, 0 @ invalidate I-cache inner shareable\n"
- :
- : "r" (0));
-#else
- asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
- :
- : "r" (0));
-#endif
-}
static inline void flush_kernel_vmap_range(void *addr, int size)
{
if ((cache_is_vivt() || cache_is_vipt_aliasing()))
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -21,18 +21,22 @@
#define D_CACHE_LINE_SIZE 32
#define BTB_FLUSH_SIZE 8
-#ifdef CONFIG_ARM_ERRATA_411920
/*
- * Invalidate the entire I cache (this code is a workaround for the ARM1136
- * erratum 411920 - Invalidate Instruction Cache operation can fail. This
- * erratum is present in 1136, 1156 and 1176. It does not affect the MPCore.
+ * v6_flush_icache_all()
+ *
+ * Flush the whole I-cache.
*
- * Registers:
- * r0 - set to 0
- * r1 - corrupted
+ * ARM1136 erratum 411920 - Invalidate Instruction Cache operation can fail.
+ * This erratum is present in 1136, 1156 and 1176. It does not affect the
+ * MPCore.
+ *
+ * Registers:
+ * r0 - set to 0
+ * r1 - corrupted
*/
-ENTRY(v6_icache_inval_all)
+ENTRY(v6_flush_icache_all)
mov r0, #0
+#ifdef CONFIG_ARM_ERRATA_411920
mrs r1, cpsr
cpsid ifa @ disable interrupts
mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
@@ -43,8 +47,11 @@ ENTRY(v6_icache_inval_all)
.rept 11 @ ARM Ltd recommends at least
nop @ 11 NOPs
.endr
- mov pc, lr
+#else
+ mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
#endif
+ mov pc, lr
+ENDPROC(v6_flush_icache_all)
/*
* v6_flush_cache_all()
@@ -60,7 +67,7 @@ ENTRY(v6_flush_kern_cache_all)
#ifndef CONFIG_ARM_ERRATA_411920
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
#else
- b v6_icache_inval_all
+ b v6_flush_icache_all
#endif
#else
mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate
@@ -138,7 +145,7 @@ ENTRY(v6_coherent_user_range)
#ifndef CONFIG_ARM_ERRATA_411920
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
#else
- b v6_icache_inval_all
+ b v6_flush_icache_all
#endif
#else
mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
@@ -312,6 +319,7 @@ ENDPROC(v6_dma_unmap_area)
.type v6_cache_fns, #object
ENTRY(v6_cache_fns)
+ .long v6_flush_icache_all
.long v6_flush_kern_cache_all
.long v6_flush_user_cache_all
.long v6_flush_user_cache_range
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -18,6 +18,21 @@
#include "proc-macros.S"
/*
+ * v7_flush_icache_all()
+ *
+ * Flush the whole I-cache.
+ *
+ * Registers:
+ * r0 - set to 0
+ */
+ENTRY(v7_flush_icache_all)
+ mov r0, #0
+ ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable
+ ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
+ mov pc, lr
+ENDPROC(v7_flush_icache_all)
+
+/*
* v7_flush_dcache_all()
*
* Flush the whole D-cache.
@@ -303,6 +318,7 @@ ENDPROC(v7_dma_unmap_area)
.type v7_cache_fns, #object
ENTRY(v7_cache_fns)
+ .long v7_flush_icache_all
.long v7_flush_kern_cache_all
.long v7_flush_user_cache_all
.long v7_flush_user_cache_range
next prev parent reply other threads:[~2010-09-21 16:16 UTC|newest]
Thread overview: 230+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-08-17 10:53 [PATCH 0/4] Hacks to allow booting ARM SMP kernel on UP ARMv7 Tony Lindgren
2010-08-17 10:53 ` Tony Lindgren
2010-08-17 10:53 ` [PATCH 1/4] ARM: Add SMP_ON_UP Kconfig option for booting SMP kernel on UP Tony Lindgren
2010-08-17 10:53 ` Tony Lindgren
2010-08-17 10:53 ` [PATCH 2/4] ARM: Allow optional UP processor functions for SMP kernels Tony Lindgren
2010-08-17 10:53 ` Tony Lindgren
2010-08-17 11:08 ` Russell King - ARM Linux
2010-08-17 11:08 ` Russell King - ARM Linux
2010-08-17 11:20 ` Tony Lindgren
2010-08-17 11:20 ` Tony Lindgren
2010-08-17 10:53 ` [PATCH 3/4] ARM: Set separate proc-v7 functions for SMP Tony Lindgren
2010-08-17 10:53 ` Tony Lindgren
2010-08-17 10:53 ` [PATCH 4/4] omap: Fix SMP on UP interrupt handling for multi-omap Tony Lindgren
2010-08-17 10:53 ` Tony Lindgren
2010-08-17 11:07 ` srinidhi
2010-08-17 11:07 ` srinidhi
2010-08-17 11:30 ` Tony Lindgren
2010-08-17 11:30 ` Tony Lindgren
2010-08-17 12:14 ` srinidhi
2010-08-17 12:14 ` srinidhi
2010-08-17 14:14 ` Tony Lindgren
2010-08-17 14:14 ` Tony Lindgren
2010-08-17 15:07 ` Shilimkar, Santosh
2010-08-17 15:07 ` Shilimkar, Santosh
2010-09-02 16:27 ` Tony Lindgren
2010-09-02 16:27 ` Tony Lindgren
2010-08-17 13:52 ` [PATCH 0/4] Hacks to allow booting ARM SMP kernel on UP ARMv7 Russell King - ARM Linux
2010-08-17 13:52 ` Russell King - ARM Linux
2010-08-17 14:12 ` Tony Lindgren
2010-08-17 14:12 ` Tony Lindgren
2010-08-17 15:40 ` Russell King - ARM Linux
2010-08-17 15:40 ` Russell King - ARM Linux
2010-08-19 7:38 ` Tony Lindgren
2010-08-19 7:38 ` Tony Lindgren
2010-08-19 9:38 ` Bryan Wu
2010-08-19 9:38 ` Bryan Wu
2010-08-19 9:57 ` Tony Lindgren
2010-08-19 9:57 ` Tony Lindgren
2010-08-19 10:20 ` Russell King - ARM Linux
2010-08-19 10:20 ` Russell King - ARM Linux
2010-08-20 12:06 ` Tony Lindgren
2010-08-20 12:06 ` Tony Lindgren
2010-08-30 22:55 ` Tony Lindgren
2010-08-30 22:55 ` Tony Lindgren
2010-09-02 13:36 ` Russell King - ARM Linux
2010-09-02 13:36 ` Russell King - ARM Linux
2010-09-02 16:16 ` Tony Lindgren
2010-09-02 16:16 ` Tony Lindgren
2010-09-02 16:18 ` [PATCH 1/6] ARM: Add inline function smp_on_up() for early init testing Tony Lindgren
2010-09-02 16:18 ` Tony Lindgren
2010-09-02 17:08 ` Russell King - ARM Linux
2010-09-02 17:08 ` Russell King - ARM Linux
2010-09-02 17:15 ` [PATCH 0/6] " Tony Lindgren
2010-09-02 17:15 ` Tony Lindgren
2010-09-02 17:42 ` [PATCH 1/6] " Tony Lindgren
2010-09-02 17:42 ` Tony Lindgren
2010-09-02 19:26 ` [PATCH 1/6] ARM: Add inline function smp_cpu() " Tony Lindgren
2010-09-02 19:26 ` Tony Lindgren
2010-09-03 0:08 ` Tony Lindgren
2010-09-03 0:08 ` Tony Lindgren
2010-09-03 2:22 ` Tony Lindgren
2010-09-03 2:22 ` Tony Lindgren
2010-09-03 8:58 ` Will Deacon
2010-09-03 9:02 ` Russell King - ARM Linux
2010-09-03 9:02 ` Russell King - ARM Linux
2010-09-03 9:07 ` Will Deacon
2010-09-03 9:07 ` Will Deacon
2010-09-03 8:58 ` Will Deacon
2010-09-03 12:12 ` Shilimkar, Santosh
2010-09-03 12:12 ` Shilimkar, Santosh
2010-09-03 12:23 ` Will Deacon
2010-09-03 12:23 ` Will Deacon
2010-09-03 12:31 ` Shilimkar, Santosh
2010-09-03 12:31 ` Shilimkar, Santosh
2010-09-05 1:53 ` Michał Nazarewicz
2010-09-05 1:53 ` Michał Nazarewicz
2010-09-03 12:09 ` [PATCH 1/6] ARM: Add inline function smp_on_up() " Shilimkar, Santosh
2010-09-03 12:09 ` Shilimkar, Santosh
2010-09-06 10:17 ` Bryan Wu
2010-09-06 10:17 ` Bryan Wu
2010-09-08 3:26 ` Tony Lindgren
2010-09-08 3:26 ` Tony Lindgren
2010-09-08 20:26 ` Tony Lindgren
2010-09-08 20:26 ` Tony Lindgren
2010-09-09 3:45 ` Bryan Wu
2010-09-09 3:45 ` Bryan Wu
2010-09-02 16:19 ` [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush Tony Lindgren
2010-09-02 16:19 ` Tony Lindgren
2010-09-03 11:57 ` Shilimkar, Santosh
2010-09-03 11:57 ` Shilimkar, Santosh
2010-09-04 10:57 ` Russell King - ARM Linux
2010-09-04 10:57 ` Russell King - ARM Linux
2010-09-04 11:01 ` Shilimkar, Santosh
2010-09-04 11:01 ` Shilimkar, Santosh
2010-09-02 16:20 ` [PATCH 3/6] ARM: Fix v7wbi_tlb_flags for SMP on UP Tony Lindgren
2010-09-02 16:20 ` Tony Lindgren
2010-09-02 16:25 ` Russell King - ARM Linux
2010-09-02 16:25 ` Russell King - ARM Linux
2010-09-02 16:34 ` Tony Lindgren
2010-09-02 16:34 ` Tony Lindgren
2010-09-02 23:47 ` Tony Lindgren
2010-09-02 23:47 ` Tony Lindgren
2010-09-03 9:07 ` Russell King - ARM Linux
2010-09-03 9:07 ` Russell King - ARM Linux
2010-09-03 9:10 ` Russell King - ARM Linux
2010-09-03 9:10 ` Russell King - ARM Linux
2010-09-03 17:04 ` Tony Lindgren
2010-09-03 17:04 ` Tony Lindgren
2010-09-03 19:36 ` Russell King - ARM Linux
2010-09-03 19:36 ` Russell King - ARM Linux
2010-09-06 11:46 ` Catalin Marinas
2010-09-06 11:46 ` Catalin Marinas
2010-09-06 15:34 ` Russell King - ARM Linux
2010-09-06 15:34 ` Russell King - ARM Linux
2010-09-06 15:53 ` Catalin Marinas
2010-09-06 15:53 ` Catalin Marinas
2010-09-06 16:36 ` Russell King - ARM Linux
2010-09-06 16:36 ` Russell King - ARM Linux
2010-09-06 17:11 ` Catalin Marinas
2010-09-06 17:11 ` Catalin Marinas
2010-09-02 16:21 ` [PATCH 4/6] ARM: Do not call test_for_ipi or test_for_ltrirq on UP systems Tony Lindgren
2010-09-02 16:21 ` Tony Lindgren
2010-09-03 12:00 ` Shilimkar, Santosh
2010-09-03 12:00 ` Shilimkar, Santosh
2010-09-04 10:55 ` Russell King - ARM Linux
2010-09-04 10:55 ` Russell King - ARM Linux
2010-09-04 10:55 ` Russell King - ARM Linux
2010-09-04 10:55 ` Russell King - ARM Linux
2010-09-02 16:22 ` [PATCH 5/6] ARM: Don't set TLB ops broadcasting on UP ARMv7 Tony Lindgren
2010-09-02 16:22 ` Tony Lindgren
2010-09-02 16:57 ` Russell King - ARM Linux
2010-09-02 16:57 ` Russell King - ARM Linux
2010-09-02 17:21 ` Tony Lindgren
2010-09-02 17:21 ` Tony Lindgren
2010-09-02 18:01 ` Russell King - ARM Linux
2010-09-02 18:01 ` Russell King - ARM Linux
2010-09-02 18:13 ` Tony Lindgren
2010-09-02 18:13 ` Tony Lindgren
2010-09-02 18:18 ` Russell King - ARM Linux
2010-09-02 18:18 ` Russell King - ARM Linux
2010-09-02 16:23 ` [PATCH 6/6] omap: Fix SMP on UP interrupt handling for multi-omap Tony Lindgren
2010-09-02 16:23 ` Tony Lindgren
2010-09-02 19:30 ` Tony Lindgren
2010-09-02 19:30 ` Tony Lindgren
2010-09-03 12:15 ` Shilimkar, Santosh
2010-09-03 12:15 ` Shilimkar, Santosh
2010-09-08 3:30 ` Tony Lindgren
2010-09-08 3:30 ` Tony Lindgren
2010-09-03 12:06 ` Shilimkar, Santosh
2010-09-03 12:06 ` Shilimkar, Santosh
2010-09-04 11:05 ` Russell King - ARM Linux
2010-09-04 11:05 ` Russell King - ARM Linux
2010-09-04 11:22 ` Shilimkar, Santosh
2010-09-04 11:22 ` Shilimkar, Santosh
2010-09-03 4:20 ` [PATCH 0/4] Hacks to allow booting ARM SMP kernel on UP ARMv7 Bryan Wu
2010-09-03 4:20 ` Bryan Wu
2010-09-03 7:46 ` Russell King - ARM Linux
2010-09-03 7:46 ` Russell King - ARM Linux
2010-09-06 9:28 ` Catalin Marinas
2010-09-06 9:28 ` Catalin Marinas
2010-09-06 9:34 ` Russell King - ARM Linux
2010-09-06 9:34 ` Russell King - ARM Linux
2010-09-06 9:38 ` Catalin Marinas
2010-09-06 9:38 ` Catalin Marinas
2010-09-06 10:06 ` Russell King - ARM Linux
2010-09-06 10:06 ` Russell King - ARM Linux
2010-09-06 10:39 ` Catalin Marinas
2010-09-06 10:39 ` Catalin Marinas
2010-09-02 13:33 ` Russell King - ARM Linux
2010-09-02 13:33 ` Russell King - ARM Linux
2010-09-03 1:39 ` Tony Lindgren
2010-09-03 1:39 ` Tony Lindgren
2010-08-23 16:59 ` Will Deacon
2010-08-23 16:59 ` Will Deacon
2010-08-30 22:53 ` Tony Lindgren
2010-08-30 22:53 ` Tony Lindgren
2010-09-06 10:44 ` Russell King - ARM Linux
2010-09-06 10:44 ` Russell King - ARM Linux
2010-09-06 15:16 ` Catalin Marinas
2010-09-06 15:16 ` Catalin Marinas
2010-09-06 18:03 ` Tony Lindgren
2010-09-06 18:03 ` Tony Lindgren
2010-09-08 3:09 ` Tony Lindgren
2010-09-08 3:09 ` Tony Lindgren
2010-09-08 3:12 ` [PATCH] ARM: Check for is_smp for tlb_ops and cache_ops boardcast Tony Lindgren
2010-09-08 3:12 ` Tony Lindgren
2010-09-08 3:14 ` [PATCH] ARM: Don't try to send IPI on UP systems with CONFIG_SMP Tony Lindgren
2010-09-08 3:14 ` Tony Lindgren
2010-09-08 3:17 ` [PATCH] omap: Fix CONFIG_LOCAL_TIMERS initialization for multi-omap Tony Lindgren
2010-09-08 3:17 ` Tony Lindgren
2010-09-08 7:26 ` Shilimkar, Santosh
2010-09-08 7:26 ` Shilimkar, Santosh
2010-09-08 7:30 ` [PATCH] ARM: Don't try to send IPI on UP systems with CONFIG_SMP Shilimkar, Santosh
2010-09-08 7:30 ` Shilimkar, Santosh
2010-09-08 8:56 ` Russell King - ARM Linux
2010-09-08 8:56 ` Russell King - ARM Linux
2010-09-08 19:32 ` Tony Lindgren
2010-09-08 19:32 ` Tony Lindgren
2010-10-05 22:19 ` [PATCH] ARM: Check for is_smp for tlb_ops and cache_ops boardcast Tony Lindgren
2010-10-05 22:19 ` Tony Lindgren
2010-10-05 22:33 ` Russell King - ARM Linux
2010-10-05 22:33 ` Russell King - ARM Linux
2010-10-06 14:44 ` Tony Lindgren
2010-10-06 14:44 ` Tony Lindgren
2010-10-06 22:33 ` Russell King - ARM Linux
2010-10-06 22:33 ` Russell King - ARM Linux
2010-10-06 23:07 ` Tony Lindgren
2010-10-06 23:07 ` Tony Lindgren
2010-09-14 18:59 ` [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP Tony Lindgren
2010-09-14 18:59 ` Tony Lindgren
2010-09-14 19:03 ` [PATCH] omap: Update omap3_defconfig to work with SMP_ON_UP Tony Lindgren
2010-09-14 19:03 ` Tony Lindgren
2010-09-14 19:05 ` [PATCH] omap: Update omap3_defconfig for omap2 Tony Lindgren
2010-09-14 19:05 ` Tony Lindgren
2010-09-14 19:17 ` [PATCH] omap: Update omap3_defconfig to work with SMP_ON_UP Shilimkar, Santosh
2010-09-14 19:17 ` Shilimkar, Santosh
2010-09-14 20:27 ` Tony Lindgren
2010-09-14 20:27 ` Tony Lindgren
2010-09-15 6:11 ` Shilimkar, Santosh
2010-09-15 6:11 ` Shilimkar, Santosh
2010-09-15 16:11 ` Tony Lindgren
2010-09-15 16:11 ` Tony Lindgren
2010-09-15 18:25 ` Shilimkar, Santosh
2010-09-15 18:25 ` Shilimkar, Santosh
2010-09-15 23:15 ` Tony Lindgren
2010-09-15 23:15 ` Tony Lindgren
2010-09-16 17:05 ` [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP Catalin Marinas
2010-09-16 17:05 ` Catalin Marinas
2010-09-21 16:16 ` Tony Lindgren [this message]
2010-09-21 16:16 ` Tony Lindgren
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