[PATCH 01/54] ARM: core irq_data conversion.

[PATCH 01/54] ARM: core irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/kernel/irq.c     |   17 ++++++++++-------
 arch/arm/kernel/smp_twd.c |    2 +-
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 36ad3be..f4333c2 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -79,7 +79,7 @@ int show_interrupts(struct seq_file *p, void *v)
 		seq_printf(p, "%3d: ", i);
 		for_each_present_cpu(cpu)
 			seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
-		seq_printf(p, " %10s", desc->chip->name ? : "-");
+		seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-");
 		seq_printf(p, "  %s", action->name);
 		for (action = action->next; action; action = action->next)
 			seq_printf(p, ", %s", action->name);
@@ -169,10 +169,11 @@ int __init arch_probe_nr_irqs(void)
 
 static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
 {
-	pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->node, cpu);
+	pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->irq_data.node, cpu);
 
 	raw_spin_lock_irq(&desc->lock);
-	desc->chip->set_affinity(irq, cpumask_of(cpu));
+	desc->irq_data.chip->irq_set_affinity(&desc->irq_data,
+					      cpumask_of(cpu), false);
 	raw_spin_unlock_irq(&desc->lock);
 }
 
@@ -187,16 +188,18 @@ void migrate_irqs(void)
 	struct irq_desc *desc;
 
 	for_each_irq_desc(i, desc) {
-		if (desc->node == cpu) {
-			unsigned int newcpu = cpumask_any_and(desc->affinity,
+		struct irq_data *d = &desc->irq_data;
+
+		if (d->node == cpu) {
+			unsigned int newcpu = cpumask_any_and(d->affinity,
 							      cpu_online_mask);
 			if (newcpu >= nr_cpu_ids) {
 				if (printk_ratelimit())
 					printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
 					       i, cpu);
 
-				cpumask_setall(desc->affinity);
-				newcpu = cpumask_any_and(desc->affinity,
+				cpumask_setall(d->affinity);
+				newcpu = cpumask_any_and(d->affinity,
 							 cpu_online_mask);
 			}
 
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 35882fb..a0742eb 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -145,7 +145,7 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
 	/* Make sure our local interrupt controller has this enabled */
 	local_irq_save(flags);
 	irq_to_desc(clk->irq)->status |= IRQ_NOPROBE;
-	get_irq_chip(clk->irq)->unmask(clk->irq);
+	get_irq_chip(clk->irq)->irq_unmask(irq_get_irq_data(clk->irq));
 	local_irq_restore(flags);
 
 	clockevents_register_device(clk);
-- 
1.7.1

[PATCH 02/54] ARM: ecard: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/kernel/ecard.c |   28 ++++++++++++++--------------
 1 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index eed2f79..2ad62df 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -443,40 +443,40 @@ static expansioncard_ops_t ecard_default_ops = {
  *
  * They are not meant to be called directly, but via enable/disable_irq.
  */
-static void ecard_irq_unmask(unsigned int irqnr)
+static void ecard_irq_unmask(struct irq_data *d)
 {
-	ecard_t *ec = slot_to_ecard(irqnr - 32);
+	ecard_t *ec = slot_to_ecard(d->irq - 32);
 
 	if (ec) {
 		if (!ec->ops)
 			ec->ops = &ecard_default_ops;
 
 		if (ec->claimed && ec->ops->irqenable)
-			ec->ops->irqenable(ec, irqnr);
+			ec->ops->irqenable(ec, d->irq);
 		else
 			printk(KERN_ERR "ecard: rejecting request to "
-				"enable IRQs for %d\n", irqnr);
+				"enable IRQs for %d\n", d->irq);
 	}
 }
 
-static void ecard_irq_mask(unsigned int irqnr)
+static void ecard_irq_mask(struct irq_data *d)
 {
-	ecard_t *ec = slot_to_ecard(irqnr - 32);
+	ecard_t *ec = slot_to_ecard(d->irq - 32);
 
 	if (ec) {
 		if (!ec->ops)
 			ec->ops = &ecard_default_ops;
 
 		if (ec->ops && ec->ops->irqdisable)
-			ec->ops->irqdisable(ec, irqnr);
+			ec->ops->irqdisable(ec, d->irq);
 	}
 }
 
 static struct irq_chip ecard_chip = {
-	.name	= "ECARD",
-	.ack	= ecard_irq_mask,
-	.mask	= ecard_irq_mask,
-	.unmask = ecard_irq_unmask,
+	.name		= "ECARD",
+	.irq_ack	= ecard_irq_mask,
+	.irq_mask	= ecard_irq_mask,
+	.irq_unmask	= ecard_irq_unmask,
 };
 
 void ecard_enablefiq(unsigned int fiqnr)
@@ -551,7 +551,7 @@ static void ecard_check_lockup(struct irq_desc *desc)
 			printk(KERN_ERR "\nInterrupt lockup detected - "
 			       "disabling all expansion card interrupts\n");
 
-			desc->chip->mask(IRQ_EXPANSIONCARD);
+			desc->irq_data.chip->irq_mask(&desc->irq_data);
 			ecard_dump_irq_state();
 		}
 	} else
@@ -574,7 +574,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
 	ecard_t *ec;
 	int called = 0;
 
-	desc->chip->mask(irq);
+	desc->irq_data.chip->irq_mask(&desc->irq_data);
 	for (ec = cards; ec; ec = ec->next) {
 		int pending;
 
@@ -591,7 +591,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
 			called ++;
 		}
 	}
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 
 	if (called == 0)
 		ecard_check_lockup(desc);
-- 
1.7.1

[PATCH 03/54] ARM: gic: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/common/gic.c |   62 ++++++++++++++++++++++++------------------------
 1 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 772f95f..1118f40 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -47,57 +47,56 @@ struct gic_chip_data {
 
 static struct gic_chip_data gic_data[MAX_GIC_NR];
 
-static inline void __iomem *gic_dist_base(unsigned int irq)
+static inline void __iomem *gic_dist_base(struct irq_data *d)
 {
-	struct gic_chip_data *gic_data = get_irq_chip_data(irq);
+	struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
 	return gic_data->dist_base;
 }
 
-static inline void __iomem *gic_cpu_base(unsigned int irq)
+static inline void __iomem *gic_cpu_base(struct irq_data *d)
 {
-	struct gic_chip_data *gic_data = get_irq_chip_data(irq);
+	struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
 	return gic_data->cpu_base;
 }
 
-static inline unsigned int gic_irq(unsigned int irq)
+static inline unsigned int gic_irq(struct irq_data *d)
 {
-	struct gic_chip_data *gic_data = get_irq_chip_data(irq);
-	return irq - gic_data->irq_offset;
+	struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
+	return d->irq - gic_data->irq_offset;
 }
 
 /*
  * Routines to acknowledge, disable and enable interrupts
  */
-static void gic_ack_irq(unsigned int irq)
+static void gic_ack_irq(struct irq_data *d)
 {
-
 	spin_lock(&irq_controller_lock);
-	writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI);
+	writel(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
 	spin_unlock(&irq_controller_lock);
 }
 
-static void gic_mask_irq(unsigned int irq)
+static void gic_mask_irq(struct irq_data *d)
 {
-	u32 mask = 1 << (irq % 32);
+	u32 mask = 1 << (d->irq % 32);
 
 	spin_lock(&irq_controller_lock);
-	writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);
+	writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
 	spin_unlock(&irq_controller_lock);
 }
 
-static void gic_unmask_irq(unsigned int irq)
+static void gic_unmask_irq(struct irq_data *d)
 {
-	u32 mask = 1 << (irq % 32);
+	u32 mask = 1 << (d->irq % 32);
 
 	spin_lock(&irq_controller_lock);
-	writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_SET + (gic_irq(irq) / 32) * 4);
+	writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
 	spin_unlock(&irq_controller_lock);
 }
 
-static int gic_set_type(unsigned int irq, unsigned int type)
+static int gic_set_type(struct irq_data *d, unsigned int type)
 {
-	void __iomem *base = gic_dist_base(irq);
-	unsigned int gicirq = gic_irq(irq);
+	void __iomem *base = gic_dist_base(d);
+	unsigned int gicirq = gic_irq(d);
 	u32 enablemask = 1 << (gicirq % 32);
 	u32 enableoff = (gicirq / 32) * 4;
 	u32 confmask = 0x2 << ((gicirq % 16) * 2);
@@ -140,15 +139,16 @@ static int gic_set_type(unsigned int irq, unsigned int type)
 }
 
 #ifdef CONFIG_SMP
-static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
+static int
+gic_set_cpu(struct irq_data *d, const struct cpumask *mask_val, bool force)
 {
-	void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
-	unsigned int shift = (irq % 4) * 8;
+	void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
+	unsigned int shift = (d->irq % 4) * 8;
 	unsigned int cpu = cpumask_first(mask_val);
 	u32 val;
 
 	spin_lock(&irq_controller_lock);
-	irq_desc[irq].node = cpu;
+	d->node = cpu;
 	val = readl(reg) & ~(0xff << shift);
 	val |= 1 << (cpu + shift);
 	writel(val, reg);
@@ -166,7 +166,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 	unsigned long status;
 
 	/* primary controller ack'ing */
-	chip->ack(irq);
+	chip->irq_ack(&desc->irq_data);
 
 	spin_lock(&irq_controller_lock);
 	status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
@@ -184,17 +184,17 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 
  out:
 	/* primary controller unmasking */
-	chip->unmask(irq);
+	chip->irq_unmask(&desc->irq_data);
 }
 
 static struct irq_chip gic_chip = {
-	.name		= "GIC",
-	.ack		= gic_ack_irq,
-	.mask		= gic_mask_irq,
-	.unmask		= gic_unmask_irq,
-	.set_type	= gic_set_type,
+	.name			= "GIC",
+	.irq_ack		= gic_ack_irq,
+	.irq_mask		= gic_mask_irq,
+	.irq_unmask		= gic_unmask_irq,
+	.irq_set_type		= gic_set_type,
 #ifdef CONFIG_SMP
-	.set_affinity	= gic_set_cpu,
+	.irq_set_affinity	= gic_set_cpu,
 #endif
 };
 
-- 
1.7.1

[PATCH 04/54] ARM: ITE 8152: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/common/it8152.c |   14 +++++++++-----
 1 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 1bec96e..fa708f7 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -31,8 +31,10 @@
 
 #define MAX_SLOTS		21
 
-static void it8152_mask_irq(unsigned int irq)
+static void it8152_mask_irq(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
+
        if (irq >= IT8152_LD_IRQ(0)) {
 	       __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) |
 			    (1 << (irq - IT8152_LD_IRQ(0)))),
@@ -48,8 +50,10 @@ static void it8152_mask_irq(unsigned int irq)
        }
 }
 
-static void it8152_unmask_irq(unsigned int irq)
+static void it8152_unmask_irq(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
+
        if (irq >= IT8152_LD_IRQ(0)) {
 	       __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) &
 			     ~(1 << (irq - IT8152_LD_IRQ(0)))),
@@ -67,9 +71,9 @@ static void it8152_unmask_irq(unsigned int irq)
 
 static struct irq_chip it8152_irq_chip = {
 	.name		= "it8152",
-	.ack		= it8152_mask_irq,
-	.mask		= it8152_mask_irq,
-	.unmask		= it8152_unmask_irq,
+	.irq_ack	= it8152_mask_irq,
+	.irq_mask	= it8152_mask_irq,
+	.irq_unmask	= it8152_unmask_irq,
 };
 
 void it8152_init_irq(void)
-- 
1.7.1

[PATCH 05/54] ARM: LoCoMo: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/common/locomo.c |   24 ++++++++++++------------
 1 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 9dff07c..a026a6b 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -144,7 +144,7 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 	int req, i;
 
 	/* Acknowledge the parent IRQ */
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	/* check why this interrupt was generated */
 	req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
@@ -161,33 +161,33 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 	}
 }
 
-static void locomo_ack_irq(unsigned int irq)
+static void locomo_ack_irq(struct irq_data *d)
 {
 }
 
-static void locomo_mask_irq(unsigned int irq)
+static void locomo_mask_irq(struct irq_data *d)
 {
-	struct locomo *lchip = get_irq_chip_data(irq);
+	struct locomo *lchip = irq_data_get_irq_chip_data(d);
 	unsigned int r;
 	r = locomo_readl(lchip->base + LOCOMO_ICR);
-	r &= ~(0x0010 << (irq - lchip->irq_base));
+	r &= ~(0x0010 << (d->irq - lchip->irq_base));
 	locomo_writel(r, lchip->base + LOCOMO_ICR);
 }
 
-static void locomo_unmask_irq(unsigned int irq)
+static void locomo_unmask_irq(struct irq_data *d)
 {
-	struct locomo *lchip = get_irq_chip_data(irq);
+	struct locomo *lchip = irq_data_get_irq_chip_data(d);
 	unsigned int r;
 	r = locomo_readl(lchip->base + LOCOMO_ICR);
-	r |= (0x0010 << (irq - lchip->irq_base));
+	r |= (0x0010 << (d->irq - lchip->irq_base));
 	locomo_writel(r, lchip->base + LOCOMO_ICR);
 }
 
 static struct irq_chip locomo_chip = {
-	.name	= "LOCOMO",
-	.ack	= locomo_ack_irq,
-	.mask	= locomo_mask_irq,
-	.unmask	= locomo_unmask_irq,
+	.name		= "LOCOMO",
+	.irq_ack	= locomo_ack_irq,
+	.irq_mask	= locomo_mask_irq,
+	.irq_unmask	= locomo_unmask_irq,
 };
 
 static void locomo_setup_irq(struct locomo *lchip)
-- 
1.7.1

[PATCH 06/54] ARM: sa1111: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/common/sa1111.c |   94 +++++++++++++++++++++++-----------------------
 1 files changed, 47 insertions(+), 47 deletions(-)

diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index c0258a8..d6c784e 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -210,7 +210,7 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 	sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
 
@@ -228,35 +228,35 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
 			generic_handle_irq(i + sachip->irq_base);
 
 	/* For level-based interrupts */
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 #define SA1111_IRQMASK_LO(x)	(1 << (x - sachip->irq_base))
 #define SA1111_IRQMASK_HI(x)	(1 << (x - sachip->irq_base - 32))
 
-static void sa1111_ack_irq(unsigned int irq)
+static void sa1111_ack_irq(struct irq_data *d)
 {
 }
 
-static void sa1111_mask_lowirq(unsigned int irq)
+static void sa1111_mask_lowirq(struct irq_data *d)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
 	unsigned long ie0;
 
 	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
-	ie0 &= ~SA1111_IRQMASK_LO(irq);
+	ie0 &= ~SA1111_IRQMASK_LO(d->irq);
 	writel(ie0, mapbase + SA1111_INTEN0);
 }
 
-static void sa1111_unmask_lowirq(unsigned int irq)
+static void sa1111_unmask_lowirq(struct irq_data *d)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
 	unsigned long ie0;
 
 	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
-	ie0 |= SA1111_IRQMASK_LO(irq);
+	ie0 |= SA1111_IRQMASK_LO(d->irq);
 	sa1111_writel(ie0, mapbase + SA1111_INTEN0);
 }
 
@@ -267,11 +267,11 @@ static void sa1111_unmask_lowirq(unsigned int irq)
  * be triggered.  In fact, its very difficult, if not impossible to get
  * INTSET to re-trigger the interrupt.
  */
-static int sa1111_retrigger_lowirq(unsigned int irq)
+static int sa1111_retrigger_lowirq(struct irq_data *d)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
-	unsigned int mask = SA1111_IRQMASK_LO(irq);
+	unsigned int mask = SA1111_IRQMASK_LO(d->irq);
 	unsigned long ip0;
 	int i;
 
@@ -285,15 +285,15 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
 
 	if (i == 8)
 		printk(KERN_ERR "Danger Will Robinson: failed to "
-			"re-trigger IRQ%d\n", irq);
+			"re-trigger IRQ%d\n", d->irq);
 	return i == 8 ? -1 : 0;
 }
 
-static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
+static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
-	unsigned int mask = SA1111_IRQMASK_LO(irq);
+	unsigned int mask = SA1111_IRQMASK_LO(d->irq);
 	unsigned long ip0;
 
 	if (flags == IRQ_TYPE_PROBE)
@@ -313,11 +313,11 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 	return 0;
 }
 
-static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
+static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
-	unsigned int mask = SA1111_IRQMASK_LO(irq);
+	unsigned int mask = SA1111_IRQMASK_LO(d->irq);
 	unsigned long we0;
 
 	we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -332,33 +332,33 @@ static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
 
 static struct irq_chip sa1111_low_chip = {
 	.name		= "SA1111-l",
-	.ack		= sa1111_ack_irq,
-	.mask		= sa1111_mask_lowirq,
-	.unmask		= sa1111_unmask_lowirq,
-	.retrigger	= sa1111_retrigger_lowirq,
-	.set_type	= sa1111_type_lowirq,
-	.set_wake	= sa1111_wake_lowirq,
+	.irq_ack	= sa1111_ack_irq,
+	.irq_mask	= sa1111_mask_lowirq,
+	.irq_unmask	= sa1111_unmask_lowirq,
+	.irq_retrigger	= sa1111_retrigger_lowirq,
+	.irq_set_type	= sa1111_type_lowirq,
+	.irq_set_wake	= sa1111_wake_lowirq,
 };
 
-static void sa1111_mask_highirq(unsigned int irq)
+static void sa1111_mask_highirq(struct irq_data *d)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
 	unsigned long ie1;
 
 	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
-	ie1 &= ~SA1111_IRQMASK_HI(irq);
+	ie1 &= ~SA1111_IRQMASK_HI(d->irq);
 	sa1111_writel(ie1, mapbase + SA1111_INTEN1);
 }
 
-static void sa1111_unmask_highirq(unsigned int irq)
+static void sa1111_unmask_highirq(struct irq_data *d)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
 	unsigned long ie1;
 
 	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
-	ie1 |= SA1111_IRQMASK_HI(irq);
+	ie1 |= SA1111_IRQMASK_HI(d->irq);
 	sa1111_writel(ie1, mapbase + SA1111_INTEN1);
 }
 
@@ -369,11 +369,11 @@ static void sa1111_unmask_highirq(unsigned int irq)
  * be triggered.  In fact, its very difficult, if not impossible to get
  * INTSET to re-trigger the interrupt.
  */
-static int sa1111_retrigger_highirq(unsigned int irq)
+static int sa1111_retrigger_highirq(struct irq_data *d)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
-	unsigned int mask = SA1111_IRQMASK_HI(irq);
+	unsigned int mask = SA1111_IRQMASK_HI(d->irq);
 	unsigned long ip1;
 	int i;
 
@@ -387,15 +387,15 @@ static int sa1111_retrigger_highirq(unsigned int irq)
 
 	if (i == 8)
 		printk(KERN_ERR "Danger Will Robinson: failed to "
-			"re-trigger IRQ%d\n", irq);
+			"re-trigger IRQ%d\n", d->irq);
 	return i == 8 ? -1 : 0;
 }
 
-static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
+static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
-	unsigned int mask = SA1111_IRQMASK_HI(irq);
+	unsigned int mask = SA1111_IRQMASK_HI(d->irq);
 	unsigned long ip1;
 
 	if (flags == IRQ_TYPE_PROBE)
@@ -415,11 +415,11 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 	return 0;
 }
 
-static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
+static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
 {
-	struct sa1111 *sachip = get_irq_chip_data(irq);
+	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
 	void __iomem *mapbase = sachip->base + SA1111_INTC;
-	unsigned int mask = SA1111_IRQMASK_HI(irq);
+	unsigned int mask = SA1111_IRQMASK_HI(d->irq);
 	unsigned long we1;
 
 	we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -434,12 +434,12 @@ static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
 
 static struct irq_chip sa1111_high_chip = {
 	.name		= "SA1111-h",
-	.ack		= sa1111_ack_irq,
-	.mask		= sa1111_mask_highirq,
-	.unmask		= sa1111_unmask_highirq,
-	.retrigger	= sa1111_retrigger_highirq,
-	.set_type	= sa1111_type_highirq,
-	.set_wake	= sa1111_wake_highirq,
+	.irq_ack	= sa1111_ack_irq,
+	.irq_mask	= sa1111_mask_highirq,
+	.irq_unmask	= sa1111_unmask_highirq,
+	.irq_retrigger	= sa1111_retrigger_highirq,
+	.irq_set_type	= sa1111_type_highirq,
+	.irq_set_wake	= sa1111_wake_highirq,
 };
 
 static void sa1111_setup_irq(struct sa1111 *sachip)
-- 
1.7.1

[PATCH 07/54] ARM: vic: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/common/vic.c |   32 ++++++++++++++++----------------
 1 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index ba65f6e..9dce36e 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -204,26 +204,26 @@ static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 res
 static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
 #endif /* CONFIG_PM */
 
-static void vic_ack_irq(unsigned int irq)
+static void vic_ack_irq(struct irq_data *d)
 {
-	void __iomem *base = get_irq_chip_data(irq);
-	irq &= 31;
+	void __iomem *base = irq_data_get_irq_chip_data(d);
+	unsigned int irq = d->irq & 31;
 	writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
 	/* moreover, clear the soft-triggered, in case it was the reason */
 	writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
 }
 
-static void vic_mask_irq(unsigned int irq)
+static void vic_mask_irq(struct irq_data *d)
 {
-	void __iomem *base = get_irq_chip_data(irq);
-	irq &= 31;
+	void __iomem *base = irq_data_get_irq_chip_data(d);
+	unsigned int irq = d->irq & 31;
 	writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
 }
 
-static void vic_unmask_irq(unsigned int irq)
+static void vic_unmask_irq(struct irq_data *d)
 {
-	void __iomem *base = get_irq_chip_data(irq);
-	irq &= 31;
+	void __iomem *base = irq_data_get_irq_chip_data(d);
+	unsigned int irq = d->irq & 31;
 	writel(1 << irq, base + VIC_INT_ENABLE);
 }
 
@@ -242,10 +242,10 @@ static struct vic_device *vic_from_irq(unsigned int irq)
 	return NULL;
 }
 
-static int vic_set_wake(unsigned int irq, unsigned int on)
+static int vic_set_wake(struct irq_data *d, unsigned int on)
 {
-	struct vic_device *v = vic_from_irq(irq);
-	unsigned int off = irq & 31;
+	struct vic_device *v = vic_from_irq(d->irq);
+	unsigned int off = d->irq & 31;
 	u32 bit = 1 << off;
 
 	if (!v)
@@ -267,10 +267,10 @@ static int vic_set_wake(unsigned int irq, unsigned int on)
 
 static struct irq_chip vic_chip = {
 	.name		= "VIC",
-	.ack		= vic_ack_irq,
-	.mask		= vic_mask_irq,
-	.unmask		= vic_unmask_irq,
-	.set_wake	= vic_set_wake,
+	.irq_ack	= vic_ack_irq,
+	.irq_mask	= vic_mask_irq,
+	.irq_unmask	= vic_unmask_irq,
+	.irq_set_wake	= vic_set_wake,
 };
 
 static void __init vic_disable(void __iomem *base)
-- 
1.7.1

[PATCH 08/54] ARM: aaec2000: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-aaec2000/core.c |   18 +++++++++---------
 1 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index 3ef6833..f8465bd 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -68,25 +68,25 @@ void __init aaec2000_map_io(void)
 /*
  * Interrupt handling routines
  */
-static void aaec2000_int_ack(unsigned int irq)
+static void aaec2000_int_ack(struct irq_data *d)
 {
-	IRQ_INTSR = 1 << irq;
+	IRQ_INTSR = 1 << d->irq;
 }
 
-static void aaec2000_int_mask(unsigned int irq)
+static void aaec2000_int_mask(struct irq_data *d)
 {
-	IRQ_INTENC |= (1 << irq);
+	IRQ_INTENC |= (1 << d->irq);
 }
 
-static void aaec2000_int_unmask(unsigned int irq)
+static void aaec2000_int_unmask(struct irq_data *d)
 {
-	IRQ_INTENS |= (1 << irq);
+	IRQ_INTENS |= (1 << d->irq);
 }
 
 static struct irq_chip aaec2000_irq_chip = {
-	.ack	= aaec2000_int_ack,
-	.mask	= aaec2000_int_mask,
-	.unmask	= aaec2000_int_unmask,
+	.irq_ack	= aaec2000_int_ack,
+	.irq_mask	= aaec2000_int_mask,
+	.irq_unmask	= aaec2000_int_unmask,
 };
 
 void __init aaec2000_init_irq(void)
-- 
1.7.1

[PATCH 09/54] ARM: at91: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-at91/gpio.c |   34 +++++++++++++++++-----------------
 arch/arm/mach-at91/irq.c  |   36 ++++++++++++++++++------------------
 2 files changed, 35 insertions(+), 35 deletions(-)

diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index ae4772e..af818a2 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -274,10 +274,10 @@ EXPORT_SYMBOL(at91_get_gpio_value);
 static u32 wakeups[MAX_GPIO_BANKS];
 static u32 backups[MAX_GPIO_BANKS];
 
-static int gpio_irq_set_wake(unsigned pin, unsigned state)
+static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
 {
-	unsigned	mask = pin_to_mask(pin);
-	unsigned	bank = (pin - PIN_BASE) / 32;
+	unsigned	mask = pin_to_mask(d->irq);
+	unsigned	bank = (d->irq - PIN_BASE) / 32;
 
 	if (unlikely(bank >= MAX_GPIO_BANKS))
 		return -EINVAL;
@@ -344,25 +344,25 @@ void at91_gpio_resume(void)
  * IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering.
  */
 
-static void gpio_irq_mask(unsigned pin)
+static void gpio_irq_mask(struct irq_data *d)
 {
-	void __iomem	*pio = pin_to_controller(pin);
-	unsigned	mask = pin_to_mask(pin);
+	void __iomem	*pio = pin_to_controller(d->irq);
+	unsigned	mask = pin_to_mask(d->irq);
 
 	if (pio)
 		__raw_writel(mask, pio + PIO_IDR);
 }
 
-static void gpio_irq_unmask(unsigned pin)
+static void gpio_irq_unmask(struct irq_data *d)
 {
-	void __iomem	*pio = pin_to_controller(pin);
-	unsigned	mask = pin_to_mask(pin);
+	void __iomem	*pio = pin_to_controller(d->irq);
+	unsigned	mask = pin_to_mask(d->irq);
 
 	if (pio)
 		__raw_writel(mask, pio + PIO_IER);
 }
 
-static int gpio_irq_type(unsigned pin, unsigned type)
+static int gpio_irq_type(struct irq_data *d, unsigned type)
 {
 	switch (type) {
 	case IRQ_TYPE_NONE:
@@ -375,10 +375,10 @@ static int gpio_irq_type(unsigned pin, unsigned type)
 
 static struct irq_chip gpio_irqchip = {
 	.name		= "GPIO",
-	.mask		= gpio_irq_mask,
-	.unmask		= gpio_irq_unmask,
-	.set_type	= gpio_irq_type,
-	.set_wake	= gpio_irq_set_wake,
+	.irq_mask	= gpio_irq_mask,
+	.irq_unmask	= gpio_irq_unmask,
+	.irq_set_type	= gpio_irq_type,
+	.irq_set_wake	= gpio_irq_set_wake,
 };
 
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
@@ -393,7 +393,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 	pio = at91_gpio->regbase;
 
 	/* temporarily mask (level sensitive) parent IRQ */
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 	for (;;) {
 		/* Reading ISR acks pending (edge triggered) GPIO interrupts.
 		 * When there none are pending, we're finished unless we need
@@ -419,7 +419,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 					 * another IRQ must be generated before it actually gets
 					 * here to be disabled on the GPIO controller.
 					 */
-					gpio_irq_mask(pin);
+					gpio_irq_mask(irq_get_irq_data(pin));
 				}
 				else
 					generic_handle_irq(pin);
@@ -429,7 +429,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 			isr >>= 1;
 		}
 	}
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 	/* now it may re-trigger */
 }
 
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index da3494a..b56d6b3 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -34,23 +34,23 @@
 #include <asm/mach/map.h>
 
 
-static void at91_aic_mask_irq(unsigned int irq)
+static void at91_aic_mask_irq(struct irq_data *d)
 {
 	/* Disable interrupt on AIC */
-	at91_sys_write(AT91_AIC_IDCR, 1 << irq);
+	at91_sys_write(AT91_AIC_IDCR, 1 << d->irq);
 }
 
-static void at91_aic_unmask_irq(unsigned int irq)
+static void at91_aic_unmask_irq(struct irq_data *d)
 {
 	/* Enable interrupt on AIC */
-	at91_sys_write(AT91_AIC_IECR, 1 << irq);
+	at91_sys_write(AT91_AIC_IECR, 1 << d->irq);
 }
 
 unsigned int at91_extern_irq;
 
 #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
 
-static int at91_aic_set_type(unsigned irq, unsigned type)
+static int at91_aic_set_type(struct irq_data *d, unsigned type)
 {
 	unsigned int smr, srctype;
 
@@ -62,13 +62,13 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
 		srctype = AT91_AIC_SRCTYPE_RISING;
 		break;
 	case IRQ_TYPE_LEVEL_LOW:
-		if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))		/* only supported on external interrupts */
+		if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))		/* only supported on external interrupts */
 			srctype = AT91_AIC_SRCTYPE_LOW;
 		else
 			return -EINVAL;
 		break;
 	case IRQ_TYPE_EDGE_FALLING:
-		if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))		/* only supported on external interrupts */
+		if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))		/* only supported on external interrupts */
 			srctype = AT91_AIC_SRCTYPE_FALLING;
 		else
 			return -EINVAL;
@@ -77,8 +77,8 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
 		return -EINVAL;
 	}
 
-	smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
-	at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
+	smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
+	at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype);
 	return 0;
 }
 
@@ -87,15 +87,15 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
 static u32 wakeups;
 static u32 backups;
 
-static int at91_aic_set_wake(unsigned irq, unsigned value)
+static int at91_aic_set_wake(struct irq_data *d, unsigned value)
 {
-	if (unlikely(irq >= 32))
+	if (unlikely(d->irq >= 32))
 		return -EINVAL;
 
 	if (value)
-		wakeups |= (1 << irq);
+		wakeups |= (1 << d->irq);
 	else
-		wakeups &= ~(1 << irq);
+		wakeups &= ~(1 << d->irq);
 
 	return 0;
 }
@@ -119,11 +119,11 @@ void at91_irq_resume(void)
 
 static struct irq_chip at91_aic_chip = {
 	.name		= "AIC",
-	.ack		= at91_aic_mask_irq,
-	.mask		= at91_aic_mask_irq,
-	.unmask		= at91_aic_unmask_irq,
-	.set_type	= at91_aic_set_type,
-	.set_wake	= at91_aic_set_wake,
+	.irq_ack	= at91_aic_mask_irq,
+	.irq_mask	= at91_aic_mask_irq,
+	.irq_unmask	= at91_aic_unmask_irq,
+	.irq_set_type	= at91_aic_set_type,
+	.irq_set_wake	= at91_aic_set_wake,
 };
 
 /*
-- 
1.7.1

[PATCH 10/54] ARM: bcmring: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-bcmring/irq.c |   42 +++++++++++++++++++++---------------------
 1 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c
index e315263..84dcda0 100644
--- a/arch/arm/mach-bcmring/irq.c
+++ b/arch/arm/mach-bcmring/irq.c
@@ -30,61 +30,61 @@
 #include <mach/csp/intcHw_reg.h>
 #include <mach/csp/mm_io.h>
 
-static void bcmring_mask_irq0(unsigned int irq)
+static void bcmring_mask_irq0(struct irq_data *d)
 {
-	writel(1 << (irq - IRQ_INTC0_START),
+	writel(1 << (d->irq - IRQ_INTC0_START),
 	       MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
 }
 
-static void bcmring_unmask_irq0(unsigned int irq)
+static void bcmring_unmask_irq0(struct irq_data *d)
 {
-	writel(1 << (irq - IRQ_INTC0_START),
+	writel(1 << (d->irq - IRQ_INTC0_START),
 	       MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
 }
 
-static void bcmring_mask_irq1(unsigned int irq)
+static void bcmring_mask_irq1(struct irq_data *d)
 {
-	writel(1 << (irq - IRQ_INTC1_START),
+	writel(1 << (d->irq - IRQ_INTC1_START),
 	       MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
 }
 
-static void bcmring_unmask_irq1(unsigned int irq)
+static void bcmring_unmask_irq1(struct irq_data *d)
 {
-	writel(1 << (irq - IRQ_INTC1_START),
+	writel(1 << (d->irq - IRQ_INTC1_START),
 	       MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
 }
 
-static void bcmring_mask_irq2(unsigned int irq)
+static void bcmring_mask_irq2(struct irq_data *d)
 {
-	writel(1 << (irq - IRQ_SINTC_START),
+	writel(1 << (d->irq - IRQ_SINTC_START),
 	       MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
 }
 
-static void bcmring_unmask_irq2(unsigned int irq)
+static void bcmring_unmask_irq2(struct irq_data *d)
 {
-	writel(1 << (irq - IRQ_SINTC_START),
+	writel(1 << (d->irq - IRQ_SINTC_START),
 	       MM_IO_BASE_SINTC + INTCHW_INTENABLE);
 }
 
 static struct irq_chip bcmring_irq0_chip = {
 	.name = "ARM-INTC0",
-	.ack = bcmring_mask_irq0,
-	.mask = bcmring_mask_irq0,	/* mask a specific interrupt, blocking its delivery. */
-	.unmask = bcmring_unmask_irq0,	/* unmaks an interrupt */
+	.irq_ack = bcmring_mask_irq0,
+	.irq_mask = bcmring_mask_irq0,	/* mask a specific interrupt, blocking its delivery. */
+	.irq_unmask = bcmring_unmask_irq0,	/* unmaks an interrupt */
 };
 
 static struct irq_chip bcmring_irq1_chip = {
 	.name = "ARM-INTC1",
-	.ack = bcmring_mask_irq1,
-	.mask = bcmring_mask_irq1,
-	.unmask = bcmring_unmask_irq1,
+	.irq_ack = bcmring_mask_irq1,
+	.irq_mask = bcmring_mask_irq1,
+	.irq_unmask = bcmring_unmask_irq1,
 };
 
 static struct irq_chip bcmring_irq2_chip = {
 	.name = "ARM-SINTC",
-	.ack = bcmring_mask_irq2,
-	.mask = bcmring_mask_irq2,
-	.unmask = bcmring_unmask_irq2,
+	.irq_ack = bcmring_mask_irq2,
+	.irq_mask = bcmring_mask_irq2,
+	.irq_unmask = bcmring_unmask_irq2,
 };
 
 static void vic_init(void __iomem *base, struct irq_chip *chip,
-- 
1.7.1

[PATCH 11/54] ARM: clps711x: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-clps711x/irq.c |   40 ++++++++++++++++++++--------------------
 1 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c
index 9a12d85..86da7a1 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/irq.c
@@ -27,24 +27,24 @@
 
 #include <asm/hardware/clps7111.h>
 
-static void int1_mask(unsigned int irq)
+static void int1_mask(struct irq_data *d)
 {
 	u32 intmr1;
 
 	intmr1 = clps_readl(INTMR1);
-	intmr1 &= ~(1 << irq);
+	intmr1 &= ~(1 << d->irq);
 	clps_writel(intmr1, INTMR1);
 }
 
-static void int1_ack(unsigned int irq)
+static void int1_ack(struct irq_data *d)
 {
 	u32 intmr1;
 
 	intmr1 = clps_readl(INTMR1);
-	intmr1 &= ~(1 << irq);
+	intmr1 &= ~(1 << d->irq);
 	clps_writel(intmr1, INTMR1);
 
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_CSINT:  clps_writel(0, COEOI);  break;
 	case IRQ_TC1OI:  clps_writel(0, TC1EOI); break;
 	case IRQ_TC2OI:  clps_writel(0, TC2EOI); break;
@@ -54,56 +54,56 @@ static void int1_ack(unsigned int irq)
 	}
 }
 
-static void int1_unmask(unsigned int irq)
+static void int1_unmask(struct irq_data *d)
 {
 	u32 intmr1;
 
 	intmr1 = clps_readl(INTMR1);
-	intmr1 |= 1 << irq;
+	intmr1 |= 1 << d->irq;
 	clps_writel(intmr1, INTMR1);
 }
 
 static struct irq_chip int1_chip = {
-	.ack	= int1_ack,
-	.mask	= int1_mask,
-	.unmask = int1_unmask,
+	.irq_ack	= int1_ack,
+	.irq_mask	= int1_mask,
+	.irq_unmask	= int1_unmask,
 };
 
-static void int2_mask(unsigned int irq)
+static void int2_mask(struct irq_data *d)
 {
 	u32 intmr2;
 
 	intmr2 = clps_readl(INTMR2);
-	intmr2 &= ~(1 << (irq - 16));
+	intmr2 &= ~(1 << (d->irq - 16));
 	clps_writel(intmr2, INTMR2);
 }
 
-static void int2_ack(unsigned int irq)
+static void int2_ack(struct irq_data *d)
 {
 	u32 intmr2;
 
 	intmr2 = clps_readl(INTMR2);
-	intmr2 &= ~(1 << (irq - 16));
+	intmr2 &= ~(1 << (d->irq - 16));
 	clps_writel(intmr2, INTMR2);
 
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
 	}
 }
 
-static void int2_unmask(unsigned int irq)
+static void int2_unmask(struct irq_data *d)
 {
 	u32 intmr2;
 
 	intmr2 = clps_readl(INTMR2);
-	intmr2 |= 1 << (irq - 16);
+	intmr2 |= 1 << (d->irq - 16);
 	clps_writel(intmr2, INTMR2);
 }
 
 static struct irq_chip int2_chip = {
-	.ack	= int2_ack,
-	.mask	= int2_mask,
-	.unmask = int2_unmask,
+	.irq_ack	= int2_ack,
+	.irq_mask	= int2_mask,
+	.irq_unmask	= int2_unmask,
 };
 
 void __init clps711x_init_irq(void)
-- 
1.7.1

[PATCH 12/54] ARM: davinci: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-davinci/cp_intc.c |   30 ++++++++++++------------
 arch/arm/mach-davinci/gpio.c    |   46 +++++++++++++++++++-------------------
 arch/arm/mach-davinci/irq.c     |   26 +++++++++++-----------
 3 files changed, 51 insertions(+), 51 deletions(-)

diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index bb4c40e..9abc80a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -26,30 +26,30 @@ static inline void cp_intc_write(unsigned long value, unsigned offset)
 	__raw_writel(value, davinci_intc_base + offset);
 }
 
-static void cp_intc_ack_irq(unsigned int irq)
+static void cp_intc_ack_irq(struct irq_data *d)
 {
-	cp_intc_write(irq, CP_INTC_SYS_STAT_IDX_CLR);
+	cp_intc_write(d->irq, CP_INTC_SYS_STAT_IDX_CLR);
 }
 
 /* Disable interrupt */
-static void cp_intc_mask_irq(unsigned int irq)
+static void cp_intc_mask_irq(struct irq_data *d)
 {
 	/* XXX don't know why we need to disable nIRQ here... */
 	cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
-	cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_CLR);
+	cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_CLR);
 	cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
 }
 
 /* Enable interrupt */
-static void cp_intc_unmask_irq(unsigned int irq)
+static void cp_intc_unmask_irq(struct irq_data *d)
 {
-	cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_SET);
+	cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_SET);
 }
 
-static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type)
+static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-	unsigned reg		= BIT_WORD(irq);
-	unsigned mask		= BIT_MASK(irq);
+	unsigned reg		= BIT_WORD(d->irq);
+	unsigned mask		= BIT_MASK(d->irq);
 	unsigned polarity	= cp_intc_read(CP_INTC_SYS_POLARITY(reg));
 	unsigned type		= cp_intc_read(CP_INTC_SYS_TYPE(reg));
 
@@ -85,18 +85,18 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type)
  * generic drivers which call {enable|disable}_irq_wake for
  * wake up interrupt sources (eg RTC on DA850).
  */
-static int cp_intc_set_wake(unsigned int irq, unsigned int on)
+static int cp_intc_set_wake(struct irq_data *d, unsigned int on)
 {
 	return 0;
 }
 
 static struct irq_chip cp_intc_irq_chip = {
 	.name		= "cp_intc",
-	.ack		= cp_intc_ack_irq,
-	.mask		= cp_intc_mask_irq,
-	.unmask		= cp_intc_unmask_irq,
-	.set_type	= cp_intc_set_irq_type,
-	.set_wake	= cp_intc_set_wake,
+	.irq_ack	= cp_intc_ack_irq,
+	.irq_mask	= cp_intc_mask_irq,
+	.irq_unmask	= cp_intc_unmask_irq,
+	.irq_set_type	= cp_intc_set_irq_type,
+	.irq_set_wake	= cp_intc_set_wake,
 };
 
 void __init cp_intc_init(void)
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index bf0ff58..20d66e5 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -205,20 +205,20 @@ pure_initcall(davinci_gpio_setup);
  * serve as EDMA event triggers.
  */
 
-static void gpio_irq_disable(unsigned irq)
+static void gpio_irq_disable(struct irq_data *d)
 {
-	struct davinci_gpio_regs __iomem *g = irq2regs(irq);
-	u32 mask = (u32) get_irq_data(irq);
+	struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+	u32 mask = (u32) irq_data_get_irq_data(d);
 
 	__raw_writel(mask, &g->clr_falling);
 	__raw_writel(mask, &g->clr_rising);
 }
 
-static void gpio_irq_enable(unsigned irq)
+static void gpio_irq_enable(struct irq_data *d)
 {
-	struct davinci_gpio_regs __iomem *g = irq2regs(irq);
-	u32 mask = (u32) get_irq_data(irq);
-	unsigned status = irq_desc[irq].status;
+	struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+	u32 mask = (u32) irq_data_get_irq_data(d);
+	unsigned status = irq_desc[d->irq].status;
 
 	status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
 	if (!status)
@@ -230,19 +230,19 @@ static void gpio_irq_enable(unsigned irq)
 		__raw_writel(mask, &g->set_rising);
 }
 
-static int gpio_irq_type(unsigned irq, unsigned trigger)
+static int gpio_irq_type(struct irq_data *d, unsigned trigger)
 {
-	struct davinci_gpio_regs __iomem *g = irq2regs(irq);
-	u32 mask = (u32) get_irq_data(irq);
+	struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+	u32 mask = (u32) irq_data_get_irq_data(d);
 
 	if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
 		return -EINVAL;
 
-	irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
-	irq_desc[irq].status |= trigger;
+	irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK;
+	irq_desc[d->irq].status |= trigger;
 
 	/* don't enable the IRQ if it's currently disabled */
-	if (irq_desc[irq].depth == 0) {
+	if (irq_desc[d->irq].depth == 0) {
 		__raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
 			     ? &g->set_falling : &g->clr_falling);
 		__raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
@@ -253,9 +253,9 @@ static int gpio_irq_type(unsigned irq, unsigned trigger)
 
 static struct irq_chip gpio_irqchip = {
 	.name		= "GPIO",
-	.enable		= gpio_irq_enable,
-	.disable	= gpio_irq_disable,
-	.set_type	= gpio_irq_type,
+	.irq_enable	= gpio_irq_enable,
+	.irq_disable	= gpio_irq_disable,
+	.irq_set_type	= gpio_irq_type,
 };
 
 static void
@@ -269,8 +269,8 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 		mask <<= 16;
 
 	/* temporarily mask (level sensitive) parent IRQ */
-	desc->chip->mask(irq);
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_mask(&desc->irq_data);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 	while (1) {
 		u32		status;
 		int		n;
@@ -293,7 +293,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 			status >>= res;
 		}
 	}
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 	/* now it may re-trigger */
 }
 
@@ -320,10 +320,10 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
 		return -ENODEV;
 }
 
-static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger)
+static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger)
 {
-	struct davinci_gpio_regs __iomem *g = irq2regs(irq);
-	u32 mask = (u32) get_irq_data(irq);
+	struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+	u32 mask = (u32) irq_data_get_irq_data(d);
 
 	if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
 		return -EINVAL;
@@ -397,7 +397,7 @@ static int __init davinci_gpio_irq_setup(void)
 		irq = bank_irq;
 		gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq));
 		gpio_irqchip_unbanked.name = "GPIO-AINTC";
-		gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked;
+		gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked;
 
 		/* default trigger: both edges */
 		g = gpio2regs(0);
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 784ddf3..f5f417e 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -53,14 +53,14 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
 }
 
 /* Disable interrupt */
-static void davinci_mask_irq(unsigned int irq)
+static void davinci_mask_irq(struct irq_data *d)
 {
 	unsigned int mask;
 	u32 l;
 
-	mask = 1 << IRQ_BIT(irq);
+	mask = 1 << IRQ_BIT(d->irq);
 
-	if (irq > 31) {
+	if (d->irq > 31) {
 		l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET);
 		l &= ~mask;
 		davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET);
@@ -72,14 +72,14 @@ static void davinci_mask_irq(unsigned int irq)
 }
 
 /* Enable interrupt */
-static void davinci_unmask_irq(unsigned int irq)
+static void davinci_unmask_irq(struct irq_data *d)
 {
 	unsigned int mask;
 	u32 l;
 
-	mask = 1 << IRQ_BIT(irq);
+	mask = 1 << IRQ_BIT(d->irq);
 
-	if (irq > 31) {
+	if (d->irq > 31) {
 		l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET);
 		l |= mask;
 		davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET);
@@ -91,23 +91,23 @@ static void davinci_unmask_irq(unsigned int irq)
 }
 
 /* EOI interrupt */
-static void davinci_ack_irq(unsigned int irq)
+static void davinci_ack_irq(struct irq_data *d)
 {
 	unsigned int mask;
 
-	mask = 1 << IRQ_BIT(irq);
+	mask = 1 << IRQ_BIT(d->irq);
 
-	if (irq > 31)
+	if (d->irq > 31)
 		davinci_irq_writel(mask, IRQ_REG1_OFFSET);
 	else
 		davinci_irq_writel(mask, IRQ_REG0_OFFSET);
 }
 
 static struct irq_chip davinci_irq_chip_0 = {
-	.name	= "AINTC",
-	.ack	= davinci_ack_irq,
-	.mask	= davinci_mask_irq,
-	.unmask = davinci_unmask_irq,
+	.name		= "AINTC",
+	.irq_ack	= davinci_ack_irq,
+	.irq_mask	= davinci_mask_irq,
+	.irq_unmask = davinci_unmask_irq,
 };
 
 /* ARM Interrupt Controller Initialization */
-- 
1.7.1

[PATCH 13/54] ARM: dove: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-dove/irq.c |   18 +++++++++---------
 1 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 61bfcb3..9317f05 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -36,9 +36,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	}
 }
 
-static void pmu_irq_mask(unsigned int irq)
+static void pmu_irq_mask(struct irq_data *d)
 {
-	int pin = irq_to_pmu(irq);
+	int pin = irq_to_pmu(d->irq);
 	u32 u;
 
 	u = readl(PMU_INTERRUPT_MASK);
@@ -46,9 +46,9 @@ static void pmu_irq_mask(unsigned int irq)
 	writel(u, PMU_INTERRUPT_MASK);
 }
 
-static void pmu_irq_unmask(unsigned int irq)
+static void pmu_irq_unmask(struct irq_data *d)
 {
-	int pin = irq_to_pmu(irq);
+	int pin = irq_to_pmu(d->irq);
 	u32 u;
 
 	u = readl(PMU_INTERRUPT_MASK);
@@ -56,9 +56,9 @@ static void pmu_irq_unmask(unsigned int irq)
 	writel(u, PMU_INTERRUPT_MASK);
 }
 
-static void pmu_irq_ack(unsigned int irq)
+static void pmu_irq_ack(struct irq_data *d)
 {
-	int pin = irq_to_pmu(irq);
+	int pin = irq_to_pmu(d->irq);
 	u32 u;
 
 	u = ~(1 << (pin & 31));
@@ -67,9 +67,9 @@ static void pmu_irq_ack(unsigned int irq)
 
 static struct irq_chip pmu_irq_chip = {
 	.name		= "pmu_irq",
-	.mask		= pmu_irq_mask,
-	.unmask		= pmu_irq_unmask,
-	.ack		= pmu_irq_ack,
+	.irq_mask	= pmu_irq_mask,
+	.irq_unmask	= pmu_irq_unmask,
+	.irq_ack	= pmu_irq_ack,
 };
 
 static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
-- 
1.7.1

[PATCH 14/54] ARM: ebsa110: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-ebsa110/core.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 5df4099..7df083f 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -35,20 +35,20 @@
 #define IRQ_STAT		0xff000000	/* read */
 #define IRQ_MCLR		0xff000000	/* write */
 
-static void ebsa110_mask_irq(unsigned int irq)
+static void ebsa110_mask_irq(struct irq_data *d)
 {
-	__raw_writeb(1 << irq, IRQ_MCLR);
+	__raw_writeb(1 << d->irq, IRQ_MCLR);
 }
 
-static void ebsa110_unmask_irq(unsigned int irq)
+static void ebsa110_unmask_irq(struct irq_data *d)
 {
-	__raw_writeb(1 << irq, IRQ_MSET);
+	__raw_writeb(1 << d->irq, IRQ_MSET);
 }
 
 static struct irq_chip ebsa110_irq_chip = {
-	.ack	= ebsa110_mask_irq,
-	.mask	= ebsa110_mask_irq,
-	.unmask = ebsa110_unmask_irq,
+	.irq_ack	= ebsa110_mask_irq,
+	.irq_mask	= ebsa110_mask_irq,
+	.irq_unmask	= ebsa110_unmask_irq,
 };
  
 static void __init ebsa110_init_irq(void)
-- 
1.7.1

[PATCH 15/54] ARM: ep93xx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-ep93xx/gpio.c |   36 ++++++++++++++++++------------------
 1 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index cf547ad..f3dc76f 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -112,13 +112,13 @@ static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
 	generic_handle_irq(gpio_irq);
 }
 
-static void ep93xx_gpio_irq_ack(unsigned int irq)
+static void ep93xx_gpio_irq_ack(struct irq_data *d)
 {
-	int line = irq_to_gpio(irq);
+	int line = irq_to_gpio(d->irq);
 	int port = line >> 3;
 	int port_mask = 1 << (line & 7);
 
-	if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+	if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
 		gpio_int_type2[port] ^= port_mask; /* switch edge direction */
 		ep93xx_gpio_update_int_params(port);
 	}
@@ -126,13 +126,13 @@ static void ep93xx_gpio_irq_ack(unsigned int irq)
 	__raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
 }
 
-static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
+static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
 {
-	int line = irq_to_gpio(irq);
+	int line = irq_to_gpio(d->irq);
 	int port = line >> 3;
 	int port_mask = 1 << (line & 7);
 
-	if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
+	if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
 		gpio_int_type2[port] ^= port_mask; /* switch edge direction */
 
 	gpio_int_unmasked[port] &= ~port_mask;
@@ -141,18 +141,18 @@ static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
 	__raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
 }
 
-static void ep93xx_gpio_irq_mask(unsigned int irq)
+static void ep93xx_gpio_irq_mask(struct irq_data *d)
 {
-	int line = irq_to_gpio(irq);
+	int line = irq_to_gpio(d->irq);
 	int port = line >> 3;
 
 	gpio_int_unmasked[port] &= ~(1 << (line & 7));
 	ep93xx_gpio_update_int_params(port);
 }
 
-static void ep93xx_gpio_irq_unmask(unsigned int irq)
+static void ep93xx_gpio_irq_unmask(struct irq_data *d)
 {
-	int line = irq_to_gpio(irq);
+	int line = irq_to_gpio(d->irq);
 	int port = line >> 3;
 
 	gpio_int_unmasked[port] |= 1 << (line & 7);
@@ -164,10 +164,10 @@ static void ep93xx_gpio_irq_unmask(unsigned int irq)
  * edge (1) triggered, while gpio_int_type2 controls whether it
  * triggers on low/falling (0) or high/rising (1).
  */
-static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
+static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
 {
-	struct irq_desc *desc = irq_desc + irq;
-	const int gpio = irq_to_gpio(irq);
+	struct irq_desc *desc = irq_desc + d->irq;
+	const int gpio = irq_to_gpio(d->irq);
 	const int port = gpio >> 3;
 	const int port_mask = 1 << (gpio & 7);
 
@@ -220,11 +220,11 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
 
 static struct irq_chip ep93xx_gpio_irq_chip = {
 	.name		= "GPIO",
-	.ack		= ep93xx_gpio_irq_ack,
-	.mask_ack	= ep93xx_gpio_irq_mask_ack,
-	.mask		= ep93xx_gpio_irq_mask,
-	.unmask		= ep93xx_gpio_irq_unmask,
-	.set_type	= ep93xx_gpio_irq_type,
+	.irq_ack	= ep93xx_gpio_irq_ack,
+	.irq_mask_ack	= ep93xx_gpio_irq_mask_ack,
+	.irq_mask	= ep93xx_gpio_irq_mask,
+	.irq_unmask	= ep93xx_gpio_irq_unmask,
+	.irq_set_type	= ep93xx_gpio_irq_type,
 };
 
 void __init ep93xx_gpio_init_irq(void)
-- 
1.7.1

[PATCH 16/54] ARM: footbridge: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-footbridge/common.c  |   14 +++++++-------
 arch/arm/mach-footbridge/isa-irq.c |   36 ++++++++++++++++++------------------
 2 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 88b3dd8..84c5f25 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -75,20 +75,20 @@ static const int fb_irq_mask[] = {
 	IRQ_MASK_PCI_PERR,	/* 19 */
 };
 
-static void fb_mask_irq(unsigned int irq)
+static void fb_mask_irq(struct irq_data *d)
 {
-	*CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
+	*CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(d->irq)];
 }
 
-static void fb_unmask_irq(unsigned int irq)
+static void fb_unmask_irq(struct irq_data *d)
 {
-	*CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
+	*CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(d->irq)];
 }
 
 static struct irq_chip fb_chip = {
-	.ack	= fb_mask_irq,
-	.mask	= fb_mask_irq,
-	.unmask = fb_unmask_irq,
+	.irq_ack	= fb_mask_irq,
+	.irq_mask	= fb_mask_irq,
+	.irq_unmask	= fb_unmask_irq,
 };
 
 static void __init __fb_init_irq(void)
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index 8bfd06a..de7a5cb 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -30,61 +30,61 @@
 
 #include "common.h"
 
-static void isa_mask_pic_lo_irq(unsigned int irq)
+static void isa_mask_pic_lo_irq(struct irq_data *d)
 {
-	unsigned int mask = 1 << (irq & 7);
+	unsigned int mask = 1 << (d->irq & 7);
 
 	outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
 }
 
-static void isa_ack_pic_lo_irq(unsigned int irq)
+static void isa_ack_pic_lo_irq(struct irq_data *d)
 {
-	unsigned int mask = 1 << (irq & 7);
+	unsigned int mask = 1 << (d->irq & 7);
 
 	outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
 	outb(0x20, PIC_LO);
 }
 
-static void isa_unmask_pic_lo_irq(unsigned int irq)
+static void isa_unmask_pic_lo_irq(struct irq_data *d)
 {
-	unsigned int mask = 1 << (irq & 7);
+	unsigned int mask = 1 << (d->irq & 7);
 
 	outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO);
 }
 
 static struct irq_chip isa_lo_chip = {
-	.ack	= isa_ack_pic_lo_irq,
-	.mask	= isa_mask_pic_lo_irq,
-	.unmask = isa_unmask_pic_lo_irq,
+	.irq_ack	= isa_ack_pic_lo_irq,
+	.irq_mask	= isa_mask_pic_lo_irq,
+	.irq_unmask	= isa_unmask_pic_lo_irq,
 };
 
-static void isa_mask_pic_hi_irq(unsigned int irq)
+static void isa_mask_pic_hi_irq(struct irq_data *d)
 {
-	unsigned int mask = 1 << (irq & 7);
+	unsigned int mask = 1 << (d->irq & 7);
 
 	outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
 }
 
-static void isa_ack_pic_hi_irq(unsigned int irq)
+static void isa_ack_pic_hi_irq(struct irq_data *d)
 {
-	unsigned int mask = 1 << (irq & 7);
+	unsigned int mask = 1 << (d->irq & 7);
 
 	outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
 	outb(0x62, PIC_LO);
 	outb(0x20, PIC_HI);
 }
 
-static void isa_unmask_pic_hi_irq(unsigned int irq)
+static void isa_unmask_pic_hi_irq(struct irq_data *d)
 {
-	unsigned int mask = 1 << (irq & 7);
+	unsigned int mask = 1 << (d->irq & 7);
 
 	outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI);
 }
 
 static struct irq_chip isa_hi_chip = {
-	.ack	= isa_ack_pic_hi_irq,
-	.mask	= isa_mask_pic_hi_irq,
-	.unmask = isa_unmask_pic_hi_irq,
+	.irq_ack	= isa_ack_pic_hi_irq,
+	.irq_mask	= isa_mask_pic_hi_irq,
+	.irq_unmask	= isa_unmask_pic_hi_irq,
 };
 
 static void
-- 
1.7.1

[PATCH 17/54] ARM: gemini: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-gemini/gpio.c |   26 +++++++++++++-------------
 arch/arm/mach-gemini/irq.c  |   20 ++++++++++----------
 2 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index fe3bd5a..fa3d333 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -54,33 +54,33 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index,
 	__raw_writel(reg, base + GPIO_INT_EN);
 }
 
-static void gpio_ack_irq(unsigned int irq)
+static void gpio_ack_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq_to_gpio(irq);
+	unsigned int gpio = irq_to_gpio(d->irq);
 	unsigned int base = GPIO_BASE(gpio / 32);
 
 	__raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR);
 }
 
-static void gpio_mask_irq(unsigned int irq)
+static void gpio_mask_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq_to_gpio(irq);
+	unsigned int gpio = irq_to_gpio(d->irq);
 	unsigned int base = GPIO_BASE(gpio / 32);
 
 	_set_gpio_irqenable(base, gpio % 32, 0);
 }
 
-static void gpio_unmask_irq(unsigned int irq)
+static void gpio_unmask_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq_to_gpio(irq);
+	unsigned int gpio = irq_to_gpio(d->irq);
 	unsigned int base = GPIO_BASE(gpio / 32);
 
 	_set_gpio_irqenable(base, gpio % 32, 1);
 }
 
-static int gpio_set_irq_type(unsigned int irq, unsigned int type)
+static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
 {
-	unsigned int gpio = irq_to_gpio(irq);
+	unsigned int gpio = irq_to_gpio(d->irq);
 	unsigned int gpio_mask = 1 << (gpio % 32);
 	unsigned int base = GPIO_BASE(gpio / 32);
 	unsigned int reg_both, reg_level, reg_type;
@@ -120,7 +120,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
 	__raw_writel(reg_level, base + GPIO_INT_LEVEL);
 	__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
 
-	gpio_ack_irq(irq);
+	gpio_ack_irq(d->irq);
 
 	return 0;
 }
@@ -146,10 +146,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 static struct irq_chip gpio_irq_chip = {
 	.name = "GPIO",
-	.ack = gpio_ack_irq,
-	.mask = gpio_mask_irq,
-	.unmask = gpio_unmask_irq,
-	.set_type = gpio_set_irq_type,
+	.irq_ack = gpio_ack_irq,
+	.irq_mask = gpio_mask_irq,
+	.irq_unmask = gpio_unmask_irq,
+	.irq_set_type = gpio_set_irq_type,
 };
 
 static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 9e613ca..96bc227 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -32,34 +32,34 @@
 #define FIQ_LEVEL(base_addr)	(base_addr + 0x30)
 #define FIQ_STATUS(base_addr)	(base_addr + 0x34)
 
-static void gemini_ack_irq(unsigned int irq)
+static void gemini_ack_irq(struct irq_data *d)
 {
-	__raw_writel(1 << irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
+	__raw_writel(1 << d->irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
 }
 
-static void gemini_mask_irq(unsigned int irq)
+static void gemini_mask_irq(struct irq_data *d)
 {
 	unsigned int mask;
 
 	mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
-	mask &= ~(1 << irq);
+	mask &= ~(1 << d->irq);
 	__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
 }
 
-static void gemini_unmask_irq(unsigned int irq)
+static void gemini_unmask_irq(struct irq_data *d)
 {
 	unsigned int mask;
 
 	mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
-	mask |= (1 << irq);
+	mask |= (1 << d->irq);
 	__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
 }
 
 static struct irq_chip gemini_irq_chip = {
-	.name	= "INTC",
-	.ack	= gemini_ack_irq,
-	.mask	= gemini_mask_irq,
-	.unmask	= gemini_unmask_irq,
+	.name		= "INTC",
+	.irq_ack	= gemini_ack_irq,
+	.irq_mask	= gemini_mask_irq,
+	.irq_unmask	= gemini_unmask_irq,
 };
 
 static struct resource irq_resource = {
-- 
1.7.1

[PATCH 18/54] ARM: h720x: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-h720x/common.c    |   38 +++++++++++++++++++-------------------
 arch/arm/mach-h720x/cpu-h7202.c |   14 +++++++-------
 2 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index bdb3f67..1f28c90 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -52,17 +52,17 @@ unsigned long h720x_gettimeoffset(void)
 /*
  * mask Global irq's
  */
-static void mask_global_irq (unsigned int irq )
+static void mask_global_irq(struct irq_data *d)
 {
-	CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << irq);
+	CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << d->irq);
 }
 
 /*
  * unmask Global irq's
  */
-static void unmask_global_irq (unsigned int irq )
+static void unmask_global_irq(struct irq_data *d)
 {
-	CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << irq);
+	CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << d->irq);
 }
 
 
@@ -70,10 +70,10 @@ static void unmask_global_irq (unsigned int irq )
  * ack GPIO irq's
  * Ack only for edge triggered int's valid
  */
-static void inline ack_gpio_irq(u32 irq)
+static void inline ack_gpio_irq(struct irq_data *d)
 {
-	u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
-	u32 bit = IRQ_TO_BIT(irq);
+	u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq));
+	u32 bit = IRQ_TO_BIT(d->irq);
 	if ( (CPU_REG (reg_base, GPIO_EDGE) & bit))
 		CPU_REG (reg_base, GPIO_CLR) = bit;
 }
@@ -81,20 +81,20 @@ static void inline ack_gpio_irq(u32 irq)
 /*
  * mask GPIO irq's
  */
-static void inline mask_gpio_irq(u32 irq)
+static void inline mask_gpio_irq(struct irq_data *d)
 {
-	u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
-	u32 bit = IRQ_TO_BIT(irq);
+	u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq));
+	u32 bit = IRQ_TO_BIT(d->irq);
 	CPU_REG (reg_base, GPIO_MASK) &= ~bit;
 }
 
 /*
  * unmask GPIO irq's
  */
-static void inline unmask_gpio_irq(u32 irq)
+static void inline unmask_gpio_irq(struct irq_data *d)
 {
-	u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
-	u32 bit = IRQ_TO_BIT(irq);
+	u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq));
+	u32 bit = IRQ_TO_BIT(d->irq);
 	CPU_REG (reg_base, GPIO_MASK) |= bit;
 }
 
@@ -170,15 +170,15 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 #endif
 
 static struct irq_chip h720x_global_chip = {
-	.ack = mask_global_irq,
-	.mask = mask_global_irq,
-	.unmask = unmask_global_irq,
+	.irq_ack = mask_global_irq,
+	.irq_mask = mask_global_irq,
+	.irq_unmask = unmask_global_irq,
 };
 
 static struct irq_chip h720x_gpio_chip = {
-	.ack = ack_gpio_irq,
-	.mask = mask_gpio_irq,
-	.unmask = unmask_gpio_irq,
+	.irq_ack = ack_gpio_irq,
+	.irq_mask = mask_gpio_irq,
+	.irq_unmask = unmask_gpio_irq,
 };
 
 /*
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index fd33a19..ac3f914 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -141,27 +141,27 @@ h7202_timer_interrupt(int irq, void *dev_id)
 /*
  * mask multiplexed timer IRQs
  */
-static void inline mask_timerx_irq (u32 irq)
+static void inline mask_timerx_irq(struct irq_data *d)
 {
 	unsigned int bit;
-	bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
+	bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1));
 	CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit;
 }
 
 /*
  * unmask multiplexed timer IRQs
  */
-static void inline unmask_timerx_irq (u32 irq)
+static void inline unmask_timerx_irq(struct irq_data *d)
 {
 	unsigned int bit;
-	bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
+	bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1));
 	CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit;
 }
 
 static struct irq_chip h7202_timerx_chip = {
-	.ack = mask_timerx_irq,
-	.mask = mask_timerx_irq,
-	.unmask = unmask_timerx_irq,
+	.irq_ack = mask_timerx_irq,
+	.irq_mask = mask_timerx_irq,
+	.irq_unmask = unmask_timerx_irq,
 };
 
 static struct irqaction h7202_timer_irq = {
-- 
1.7.1

[PATCH 19/54] ARM: integrator: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-integrator/integrator_ap.c |   16 +++++-----
 arch/arm/mach-integrator/integrator_cp.c |   48 +++++++++++++++---------------
 2 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 548208f..ca363c1 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -156,21 +156,21 @@ static void __init ap_map_io(void)
 
 #define INTEGRATOR_SC_VALID_INT	0x003fffff
 
-static void sc_mask_irq(unsigned int irq)
+static void sc_mask_irq(struct irq_data *d)
 {
-	writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
+	writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
 }
 
-static void sc_unmask_irq(unsigned int irq)
+static void sc_unmask_irq(struct irq_data *d)
 {
-	writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET);
+	writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_SET);
 }
 
 static struct irq_chip sc_chip = {
-	.name	= "SC",
-	.ack	= sc_mask_irq,
-	.mask	= sc_mask_irq,
-	.unmask = sc_unmask_irq,
+	.name		= "SC",
+	.irq_ack	= sc_mask_irq,
+	.irq_mask	= sc_mask_irq,
+	.irq_unmask	= sc_unmask_irq,
 };
 
 static void __init ap_init_irq(void)
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 6258c90..f0f16d4 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -147,61 +147,61 @@ static void __init intcp_map_io(void)
 #define sic_writel	__raw_writel
 #define sic_readl	__raw_readl
 
-static void cic_mask_irq(unsigned int irq)
+static void cic_mask_irq(struct irq_data *d)
 {
-	irq -= IRQ_CIC_START;
+	unsigned int irq = d->irq - IRQ_CIC_START;
 	cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
 }
 
-static void cic_unmask_irq(unsigned int irq)
+static void cic_unmask_irq(struct irq_data *d)
 {
-	irq -= IRQ_CIC_START;
+	unsigned int irq = d->irq - IRQ_CIC_START;
 	cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
 }
 
 static struct irq_chip cic_chip = {
-	.name	= "CIC",
-	.ack	= cic_mask_irq,
-	.mask	= cic_mask_irq,
-	.unmask	= cic_unmask_irq,
+	.name		= "CIC",
+	.irq_ack	= cic_mask_irq,
+	.irq_mask	= cic_mask_irq,
+	.irq_unmask	= cic_unmask_irq,
 };
 
-static void pic_mask_irq(unsigned int irq)
+static void pic_mask_irq(struct irq_data *d)
 {
-	irq -= IRQ_PIC_START;
+	unsigned int irq = d->irq - IRQ_PIC_START;
 	pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
 }
 
-static void pic_unmask_irq(unsigned int irq)
+static void pic_unmask_irq(struct irq_data *d)
 {
-	irq -= IRQ_PIC_START;
+	unsigned int irq = d->irq - IRQ_PIC_START;
 	pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
 }
 
 static struct irq_chip pic_chip = {
-	.name	= "PIC",
-	.ack	= pic_mask_irq,
-	.mask	= pic_mask_irq,
-	.unmask = pic_unmask_irq,
+	.name		= "PIC",
+	.irq_ack	= pic_mask_irq,
+	.irq_mask	= pic_mask_irq,
+	.irq_unmask	= pic_unmask_irq,
 };
 
-static void sic_mask_irq(unsigned int irq)
+static void sic_mask_irq(struct irq_data *d)
 {
-	irq -= IRQ_SIC_START;
+	unsigned int irq = d->irq - IRQ_SIC_START;
 	sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
 }
 
-static void sic_unmask_irq(unsigned int irq)
+static void sic_unmask_irq(struct irq_data *d)
 {
-	irq -= IRQ_SIC_START;
+	unsigned int irq = d->irq - IRQ_SIC_START;
 	sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
 }
 
 static struct irq_chip sic_chip = {
-	.name	= "SIC",
-	.ack	= sic_mask_irq,
-	.mask	= sic_mask_irq,
-	.unmask	= sic_unmask_irq,
+	.name		= "SIC",
+	.irq_ack	= sic_mask_irq,
+	.irq_mask	= sic_mask_irq,
+	.irq_unmask	= sic_unmask_irq,
 };
 
 static void
-- 
1.7.1

[PATCH 20/54] ARM: iop13xx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-iop13xx/irq.c |   64 +++++++++++++++++++++---------------------
 arch/arm/mach-iop13xx/msi.c |    4 +-
 2 files changed, 34 insertions(+), 34 deletions(-)

diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
index 0d099ca..a233470 100644
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -123,79 +123,79 @@ static void write_intsize(u32 val)
 
 /* 0 = Interrupt Masked and 1 = Interrupt not masked */
 static void
-iop13xx_irq_mask0 (unsigned int irq)
+iop13xx_irq_mask0 (struct irq_data *d)
 {
-	write_intctl_0(read_intctl_0() & ~(1 << (irq - 0)));
+	write_intctl_0(read_intctl_0() & ~(1 << (d->irq - 0)));
 }
 
 static void
-iop13xx_irq_mask1 (unsigned int irq)
+iop13xx_irq_mask1 (struct irq_data *d)
 {
-	write_intctl_1(read_intctl_1() & ~(1 << (irq - 32)));
+	write_intctl_1(read_intctl_1() & ~(1 << (d->irq - 32)));
 }
 
 static void
-iop13xx_irq_mask2 (unsigned int irq)
+iop13xx_irq_mask2 (struct irq_data *d)
 {
-	write_intctl_2(read_intctl_2() & ~(1 << (irq - 64)));
+	write_intctl_2(read_intctl_2() & ~(1 << (d->irq - 64)));
 }
 
 static void
-iop13xx_irq_mask3 (unsigned int irq)
+iop13xx_irq_mask3 (struct irq_data *d)
 {
-	write_intctl_3(read_intctl_3() & ~(1 << (irq - 96)));
+	write_intctl_3(read_intctl_3() & ~(1 << (d->irq - 96)));
 }
 
 static void
-iop13xx_irq_unmask0(unsigned int irq)
+iop13xx_irq_unmask0(struct irq_data *d)
 {
-	write_intctl_0(read_intctl_0() | (1 << (irq - 0)));
+	write_intctl_0(read_intctl_0() | (1 << (d->irq - 0)));
 }
 
 static void
-iop13xx_irq_unmask1(unsigned int irq)
+iop13xx_irq_unmask1(struct irq_data *d)
 {
-	write_intctl_1(read_intctl_1() | (1 << (irq - 32)));
+	write_intctl_1(read_intctl_1() | (1 << (d->irq - 32)));
 }
 
 static void
-iop13xx_irq_unmask2(unsigned int irq)
+iop13xx_irq_unmask2(struct irq_data *d)
 {
-	write_intctl_2(read_intctl_2() | (1 << (irq - 64)));
+	write_intctl_2(read_intctl_2() | (1 << (d->irq - 64)));
 }
 
 static void
-iop13xx_irq_unmask3(unsigned int irq)
+iop13xx_irq_unmask3(struct irq_data *d)
 {
-	write_intctl_3(read_intctl_3() | (1 << (irq - 96)));
+	write_intctl_3(read_intctl_3() | (1 << (d->irq - 96)));
 }
 
 static struct irq_chip iop13xx_irqchip1 = {
-	.name	= "IOP13xx-1",
-	.ack    = iop13xx_irq_mask0,
-	.mask   = iop13xx_irq_mask0,
-	.unmask = iop13xx_irq_unmask0,
+	.name       = "IOP13xx-1",
+	.irq_ack    = iop13xx_irq_mask0,
+	.irq_mask   = iop13xx_irq_mask0,
+	.irq_unmask = iop13xx_irq_unmask0,
 };
 
 static struct irq_chip iop13xx_irqchip2 = {
-	.name	= "IOP13xx-2",
-	.ack    = iop13xx_irq_mask1,
-	.mask   = iop13xx_irq_mask1,
-	.unmask = iop13xx_irq_unmask1,
+	.name       = "IOP13xx-2",
+	.irq_ack    = iop13xx_irq_mask1,
+	.irq_mask   = iop13xx_irq_mask1,
+	.irq_unmask = iop13xx_irq_unmask1,
 };
 
 static struct irq_chip iop13xx_irqchip3 = {
-	.name	= "IOP13xx-3",
-	.ack    = iop13xx_irq_mask2,
-	.mask   = iop13xx_irq_mask2,
-	.unmask = iop13xx_irq_unmask2,
+	.name       = "IOP13xx-3",
+	.irq_ack    = iop13xx_irq_mask2,
+	.irq_mask   = iop13xx_irq_mask2,
+	.irq_unmask = iop13xx_irq_unmask2,
 };
 
 static struct irq_chip iop13xx_irqchip4 = {
-	.name	= "IOP13xx-4",
-	.ack    = iop13xx_irq_mask3,
-	.mask   = iop13xx_irq_mask3,
-	.unmask = iop13xx_irq_unmask3,
+	.name       = "IOP13xx-4",
+	.irq_ack    = iop13xx_irq_mask3,
+	.irq_mask   = iop13xx_irq_mask3,
+	.irq_unmask = iop13xx_irq_unmask3,
 };
 
 extern void iop_init_cp6_handler(void);
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index 7149fcc..c9c02e3 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -156,14 +156,14 @@ void arch_teardown_msi_irq(unsigned int irq)
 	destroy_irq(irq);
 }
 
-static void iop13xx_msi_nop(unsigned int irq)
+static void iop13xx_msi_nop(struct irq_data *d)
 {
 	return;
 }
 
 static struct irq_chip iop13xx_msi_chip = {
 	.name = "PCI-MSI",
-	.ack = iop13xx_msi_nop,
+	.irq_ack = iop13xx_msi_nop,
 	.irq_enable = unmask_msi_irq,
 	.irq_disable = mask_msi_irq,
 	.irq_mask = mask_msi_irq,
-- 
1.7.1

[PATCH 21/54] ARM: iop32x: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-iop32x/irq.c |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index ba59b2d..d3426a1 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -32,24 +32,24 @@ static void intstr_write(u32 val)
 }
 
 static void
-iop32x_irq_mask(unsigned int irq)
+iop32x_irq_mask(struct irq_data *d)
 {
-	iop32x_mask &= ~(1 << irq);
+	iop32x_mask &= ~(1 << d->irq);
 	intctl_write(iop32x_mask);
 }
 
 static void
-iop32x_irq_unmask(unsigned int irq)
+iop32x_irq_unmask(struct irq_data *d)
 {
-	iop32x_mask |= 1 << irq;
+	iop32x_mask |= 1 << d->irq;
 	intctl_write(iop32x_mask);
 }
 
 struct irq_chip ext_chip = {
-	.name	= "IOP32x",
-	.ack	= iop32x_irq_mask,
-	.mask	= iop32x_irq_mask,
-	.unmask	= iop32x_irq_unmask,
+	.name		= "IOP32x",
+	.irq_ack	= iop32x_irq_mask,
+	.irq_mask	= iop32x_irq_mask,
+	.irq_unmask	= iop32x_irq_unmask,
 };
 
 void __init iop32x_init_irq(void)
-- 
1.7.1

[PATCH 22/54] ARM: iop33x: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-iop33x/irq.c |   32 ++++++++++++++++----------------
 1 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index abb4ea2..0ff2f74 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -53,45 +53,45 @@ static void intsize_write(u32 val)
 }
 
 static void
-iop33x_irq_mask1 (unsigned int irq)
+iop33x_irq_mask1 (struct irq_data *d)
 {
-	iop33x_mask0 &= ~(1 << irq);
+	iop33x_mask0 &= ~(1 << d->irq);
 	intctl0_write(iop33x_mask0);
 }
 
 static void
-iop33x_irq_mask2 (unsigned int irq)
+iop33x_irq_mask2 (struct irq_data *d)
 {
-	iop33x_mask1 &= ~(1 << (irq - 32));
+	iop33x_mask1 &= ~(1 << (d->irq - 32));
 	intctl1_write(iop33x_mask1);
 }
 
 static void
-iop33x_irq_unmask1(unsigned int irq)
+iop33x_irq_unmask1(struct irq_data *d)
 {
-	iop33x_mask0 |= 1 << irq;
+	iop33x_mask0 |= 1 << d->irq;
 	intctl0_write(iop33x_mask0);
 }
 
 static void
-iop33x_irq_unmask2(unsigned int irq)
+iop33x_irq_unmask2(struct irq_data *d)
 {
-	iop33x_mask1 |= (1 << (irq - 32));
+	iop33x_mask1 |= (1 << (d->irq - 32));
 	intctl1_write(iop33x_mask1);
 }
 
 struct irq_chip iop33x_irqchip1 = {
-	.name	= "IOP33x-1",
-	.ack	= iop33x_irq_mask1,
-	.mask	= iop33x_irq_mask1,
-	.unmask	= iop33x_irq_unmask1,
+	.name		= "IOP33x-1",
+	.irq_ack	= iop33x_irq_mask1,
+	.irq_mask	= iop33x_irq_mask1,
+	.irq_unmask	= iop33x_irq_unmask1,
 };
 
 struct irq_chip iop33x_irqchip2 = {
-	.name	= "IOP33x-2",
-	.ack	= iop33x_irq_mask2,
-	.mask	= iop33x_irq_mask2,
-	.unmask	= iop33x_irq_unmask2,
+	.name		= "IOP33x-2",
+	.irq_ack	= iop33x_irq_mask2,
+	.irq_mask	= iop33x_irq_mask2,
+	.irq_unmask	= iop33x_irq_unmask2,
 };
 
 void __init iop33x_init_irq(void)
-- 
1.7.1

[PATCH 23/54] ARM: ixp2000: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-ixp2000/core.c     |   70 ++++++++++++++++++++-----------------
 arch/arm/mach-ixp2000/ixdp2x00.c |   18 +++++-----
 arch/arm/mach-ixp2000/ixdp2x01.c |   18 +++++-----
 3 files changed, 56 insertions(+), 50 deletions(-)

diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index e24e3d0..5fc4e06 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -309,9 +309,9 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc)
 	}
 }
 
-static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
+static int ixp2000_GPIO_irq_type(struct irq_data *d, unsigned int type)
 {
-	int line = irq - IRQ_IXP2000_GPIO0;
+	int line = d->irq - IRQ_IXP2000_GPIO0;
 
 	/*
 	 * First, configure this GPIO line as an input.
@@ -342,8 +342,10 @@ static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
 	return 0;
 }
 
-static void ixp2000_GPIO_irq_mask_ack(unsigned int irq)
+static void ixp2000_GPIO_irq_mask_ack(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
+
 	ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
 
 	ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
@@ -351,38 +353,42 @@ static void ixp2000_GPIO_irq_mask_ack(unsigned int irq)
 	ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0)));
 }
 
-static void ixp2000_GPIO_irq_mask(unsigned int irq)
+static void ixp2000_GPIO_irq_mask(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
+
 	ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
 }
 
-static void ixp2000_GPIO_irq_unmask(unsigned int irq)
+static void ixp2000_GPIO_irq_unmask(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
+
 	ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
 }
 
 static struct irq_chip ixp2000_GPIO_irq_chip = {
-	.ack		= ixp2000_GPIO_irq_mask_ack,
-	.mask		= ixp2000_GPIO_irq_mask,
-	.unmask		= ixp2000_GPIO_irq_unmask,
-	.set_type	= ixp2000_GPIO_irq_type,
+	.irq_ack	= ixp2000_GPIO_irq_mask_ack,
+	.irq_mask	= ixp2000_GPIO_irq_mask,
+	.irq_unmask	= ixp2000_GPIO_irq_unmask,
+	.irq_set_type	= ixp2000_GPIO_irq_type,
 };
 
-static void ixp2000_pci_irq_mask(unsigned int irq)
+static void ixp2000_pci_irq_mask(struct irq_data *d)
 {
 	unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
-	if (irq == IRQ_IXP2000_PCIA)
+	if (d->irq == IRQ_IXP2000_PCIA)
 		ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26)));
-	else if (irq == IRQ_IXP2000_PCIB)
+	else if (d->irq == IRQ_IXP2000_PCIB)
 		ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27)));
 }
 
-static void ixp2000_pci_irq_unmask(unsigned int irq)
+static void ixp2000_pci_irq_unmask(struct irq_data *d)
 {
 	unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
-	if (irq == IRQ_IXP2000_PCIA)
+	if (d->irq == IRQ_IXP2000_PCIA)
 		ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 26)));
-	else if (irq == IRQ_IXP2000_PCIB)
+	else if (d->irq == IRQ_IXP2000_PCIB)
 		ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 27)));
 }
 
@@ -401,44 +407,44 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc)
 	}
 }
 
-static void ixp2000_err_irq_mask(unsigned int irq)
+static void ixp2000_err_irq_mask(struct irq_data *d)
 {
 	ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR,
-			(1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
+			(1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
 }
 
-static void ixp2000_err_irq_unmask(unsigned int irq)
+static void ixp2000_err_irq_unmask(struct irq_data *d)
 {
 	ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET,
-			(1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
+			(1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
 }
 
 static struct irq_chip ixp2000_err_irq_chip = {
-	.ack	= ixp2000_err_irq_mask,
-	.mask	= ixp2000_err_irq_mask,
-	.unmask	= ixp2000_err_irq_unmask
+	.irq_ack	= ixp2000_err_irq_mask,
+	.irq_mask	= ixp2000_err_irq_mask,
+	.irq_unmask	= ixp2000_err_irq_unmask
 };
 
 static struct irq_chip ixp2000_pci_irq_chip = {
-	.ack	= ixp2000_pci_irq_mask,
-	.mask	= ixp2000_pci_irq_mask,
-	.unmask	= ixp2000_pci_irq_unmask
+	.irq_ack	= ixp2000_pci_irq_mask,
+	.irq_mask	= ixp2000_pci_irq_mask,
+	.irq_unmask	= ixp2000_pci_irq_unmask
 };
 
-static void ixp2000_irq_mask(unsigned int irq)
+static void ixp2000_irq_mask(struct irq_data *d)
 {
-	ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << irq));
+	ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << d->irq));
 }
 
-static void ixp2000_irq_unmask(unsigned int irq)
+static void ixp2000_irq_unmask(struct irq_data *d)
 {
-	ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq));
+	ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << d->irq));
 }
 
 static struct irq_chip ixp2000_irq_chip = {
-	.ack	= ixp2000_irq_mask,
-	.mask	= ixp2000_irq_mask,
-	.unmask	= ixp2000_irq_unmask
+	.irq_ack	= ixp2000_irq_mask,
+	.irq_mask	= ixp2000_irq_mask,
+	.irq_unmask	= ixp2000_irq_unmask
 };
 
 void __init ixp2000_init_irq(void)
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 91fffb9..7d90d3f 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -63,7 +63,7 @@ static struct slowport_cfg slowport_cpld_cfg = {
 };
 #endif
 
-static void ixdp2x00_irq_mask(unsigned int irq)
+static void ixdp2x00_irq_mask(struct irq_data *d)
 {
 	unsigned long dummy;
 	static struct slowport_cfg old_cfg;
@@ -78,7 +78,7 @@ static void ixdp2x00_irq_mask(unsigned int irq)
 #endif
 
 	dummy = *board_irq_mask;
-	dummy |=  IXP2000_BOARD_IRQ_MASK(irq);
+	dummy |=  IXP2000_BOARD_IRQ_MASK(d->irq);
 	ixp2000_reg_wrb(board_irq_mask, dummy);
 
 #ifdef CONFIG_ARCH_IXDP2400
@@ -87,7 +87,7 @@ static void ixdp2x00_irq_mask(unsigned int irq)
 #endif
 }
 
-static void ixdp2x00_irq_unmask(unsigned int irq)
+static void ixdp2x00_irq_unmask(struct irq_data *d)
 {
 	unsigned long dummy;
 	static struct slowport_cfg old_cfg;
@@ -98,7 +98,7 @@ static void ixdp2x00_irq_unmask(unsigned int irq)
 #endif
 
 	dummy = *board_irq_mask;
-	dummy &=  ~IXP2000_BOARD_IRQ_MASK(irq);
+	dummy &=  ~IXP2000_BOARD_IRQ_MASK(d->irq);
 	ixp2000_reg_wrb(board_irq_mask, dummy);
 
 	if (machine_is_ixdp2400()) 
@@ -111,7 +111,7 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
 	static struct slowport_cfg old_cfg;
 	int i;
 
-	desc->chip->mask(irq);
+	desc->irq_data.chip->irq_mask(&desc->irq_data);
 
 #ifdef CONFIG_ARCH_IXDP2400
 	if (machine_is_ixdp2400())
@@ -133,13 +133,13 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
 		}
 	}
 
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 static struct irq_chip ixdp2x00_cpld_irq_chip = {
-	.ack	= ixdp2x00_irq_mask,
-	.mask	= ixdp2x00_irq_mask,
-	.unmask	= ixdp2x00_irq_unmask
+	.irq_ack	= ixdp2x00_irq_mask,
+	.irq_mask	= ixdp2x00_irq_mask,
+	.irq_unmask	= ixdp2x00_irq_unmask
 };
 
 void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs)
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 6c121bd..34b1b2a 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -48,16 +48,16 @@
 /*************************************************************************
  * IXDP2x01 IRQ Handling
  *************************************************************************/
-static void ixdp2x01_irq_mask(unsigned int irq)
+static void ixdp2x01_irq_mask(struct irq_data *d)
 {
 	ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG,
-				IXP2000_BOARD_IRQ_MASK(irq));
+				IXP2000_BOARD_IRQ_MASK(d->irq));
 }
 
-static void ixdp2x01_irq_unmask(unsigned int irq)
+static void ixdp2x01_irq_unmask(struct irq_data *d)
 {
 	ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG,
-				IXP2000_BOARD_IRQ_MASK(irq));
+				IXP2000_BOARD_IRQ_MASK(d->irq));
 }
 
 static u32 valid_irq_mask;
@@ -67,7 +67,7 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
 	u32 ex_interrupt;
 	int i;
 
-	desc->chip->mask(irq);
+	desc->irq_data.chip->irq_mask(&desc->irq_data);
 
 	ex_interrupt = *IXDP2X01_INT_STAT_REG & valid_irq_mask;
 
@@ -83,13 +83,13 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
 		}
 	}
 
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 static struct irq_chip ixdp2x01_irq_chip = {
-	.mask	= ixdp2x01_irq_mask,
-	.ack	= ixdp2x01_irq_mask,
-	.unmask	= ixdp2x01_irq_unmask
+	.irq_mask	= ixdp2x01_irq_mask,
+	.irq_ack	= ixdp2x01_irq_mask,
+	.irq_unmask	= ixdp2x01_irq_unmask
 };
 
 /*
-- 
1.7.1

[PATCH 24/54] ARM: ixp23xx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-ixp23xx/core.c     |   55 +++++++++++++++++++++----------------
 arch/arm/mach-ixp23xx/ixdp2351.c |   36 ++++++++++++------------
 2 files changed, 49 insertions(+), 42 deletions(-)

diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index aa4c442..9c8a339 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -111,9 +111,9 @@ enum ixp23xx_irq_type {
 
 static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type);
 
-static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
+static int ixp23xx_irq_set_type(struct irq_data *d, unsigned int type)
 {
-	int line = irq - IRQ_IXP23XX_GPIO6 + 6;
+	int line = d->irq - IRQ_IXP23XX_GPIO6 + 6;
 	u32 int_style;
 	enum ixp23xx_irq_type irq_type;
 	volatile u32 *int_reg;
@@ -149,7 +149,7 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
 		return -EINVAL;
 	}
 
-	ixp23xx_config_irq(irq, irq_type);
+	ixp23xx_config_irq(d->irq, irq_type);
 
 	if (line >= 8) {	/* pins 8-15 */
 		line -= 8;
@@ -173,9 +173,10 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
 	return 0;
 }
 
-static void ixp23xx_irq_mask(unsigned int irq)
+static void ixp23xx_irq_mask(struct irq_data *d)
 {
 	volatile unsigned long *intr_reg;
+	unsigned int irq = d->irq;
 
 	if (irq >= 56)
 		irq += 8;
@@ -184,9 +185,9 @@ static void ixp23xx_irq_mask(unsigned int irq)
 	*intr_reg &= ~(1 << (irq % 32));
 }
 
-static void ixp23xx_irq_ack(unsigned int irq)
+static void ixp23xx_irq_ack(struct irq_data *d)
 {
-	int line = irq - IRQ_IXP23XX_GPIO6 + 6;
+	int line = d->irq - IRQ_IXP23XX_GPIO6 + 6;
 
 	if ((line < 6) || (line > 15))
 		return;
@@ -198,11 +199,12 @@ static void ixp23xx_irq_ack(unsigned int irq)
  * Level triggered interrupts on GPIO lines can only be cleared when the
  * interrupt condition disappears.
  */
-static void ixp23xx_irq_level_unmask(unsigned int irq)
+static void ixp23xx_irq_level_unmask(struct irq_data *d)
 {
 	volatile unsigned long *intr_reg;
+	unsigned int irq = d->irq;
 
-	ixp23xx_irq_ack(irq);
+	ixp23xx_irq_ack(d);
 
 	if (irq >= 56)
 		irq += 8;
@@ -211,9 +213,10 @@ static void ixp23xx_irq_level_unmask(unsigned int irq)
 	*intr_reg |= (1 << (irq % 32));
 }
 
-static void ixp23xx_irq_edge_unmask(unsigned int irq)
+static void ixp23xx_irq_edge_unmask(struct irq_data *d)
 {
 	volatile unsigned long *intr_reg;
+	unsigned int irq = d->irq;
 
 	if (irq >= 56)
 		irq += 8;
@@ -223,26 +226,30 @@ static void ixp23xx_irq_edge_unmask(unsigned int irq)
 }
 
 static struct irq_chip ixp23xx_irq_level_chip = {
-	.ack		= ixp23xx_irq_mask,
-	.mask		= ixp23xx_irq_mask,
-	.unmask		= ixp23xx_irq_level_unmask,
-	.set_type	= ixp23xx_irq_set_type
+	.irq_ack	= ixp23xx_irq_mask,
+	.irq_mask	= ixp23xx_irq_mask,
+	.irq_unmask	= ixp23xx_irq_level_unmask,
+	.irq_set_type	= ixp23xx_irq_set_type
 };
 
 static struct irq_chip ixp23xx_irq_edge_chip = {
-	.ack		= ixp23xx_irq_ack,
-	.mask		= ixp23xx_irq_mask,
-	.unmask		= ixp23xx_irq_edge_unmask,
-	.set_type	= ixp23xx_irq_set_type
+	.irq_ack	= ixp23xx_irq_ack,
+	.irq_mask	= ixp23xx_irq_mask,
+	.irq_unmask	= ixp23xx_irq_edge_unmask,
+	.irq_set_type	= ixp23xx_irq_set_type
 };
 
-static void ixp23xx_pci_irq_mask(unsigned int irq)
+static void ixp23xx_pci_irq_mask(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
+
 	*IXP23XX_PCI_XSCALE_INT_ENABLE &= ~(1 << (IRQ_IXP23XX_INTA + 27 - irq));
 }
 
-static void ixp23xx_pci_irq_unmask(unsigned int irq)
+static void ixp23xx_pci_irq_unmask(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
+
 	*IXP23XX_PCI_XSCALE_INT_ENABLE |= (1 << (IRQ_IXP23XX_INTA + 27 - irq));
 }
 
@@ -256,7 +263,7 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
 
 	pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	/* See which PCI_INTA, or PCI_INTB interrupted */
 	if (pci_interrupt & (1 << 26)) {
@@ -269,13 +276,13 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
 
 	generic_handle_irq(irqno);
 
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 static struct irq_chip ixp23xx_pci_irq_chip = {
-	.ack	= ixp23xx_pci_irq_mask,
-	.mask	= ixp23xx_pci_irq_mask,
-	.unmask	= ixp23xx_pci_irq_unmask
+	.irq_ack	= ixp23xx_pci_irq_mask,
+	.irq_mask	= ixp23xx_pci_irq_mask,
+	.irq_unmask	= ixp23xx_pci_irq_unmask
 };
 
 static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 664e39c..181116a 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -48,14 +48,14 @@
 /*
  * IXDP2351 Interrupt Handling
  */
-static void ixdp2351_inta_mask(unsigned int irq)
+static void ixdp2351_inta_mask(struct irq_data *d)
 {
-	*IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(irq);
+	*IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(d->irq);
 }
 
-static void ixdp2351_inta_unmask(unsigned int irq)
+static void ixdp2351_inta_unmask(struct irq_data *d)
 {
-	*IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq);
+	*IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(d->irq);
 }
 
 static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
@@ -64,7 +64,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
 		*IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID;
 	int i;
 
-	desc->chip->mask(irq);
+	desc->irq_data.chip->irq_mask(&desc->irq_data);
 
 	for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
 		if (ex_interrupt & (1 << i)) {
@@ -74,23 +74,23 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
 		}
 	}
 
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 static struct irq_chip ixdp2351_inta_chip = {
-	.ack	= ixdp2351_inta_mask,
-	.mask	= ixdp2351_inta_mask,
-	.unmask	= ixdp2351_inta_unmask
+	.irq_ack	= ixdp2351_inta_mask,
+	.irq_mask	= ixdp2351_inta_mask,
+	.irq_unmask	= ixdp2351_inta_unmask
 };
 
-static void ixdp2351_intb_mask(unsigned int irq)
+static void ixdp2351_intb_mask(struct irq_data *d)
 {
-	*IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(irq);
+	*IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(d->irq);
 }
 
-static void ixdp2351_intb_unmask(unsigned int irq)
+static void ixdp2351_intb_unmask(struct irq_data *d)
 {
-	*IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq);
+	*IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(d->irq);
 }
 
 static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
@@ -99,7 +99,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
 		*IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID;
 	int i;
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
 		if (ex_interrupt & (1 << i)) {
@@ -109,13 +109,13 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
 		}
 	}
 
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 static struct irq_chip ixdp2351_intb_chip = {
-	.ack	= ixdp2351_intb_mask,
-	.mask	= ixdp2351_intb_mask,
-	.unmask	= ixdp2351_intb_unmask
+	.irq_ack	= ixdp2351_intb_mask,
+	.irq_mask	= ixdp2351_intb_mask,
+	.irq_unmask	= ixdp2351_intb_unmask
 };
 
 void __init ixdp2351_init_irq(void)
-- 
1.7.1

[PATCH 25/54] ARM: ixp4xx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-ixp4xx/common.c |   42 ++++++++++++++++++++--------------------
 1 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 0bce097..886a875 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -127,9 +127,9 @@ int irq_to_gpio(unsigned int irq)
 }
 EXPORT_SYMBOL(irq_to_gpio);
 
-static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
+static int ixp4xx_set_irq_type(struct irq_data *d, unsigned int type)
 {
-	int line = irq2gpio[irq];
+	int line = irq2gpio[d->irq];
 	u32 int_style;
 	enum ixp4xx_irq_type irq_type;
 	volatile u32 *int_reg;
@@ -166,9 +166,9 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
 	}
 
 	if (irq_type == IXP4XX_IRQ_EDGE)
-		ixp4xx_irq_edge |= (1 << irq);
+		ixp4xx_irq_edge |= (1 << d->irq);
 	else
-		ixp4xx_irq_edge &= ~(1 << irq);
+		ixp4xx_irq_edge &= ~(1 << d->irq);
 
 	if (line >= 8) {	/* pins 8-15 */
 		line -= 8;
@@ -187,22 +187,22 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
 	*int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
 
 	/* Configure the line as an input */
-	gpio_line_config(irq2gpio[irq], IXP4XX_GPIO_IN);
+	gpio_line_config(irq2gpio[d->irq], IXP4XX_GPIO_IN);
 
 	return 0;
 }
 
-static void ixp4xx_irq_mask(unsigned int irq)
+static void ixp4xx_irq_mask(struct irq_data *d)
 {
-	if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
-		*IXP4XX_ICMR2 &= ~(1 << (irq - 32));
+	if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32)
+		*IXP4XX_ICMR2 &= ~(1 << (d->irq - 32));
 	else
-		*IXP4XX_ICMR &= ~(1 << irq);
+		*IXP4XX_ICMR &= ~(1 << d->irq);
 }
 
-static void ixp4xx_irq_ack(unsigned int irq)
+static void ixp4xx_irq_ack(struct irq_data *d)
 {
-	int line = (irq < 32) ? irq2gpio[irq] : -1;
+	int line = (d->irq < 32) ? irq2gpio[d->irq] : -1;
 
 	if (line >= 0)
 		*IXP4XX_GPIO_GPISR = (1 << line);
@@ -212,23 +212,23 @@ static void ixp4xx_irq_ack(unsigned int irq)
  * Level triggered interrupts on GPIO lines can only be cleared when the
  * interrupt condition disappears.
  */
-static void ixp4xx_irq_unmask(unsigned int irq)
+static void ixp4xx_irq_unmask(struct irq_data *d)
 {
-	if (!(ixp4xx_irq_edge & (1 << irq)))
-		ixp4xx_irq_ack(irq);
+	if (!(ixp4xx_irq_edge & (1 << d->irq)))
+		ixp4xx_irq_ack(d);
 
-	if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
-		*IXP4XX_ICMR2 |= (1 << (irq - 32));
+	if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32)
+		*IXP4XX_ICMR2 |= (1 << (d->irq - 32));
 	else
-		*IXP4XX_ICMR |= (1 << irq);
+		*IXP4XX_ICMR |= (1 << d->irq);
 }
 
 static struct irq_chip ixp4xx_irq_chip = {
 	.name		= "IXP4xx",
-	.ack		= ixp4xx_irq_ack,
-	.mask		= ixp4xx_irq_mask,
-	.unmask		= ixp4xx_irq_unmask,
-	.set_type	= ixp4xx_set_irq_type,
+	.irq_ack	= ixp4xx_irq_ack,
+	.irq_mask	= ixp4xx_irq_mask,
+	.irq_unmask	= ixp4xx_irq_unmask,
+	.irq_set_type	= ixp4xx_set_irq_type,
 };
 
 void __init ixp4xx_init_irq(void)
-- 
1.7.1

[PATCH 26/54] ARM: ks8695: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-ks8695/irq.c |   43 ++++++++++++++++++++++---------------------
 1 files changed, 22 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index e375c1d..7998cca 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -34,29 +34,29 @@
 #include <mach/regs-irq.h>
 #include <mach/regs-gpio.h>
 
-static void ks8695_irq_mask(unsigned int irqno)
+static void ks8695_irq_mask(struct irq_data *d)
 {
 	unsigned long inten;
 
 	inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
-	inten &= ~(1 << irqno);
+	inten &= ~(1 << d->irq);
 
 	__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
 }
 
-static void ks8695_irq_unmask(unsigned int irqno)
+static void ks8695_irq_unmask(struct irq_data *d)
 {
 	unsigned long inten;
 
 	inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
-	inten |= (1 << irqno);
+	inten |= (1 << d->irq);
 
 	__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
 }
 
-static void ks8695_irq_ack(unsigned int irqno)
+static void ks8695_irq_ack(struct irq_data *d)
 {
-	__raw_writel((1 << irqno), KS8695_IRQ_VA + KS8695_INTST);
+	__raw_writel((1 << d->irq), KS8695_IRQ_VA + KS8695_INTST);
 }
 
 
@@ -64,7 +64,7 @@ static struct irq_chip ks8695_irq_level_chip;
 static struct irq_chip ks8695_irq_edge_chip;
 
 
-static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
+static int ks8695_irq_set_type(struct irq_data *d, unsigned int type)
 {
 	unsigned long ctrl, mode;
 	unsigned short level_triggered = 0;
@@ -93,7 +93,7 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
 			return -EINVAL;
 	}
 
-	switch (irqno) {
+	switch (d->irq) {
 		case KS8695_IRQ_EXTERN0:
 			ctrl &= ~IOPC_IOEINT0TM;
 			ctrl |= IOPC_IOEINT0_MODE(mode);
@@ -115,12 +115,12 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
 	}
 
 	if (level_triggered) {
-		set_irq_chip(irqno, &ks8695_irq_level_chip);
-		set_irq_handler(irqno, handle_level_irq);
+		set_irq_chip(d->irq, &ks8695_irq_level_chip);
+		set_irq_handler(d->irq, handle_level_irq);
 	}
 	else {
-		set_irq_chip(irqno, &ks8695_irq_edge_chip);
-		set_irq_handler(irqno, handle_edge_irq);
+		set_irq_chip(d->irq, &ks8695_irq_edge_chip);
+		set_irq_handler(d->irq, handle_edge_irq);
 	}
 
 	__raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
@@ -128,17 +128,17 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
 }
 
 static struct irq_chip ks8695_irq_level_chip = {
-	.ack		= ks8695_irq_mask,
-	.mask		= ks8695_irq_mask,
-	.unmask		= ks8695_irq_unmask,
-	.set_type	= ks8695_irq_set_type,
+	.irq_ack	= ks8695_irq_mask,
+	.irq_mask	= ks8695_irq_mask,
+	.irq_unmask	= ks8695_irq_unmask,
+	.irq_set_type	= ks8695_irq_set_type,
 };
 
 static struct irq_chip ks8695_irq_edge_chip = {
-	.ack		= ks8695_irq_ack,
-	.mask		= ks8695_irq_mask,
-	.unmask		= ks8695_irq_unmask,
-	.set_type	= ks8695_irq_set_type,
+	.irq_ack	= ks8695_irq_ack,
+	.irq_mask	= ks8695_irq_mask,
+	.irq_unmask	= ks8695_irq_unmask,
+	.irq_set_type	= ks8695_irq_set_type,
 };
 
 void __init ks8695_init_irq(void)
@@ -164,7 +164,8 @@ void __init ks8695_init_irq(void)
 
 			/* Edge-triggered interrupts */
 			default:
-				ks8695_irq_ack(irq);	/* clear pending bit */
+				/* clear pending bit */
+				ks8695_irq_ack(irq_get_irq_data(irq));
 				set_irq_chip(irq, &ks8695_irq_edge_chip);
 				set_irq_handler(irq, handle_edge_irq);
 		}
-- 
1.7.1

[PATCH 27/54] ARM: lh7a40x: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-lh7a40x/arch-kev7a400.c |   20 +++++-----
 arch/arm/mach-lh7a40x/arch-lpd7a40x.c |   25 +++++++------
 arch/arm/mach-lh7a40x/irq-lh7a400.c   |   30 ++++++++--------
 arch/arm/mach-lh7a40x/irq-lh7a404.c   |   60 ++++++++++++++++----------------
 arch/arm/mach-lh7a40x/irq-lpd7a40x.c  |   22 ++++++------
 5 files changed, 79 insertions(+), 78 deletions(-)

diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
index 9088c16..71129c3 100644
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -46,28 +46,28 @@ void __init kev7a400_map_io(void)
 
 static u16 CPLD_IRQ_mask;	/* Mask for CPLD IRQs, 1 == unmasked */
 
-static void kev7a400_ack_cpld_irq (u32 irq)
+static void kev7a400_ack_cpld_irq(struct irq_data *d)
 {
-	CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD);
+	CPLD_CL_INT = 1 << (d->irq - IRQ_KEV7A400_CPLD);
 }
 
-static void kev7a400_mask_cpld_irq (u32 irq)
+static void kev7a400_mask_cpld_irq(struct irq_data *d)
 {
-	CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD));
+	CPLD_IRQ_mask &= ~(1 << (d->irq - IRQ_KEV7A400_CPLD));
 	CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
 }
 
-static void kev7a400_unmask_cpld_irq (u32 irq)
+static void kev7a400_unmask_cpld_irq(struct irq_data *d)
 {
-	CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD);
+	CPLD_IRQ_mask |= 1 << (d->irq - IRQ_KEV7A400_CPLD);
 	CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
 }
 
 static struct irq_chip kev7a400_cpld_chip = {
-	.name	= "CPLD",
-	.ack	= kev7a400_ack_cpld_irq,
-	.mask	= kev7a400_mask_cpld_irq,
-	.unmask	= kev7a400_unmask_cpld_irq,
+	.name		= "CPLD",
+	.irq_ack	= kev7a400_ack_cpld_irq,
+	.irq_mask	= kev7a400_mask_cpld_irq,
+	.irq_unmask	= kev7a400_unmask_cpld_irq,
 };
 
 
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index 7315a56..e735546 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -159,7 +159,7 @@ static void __init lpd7a40x_init (void)
 #endif
 }
 
-static void lh7a40x_ack_cpld_irq (u32 irq)
+static void lh7a40x_ack_cpld_irq(struct irq_data *d)
 {
 	/* CPLD doesn't have ack capability, but some devices may */
 
@@ -167,14 +167,14 @@ static void lh7a40x_ack_cpld_irq (u32 irq)
 	/* The touch control *must* mask the interrupt because the
 	 * interrupt bit is read by the driver to determine if the pen
 	 * is still down. */
-	if (irq == IRQ_TOUCH)
+	if (d->irq == IRQ_TOUCH)
 		CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH;
 #endif
 }
 
-static void lh7a40x_mask_cpld_irq (u32 irq)
+static void lh7a40x_mask_cpld_irq(struct irq_data *d)
 {
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_LPD7A40X_ETH_INT:
 		CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET;
 		break;
@@ -186,9 +186,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq)
 	}
 }
 
-static void lh7a40x_unmask_cpld_irq (u32 irq)
+static void lh7a40x_unmask_cpld_irq(struct irq_data *d)
 {
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_LPD7A40X_ETH_INT:
 		CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET;
 		break;
@@ -201,17 +201,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq)
 }
 
 static struct irq_chip lpd7a40x_cpld_chip = {
-	.name	= "CPLD",
-	.ack	= lh7a40x_ack_cpld_irq,
-	.mask	= lh7a40x_mask_cpld_irq,
-	.unmask	= lh7a40x_unmask_cpld_irq,
+	.name		= "CPLD",
+	.irq_ack	= lh7a40x_ack_cpld_irq,
+	.irq_mask	= lh7a40x_mask_cpld_irq,
+	.irq_unmask	= lh7a40x_unmask_cpld_irq,
 };
 
 static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
 {
 	unsigned int mask = CPLD_INTERRUPTS;
 
-	desc->chip->ack (irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	if ((mask & (1<<0)) == 0)	/* WLAN */
 		generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -221,7 +221,8 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
 		generic_handle_irq(IRQ_TOUCH);
 #endif
 
-	desc->chip->unmask (irq); /* Level-triggered need this */
+	/* Level-triggered need this */
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c
index 1ad3afc..f2e7e65 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a400.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c
@@ -21,34 +21,34 @@
 
   /* CPU IRQ handling */
 
-static void lh7a400_mask_irq (u32 irq)
+static void lh7a400_mask_irq(struct irq_data *d)
 {
-	INTC_INTENC = (1 << irq);
+	INTC_INTENC = (1 << d->irq);
 }
 
-static void lh7a400_unmask_irq (u32 irq)
+static void lh7a400_unmask_irq(struct irq_data *d)
 {
-	INTC_INTENS = (1 << irq);
+	INTC_INTENS = (1 << d->irq);
 }
 
-static void lh7a400_ack_gpio_irq (u32 irq)
+static void lh7a400_ack_gpio_irq(struct irq_data *d)
 {
-	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
-	INTC_INTENC = (1 << irq);
+	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
+	INTC_INTENC = (1 << d->irq);
 }
 
 static struct irq_chip lh7a400_internal_chip = {
-	.name	= "MPU",
-	.ack	= lh7a400_mask_irq, /* Level triggering -> mask is ack */
-	.mask	= lh7a400_mask_irq,
-	.unmask	= lh7a400_unmask_irq,
+	.name		= "MPU",
+	.irq_ack	= lh7a400_mask_irq, /* Level triggering -> mask is ack */
+	.irq_mask	= lh7a400_mask_irq,
+	.irq_unmask	= lh7a400_unmask_irq,
 };
 
 static struct irq_chip lh7a400_gpio_chip = {
-	.name	= "GPIO",
-	.ack	= lh7a400_ack_gpio_irq,
-	.mask	= lh7a400_mask_irq,
-	.unmask	= lh7a400_unmask_irq,
+	.name		= "GPIO",
+	.irq_ack	= lh7a400_ack_gpio_irq,
+	.irq_mask	= lh7a400_mask_irq,
+	.irq_unmask	= lh7a400_unmask_irq,
 };
 
 
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c
index 12b045b..14b1733 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a404.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c
@@ -43,64 +43,64 @@ static unsigned char irq_pri_vic2[] = {
 
   /* CPU IRQ handling */
 
-static void lh7a404_vic1_mask_irq (u32 irq)
+static void lh7a404_vic1_mask_irq(struct irq_data *d)
 {
-	VIC1_INTENCLR = (1 << irq);
+	VIC1_INTENCLR = (1 << d->irq);
 }
 
-static void lh7a404_vic1_unmask_irq (u32 irq)
+static void lh7a404_vic1_unmask_irq(struct irq_data *d)
 {
-	VIC1_INTEN = (1 << irq);
+	VIC1_INTEN = (1 << d->irq);
 }
 
-static void lh7a404_vic2_mask_irq (u32 irq)
+static void lh7a404_vic2_mask_irq(struct irq_data *d)
 {
-	VIC2_INTENCLR = (1 << (irq - 32));
+	VIC2_INTENCLR = (1 << (d->irq - 32));
 }
 
-static void lh7a404_vic2_unmask_irq (u32 irq)
+static void lh7a404_vic2_unmask_irq(struct irq_data *d)
 {
-	VIC2_INTEN = (1 << (irq - 32));
+	VIC2_INTEN = (1 << (d->irq - 32));
 }
 
-static void lh7a404_vic1_ack_gpio_irq (u32 irq)
+static void lh7a404_vic1_ack_gpio_irq(struct irq_data *d)
 {
-	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
-	VIC1_INTENCLR = (1 << irq);
+	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
+	VIC1_INTENCLR = (1 << d->irq);
 }
 
-static void lh7a404_vic2_ack_gpio_irq (u32 irq)
+static void lh7a404_vic2_ack_gpio_irq(struct irq_data *d)
 {
-	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
-	VIC2_INTENCLR = (1 << irq);
+	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
+	VIC2_INTENCLR = (1 << d->irq);
 }
 
 static struct irq_chip lh7a404_vic1_chip = {
-	.name	= "VIC1",
-	.ack	= lh7a404_vic1_mask_irq, /* Because level-triggered */
-	.mask	= lh7a404_vic1_mask_irq,
-	.unmask	= lh7a404_vic1_unmask_irq,
+	.name		= "VIC1",
+	.irq_ack	= lh7a404_vic1_mask_irq, /* Because level-triggered */
+	.irq_mask	= lh7a404_vic1_mask_irq,
+	.irq_unmask	= lh7a404_vic1_unmask_irq,
 };
 
 static struct irq_chip lh7a404_vic2_chip = {
-	.name	= "VIC2",
-	.ack	= lh7a404_vic2_mask_irq, /* Because level-triggered */
-	.mask	= lh7a404_vic2_mask_irq,
-	.unmask	= lh7a404_vic2_unmask_irq,
+	.name		= "VIC2",
+	.irq_ack	= lh7a404_vic2_mask_irq, /* Because level-triggered */
+	.irq_mask	= lh7a404_vic2_mask_irq,
+	.irq_unmask	= lh7a404_vic2_unmask_irq,
 };
 
 static struct irq_chip lh7a404_gpio_vic1_chip = {
-	.name	= "GPIO-VIC1",
-	.ack	= lh7a404_vic1_ack_gpio_irq,
-	.mask	= lh7a404_vic1_mask_irq,
-	.unmask	= lh7a404_vic1_unmask_irq,
+	.name		= "GPIO-VIC1",
+	.irq_ack	= lh7a404_vic1_ack_gpio_irq,
+	.irq_mask	= lh7a404_vic1_mask_irq,
+	.irq_unmask	= lh7a404_vic1_unmask_irq,
 };
 
 static struct irq_chip lh7a404_gpio_vic2_chip = {
-	.name	= "GPIO-VIC2",
-	.ack	= lh7a404_vic2_ack_gpio_irq,
-	.mask	= lh7a404_vic2_mask_irq,
-	.unmask	= lh7a404_vic2_unmask_irq,
+	.name		= "GPIO-VIC2",
+	.irq_ack	= lh7a404_vic2_ack_gpio_irq,
+	.irq_mask	= lh7a404_vic2_mask_irq,
+	.irq_unmask	= lh7a404_vic2_unmask_irq,
 };
 
   /* IRQ initialization */
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
index fd033bb..1bfdcdd 100644
--- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
@@ -20,14 +20,14 @@
 
 #include "common.h"
 
-static void lh7a40x_ack_cpld_irq (u32 irq)
+static void lh7a40x_ack_cpld_irq(struct irq_data *d)
 {
 	/* CPLD doesn't have ack capability */
 }
 
-static void lh7a40x_mask_cpld_irq (u32 irq)
+static void lh7a40x_mask_cpld_irq(struct irq_data *d)
 {
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_LPD7A40X_ETH_INT:
 		CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4;
 		break;
@@ -37,9 +37,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq)
 	}
 }
 
-static void lh7a40x_unmask_cpld_irq (u32 irq)
+static void lh7a40x_unmask_cpld_irq(struct irq_data *d)
 {
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_LPD7A40X_ETH_INT:
 		CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4;
 		break;
@@ -50,17 +50,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq)
 }
 
 static struct irq_chip lh7a40x_cpld_chip = {
-	.name	= "CPLD",
-	.ack	= lh7a40x_ack_cpld_irq,
-	.mask	= lh7a40x_mask_cpld_irq,
-	.unmask	= lh7a40x_unmask_cpld_irq,
+	.name		= "CPLD",
+	.irq_ack	= lh7a40x_ack_cpld_irq,
+	.irq_mask	= lh7a40x_mask_cpld_irq,
+	.irq_unmask	= lh7a40x_unmask_cpld_irq,
 };
 
 static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
 {
 	unsigned int mask = CPLD_INTERRUPTS;
 
-	desc->chip->ack (irq);
+	desc->irq_data.chip->ack (irq);
 
 	if ((mask & 0x1) == 0)	/* WLAN */
 		generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -68,7 +68,7 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
 	if ((mask & 0x2) == 0)	/* Touch */
 		generic_handle_irq(IRQ_LPD7A400_TS);
 
-	desc->chip->unmask (irq); /* Level-triggered need this */
+	desc->irq_data.chip->unmask (irq); /* Level-triggered need this */
 }
 
 
-- 
1.7.1

[PATCH 28/54] ARM: lpc32xx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-lpc32xx/irq.c |   56 +++++++++++++++++++++---------------------
 1 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index bd0df26..316ecbf 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -191,38 +191,38 @@ static void get_controller(unsigned int irq, unsigned int *base,
 	}
 }
 
-static void lpc32xx_mask_irq(unsigned int irq)
+static void lpc32xx_mask_irq(struct irq_data *d)
 {
 	unsigned int reg, ctrl, mask;
 
-	get_controller(irq, &ctrl, &mask);
+	get_controller(d->irq, &ctrl, &mask);
 
 	reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) & ~mask;
 	__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
 }
 
-static void lpc32xx_unmask_irq(unsigned int irq)
+static void lpc32xx_unmask_irq(struct irq_data *d)
 {
 	unsigned int reg, ctrl, mask;
 
-	get_controller(irq, &ctrl, &mask);
+	get_controller(d->irq, &ctrl, &mask);
 
 	reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) | mask;
 	__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
 }
 
-static void lpc32xx_ack_irq(unsigned int irq)
+static void lpc32xx_ack_irq(struct irq_data *d)
 {
 	unsigned int ctrl, mask;
 
-	get_controller(irq, &ctrl, &mask);
+	get_controller(d->irq, &ctrl, &mask);
 
 	__raw_writel(mask, LPC32XX_INTC_RAW_STAT(ctrl));
 
 	/* Also need to clear pending wake event */
-	if (lpc32xx_events[irq].mask != 0)
-		__raw_writel(lpc32xx_events[irq].mask,
-			lpc32xx_events[irq].event_group->rawstat_reg);
+	if (lpc32xx_events[d->irq].mask != 0)
+		__raw_writel(lpc32xx_events[d->irq].mask,
+			lpc32xx_events[d->irq].event_group->rawstat_reg);
 }
 
 static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,
@@ -261,27 +261,27 @@ static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,
 	}
 }
 
-static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type)
+static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
 {
 	switch (type) {
 	case IRQ_TYPE_EDGE_RISING:
 		/* Rising edge sensitive */
-		__lpc32xx_set_irq_type(irq, 1, 1);
+		__lpc32xx_set_irq_type(d->irq, 1, 1);
 		break;
 
 	case IRQ_TYPE_EDGE_FALLING:
 		/* Falling edge sensitive */
-		__lpc32xx_set_irq_type(irq, 0, 1);
+		__lpc32xx_set_irq_type(d->irq, 0, 1);
 		break;
 
 	case IRQ_TYPE_LEVEL_LOW:
 		/* Low level sensitive */
-		__lpc32xx_set_irq_type(irq, 0, 0);
+		__lpc32xx_set_irq_type(d->irq, 0, 0);
 		break;
 
 	case IRQ_TYPE_LEVEL_HIGH:
 		/* High level sensitive */
-		__lpc32xx_set_irq_type(irq, 1, 0);
+		__lpc32xx_set_irq_type(d->irq, 1, 0);
 		break;
 
 	/* Other modes are not supported */
@@ -290,33 +290,33 @@ static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type)
 	}
 
 	/* Ok to use the level handler for all types */
-	set_irq_handler(irq, handle_level_irq);
+	set_irq_handler(d->irq, handle_level_irq);
 
 	return 0;
 }
 
-static int lpc32xx_irq_wake(unsigned int irqno, unsigned int state)
+static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
 {
 	unsigned long eventreg;
 
-	if (lpc32xx_events[irqno].mask != 0) {
-		eventreg = __raw_readl(lpc32xx_events[irqno].
+	if (lpc32xx_events[d->irq].mask != 0) {
+		eventreg = __raw_readl(lpc32xx_events[d->irq].
 			event_group->enab_reg);
 
 		if (state)
-			eventreg |= lpc32xx_events[irqno].mask;
+			eventreg |= lpc32xx_events[d->irq].mask;
 		else
-			eventreg &= ~lpc32xx_events[irqno].mask;
+			eventreg &= ~lpc32xx_events[d->irq].mask;
 
 		__raw_writel(eventreg,
-			lpc32xx_events[irqno].event_group->enab_reg);
+			lpc32xx_events[d->irq].event_group->enab_reg);
 
 		return 0;
 	}
 
 	/* Clear event */
-	__raw_writel(lpc32xx_events[irqno].mask,
-		lpc32xx_events[irqno].event_group->rawstat_reg);
+	__raw_writel(lpc32xx_events[d->irq].mask,
+		lpc32xx_events[d->irq].event_group->rawstat_reg);
 
 	return -ENODEV;
 }
@@ -336,11 +336,11 @@ static void __init lpc32xx_set_default_mappings(unsigned int apr,
 }
 
 static struct irq_chip lpc32xx_irq_chip = {
-	.ack = lpc32xx_ack_irq,
-	.mask = lpc32xx_mask_irq,
-	.unmask = lpc32xx_unmask_irq,
-	.set_type = lpc32xx_set_irq_type,
-	.set_wake = lpc32xx_irq_wake
+	.irq_ack = lpc32xx_ack_irq,
+	.irq_mask = lpc32xx_mask_irq,
+	.irq_unmask = lpc32xx_unmask_irq,
+	.irq_set_type = lpc32xx_set_irq_type,
+	.irq_set_wake = lpc32xx_irq_wake
 };
 
 static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc)
-- 
1.7.1

[PATCH 29/54] ARM: mmp: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-mmp/irq-mmp2.c   |   46 ++++++++++++++++++++-------------------
 arch/arm/mach-mmp/irq-pxa168.c |   18 +++++++-------
 2 files changed, 33 insertions(+), 31 deletions(-)

diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index 01342be..fa03703 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -20,48 +20,48 @@
 
 #include "common.h"
 
-static void icu_mask_irq(unsigned int irq)
+static void icu_mask_irq(struct irq_data *d)
 {
-	uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+	uint32_t r = __raw_readl(ICU_INT_CONF(d->irq));
 
 	r &= ~ICU_INT_ROUTE_PJ4_IRQ;
-	__raw_writel(r, ICU_INT_CONF(irq));
+	__raw_writel(r, ICU_INT_CONF(d->irq));
 }
 
-static void icu_unmask_irq(unsigned int irq)
+static void icu_unmask_irq(struct irq_data *d)
 {
-	uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+	uint32_t r = __raw_readl(ICU_INT_CONF(d->irq));
 
 	r |= ICU_INT_ROUTE_PJ4_IRQ;
-	__raw_writel(r, ICU_INT_CONF(irq));
+	__raw_writel(r, ICU_INT_CONF(d->irq));
 }
 
 static struct irq_chip icu_irq_chip = {
 	.name		= "icu_irq",
-	.mask		= icu_mask_irq,
-	.mask_ack	= icu_mask_irq,
-	.unmask		= icu_unmask_irq,
+	.irq_mask	= icu_mask_irq,
+	.irq_mask_ack	= icu_mask_irq,
+	.irq_unmask	= icu_unmask_irq,
 };
 
-static void pmic_irq_ack(unsigned int irq)
+static void pmic_irq_ack(struct irq_data *d)
 {
-	if (irq == IRQ_MMP2_PMIC)
+	if (d->irq == IRQ_MMP2_PMIC)
 		mmp2_clear_pmic_int();
 }
 
 #define SECOND_IRQ_MASK(_name_, irq_base, prefix)			\
-static void _name_##_mask_irq(unsigned int irq)				\
+static void _name_##_mask_irq(struct irq_data *d)			\
 {									\
 	uint32_t r;							\
-	r = __raw_readl(prefix##_MASK) | (1 << (irq - irq_base));	\
+	r = __raw_readl(prefix##_MASK) | (1 << (d->irq - irq_base));	\
 	__raw_writel(r, prefix##_MASK);					\
 }
 
 #define SECOND_IRQ_UNMASK(_name_, irq_base, prefix)			\
-static void _name_##_unmask_irq(unsigned int irq)			\
+static void _name_##_unmask_irq(struct irq_data *d)			\
 {									\
 	uint32_t r;							\
-	r = __raw_readl(prefix##_MASK) & ~(1 << (irq - irq_base));	\
+	r = __raw_readl(prefix##_MASK) & ~(1 << (d->irq - irq_base));	\
 	__raw_writel(r, prefix##_MASK);					\
 }
 
@@ -88,8 +88,8 @@ SECOND_IRQ_UNMASK(_name_, irq_base, prefix)				\
 SECOND_IRQ_DEMUX(_name_, irq_base, prefix)				\
 static struct irq_chip _name_##_irq_chip = {				\
 	.name		= #_name_,					\
-	.mask		= _name_##_mask_irq,				\
-	.unmask		= _name_##_unmask_irq,				\
+	.irq_mask	= _name_##_mask_irq,				\
+	.irq_unmask	= _name_##_unmask_irq,				\
 }
 
 SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4);
@@ -103,10 +103,12 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num)
 	int irq;
 
 	for (irq = start; num > 0; irq++, num--) {
+		struct irq_data *d = irq_get_irq_data(irq);
+
 		/* mask and clear the IRQ */
-		chip->mask(irq);
-		if (chip->ack)
-			chip->ack(irq);
+		chip->irq_mask(d);
+		if (chip->irq_ack)
+			chip->irq_ack(d);
 
 		set_irq_chip(irq, chip);
 		set_irq_flags(irq, IRQF_VALID);
@@ -119,7 +121,7 @@ void __init mmp2_init_icu(void)
 	int irq;
 
 	for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
-		icu_mask_irq(irq);
+		icu_mask_irq(irq_get_irq_data(irq));
 		set_irq_chip(irq, &icu_irq_chip);
 		set_irq_flags(irq, IRQF_VALID);
 
@@ -139,7 +141,7 @@ void __init mmp2_init_icu(void)
 	/* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register
 	 * to be written to clear the interrupt
 	 */
-	pmic_irq_chip.ack = pmic_irq_ack;
+	pmic_irq_chip.irq_ack = pmic_irq_ack;
 
 	init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2);
 	init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2);
diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c
index 52ff2f0..f86b450 100644
--- a/arch/arm/mach-mmp/irq-pxa168.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
@@ -25,21 +25,21 @@
 #define PRIORITY_DEFAULT	0x1
 #define PRIORITY_NONE		0x0	/* means IRQ disabled */
 
-static void icu_mask_irq(unsigned int irq)
+static void icu_mask_irq(struct irq_data *d)
 {
-	__raw_writel(PRIORITY_NONE, ICU_INT_CONF(irq));
+	__raw_writel(PRIORITY_NONE, ICU_INT_CONF(d->irq));
 }
 
-static void icu_unmask_irq(unsigned int irq)
+static void icu_unmask_irq(struct irq_data *d)
 {
-	__raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(irq));
+	__raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(d->irq));
 }
 
 static struct irq_chip icu_irq_chip = {
-	.name	= "icu_irq",
-	.ack	= icu_mask_irq,
-	.mask	= icu_mask_irq,
-	.unmask	= icu_unmask_irq,
+	.name		= "icu_irq",
+	.irq_ack	= icu_mask_irq,
+	.irq_mask	= icu_mask_irq,
+	.irq_unmask	= icu_unmask_irq,
 };
 
 void __init icu_init_irq(void)
@@ -47,7 +47,7 @@ void __init icu_init_irq(void)
 	int irq;
 
 	for (irq = 0; irq < 64; irq++) {
-		icu_mask_irq(irq);
+		icu_mask_irq(irq_get_irq_data(irq));
 		set_irq_chip(irq, &icu_irq_chip);
 		set_irq_handler(irq, handle_level_irq);
 		set_irq_flags(irq, IRQF_VALID);
-- 
1.7.1

[PATCH 30/54] ARM: msm: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-msm/board-trout-gpio.c |   42 +++++++++++-----------
 arch/arm/mach-msm/gpio.c             |   48 ++++++++++++------------
 arch/arm/mach-msm/irq-vic.c          |   65 ++++++++++++++++-----------------
 arch/arm/mach-msm/irq.c              |   45 +++++++++++------------
 arch/arm/mach-msm/sirc.c             |   39 ++++++++++----------
 5 files changed, 118 insertions(+), 121 deletions(-)

diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c
index c50f3af..5d9e69c 100644
--- a/arch/arm/mach-msm/board-trout-gpio.c
+++ b/arch/arm/mach-msm/board-trout-gpio.c
@@ -105,52 +105,52 @@ static struct msm_gpio_chip msm_gpio_banks[] = {
 	TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0),
 };
 
-static void trout_gpio_irq_ack(unsigned int irq)
+static void trout_gpio_irq_ack(struct irq_data *d)
 {
-	int bank = TROUT_INT_TO_BANK(irq);
-	uint8_t mask = TROUT_INT_TO_MASK(irq);
+	int bank = TROUT_INT_TO_BANK(d->irq);
+	uint8_t mask = TROUT_INT_TO_MASK(d->irq);
 	int reg = TROUT_BANK_TO_STAT_REG(bank);
-	/*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", irq);*/
+	/*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", d->irq);*/
 	writeb(mask, TROUT_CPLD_BASE + reg);
 }
 
-static void trout_gpio_irq_mask(unsigned int irq)
+static void trout_gpio_irq_mask(struct irq_data *d)
 {
 	unsigned long flags;
 	uint8_t reg_val;
-	int bank = TROUT_INT_TO_BANK(irq);
-	uint8_t mask = TROUT_INT_TO_MASK(irq);
+	int bank = TROUT_INT_TO_BANK(d->irq);
+	uint8_t mask = TROUT_INT_TO_MASK(d->irq);
 	int reg = TROUT_BANK_TO_MASK_REG(bank);
 
 	local_irq_save(flags);
 	reg_val = trout_int_mask[bank] |= mask;
 	/*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n",
-	       irq, bank, reg_val);*/
+	       d->irq, bank, reg_val);*/
 	writeb(reg_val, TROUT_CPLD_BASE + reg);
 	local_irq_restore(flags);
 }
 
-static void trout_gpio_irq_unmask(unsigned int irq)
+static void trout_gpio_irq_unmask(struct irq_data *d)
 {
 	unsigned long flags;
 	uint8_t reg_val;
-	int bank = TROUT_INT_TO_BANK(irq);
-	uint8_t mask = TROUT_INT_TO_MASK(irq);
+	int bank = TROUT_INT_TO_BANK(d->irq);
+	uint8_t mask = TROUT_INT_TO_MASK(d->irq);
 	int reg = TROUT_BANK_TO_MASK_REG(bank);
 
 	local_irq_save(flags);
 	reg_val = trout_int_mask[bank] &= ~mask;
 	/*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n",
-	       irq, bank, reg_val);*/
+	       d->irq, bank, reg_val);*/
 	writeb(reg_val, TROUT_CPLD_BASE + reg);
 	local_irq_restore(flags);
 }
 
-int trout_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+int trout_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
 {
 	unsigned long flags;
-	int bank = TROUT_INT_TO_BANK(irq);
-	uint8_t mask = TROUT_INT_TO_MASK(irq);
+	int bank = TROUT_INT_TO_BANK(d->irq);
+	uint8_t mask = TROUT_INT_TO_MASK(d->irq);
 
 	local_irq_save(flags);
 	if(on)
@@ -190,15 +190,15 @@ static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 		}
 		int_base += TROUT_INT_BANK0_COUNT;
 	}
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 }
 
 static struct irq_chip trout_gpio_irq_chip = {
-	.name      = "troutgpio",
-	.ack       = trout_gpio_irq_ack,
-	.mask      = trout_gpio_irq_mask,
-	.unmask    = trout_gpio_irq_unmask,
-	.set_wake  = trout_gpio_irq_set_wake,
+	.name          = "troutgpio",
+	.irq_ack       = trout_gpio_irq_ack,
+	.irq_mask      = trout_gpio_irq_mask,
+	.irq_unmask    = trout_gpio_irq_unmask,
+	.irq_set_wake  = trout_gpio_irq_set_wake,
 };
 
 /*
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 33051b5..176af9d 100644
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -225,21 +225,21 @@ struct msm_gpio_chip msm_gpio_chips[] = {
 #endif
 };
 
-static void msm_gpio_irq_ack(unsigned int irq)
+static void msm_gpio_irq_ack(struct irq_data *d)
 {
 	unsigned long irq_flags;
-	struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
+	struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
 	spin_lock_irqsave(&msm_chip->lock, irq_flags);
 	msm_gpio_clear_detect_status(msm_chip,
-				     irq - gpio_to_irq(msm_chip->chip.base));
+				     d->irq - gpio_to_irq(msm_chip->chip.base));
 	spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
 }
 
-static void msm_gpio_irq_mask(unsigned int irq)
+static void msm_gpio_irq_mask(struct irq_data *d)
 {
 	unsigned long irq_flags;
-	struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
-	unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+	struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+	unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
 
 	spin_lock_irqsave(&msm_chip->lock, irq_flags);
 	/* level triggered interrupts are also latched */
@@ -250,11 +250,11 @@ static void msm_gpio_irq_mask(unsigned int irq)
 	spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
 }
 
-static void msm_gpio_irq_unmask(unsigned int irq)
+static void msm_gpio_irq_unmask(struct irq_data *d)
 {
 	unsigned long irq_flags;
-	struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
-	unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+	struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+	unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
 
 	spin_lock_irqsave(&msm_chip->lock, irq_flags);
 	/* level triggered interrupts are also latched */
@@ -265,11 +265,11 @@ static void msm_gpio_irq_unmask(unsigned int irq)
 	spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
 }
 
-static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
 {
 	unsigned long irq_flags;
-	struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
-	unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+	struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+	unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
 
 	spin_lock_irqsave(&msm_chip->lock, irq_flags);
 
@@ -282,21 +282,21 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
 	return 0;
 }
 
-static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
 	unsigned long irq_flags;
-	struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
-	unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+	struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+	unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
 	unsigned val, mask = BIT(offset);
 
 	spin_lock_irqsave(&msm_chip->lock, irq_flags);
 	val = readl(msm_chip->regs.int_edge);
 	if (flow_type & IRQ_TYPE_EDGE_BOTH) {
 		writel(val | mask, msm_chip->regs.int_edge);
-		irq_desc[irq].handle_irq = handle_edge_irq;
+		irq_desc[d->irq].handle_irq = handle_edge_irq;
 	} else {
 		writel(val & ~mask, msm_chip->regs.int_edge);
-		irq_desc[irq].handle_irq = handle_level_irq;
+		irq_desc[d->irq].handle_irq = handle_level_irq;
 	}
 	if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
 		msm_chip->both_edge_detect |= mask;
@@ -333,16 +333,16 @@ static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 					   msm_chip->chip.base + j);
 		}
 	}
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 }
 
 static struct irq_chip msm_gpio_irq_chip = {
-	.name      = "msmgpio",
-	.ack       = msm_gpio_irq_ack,
-	.mask      = msm_gpio_irq_mask,
-	.unmask    = msm_gpio_irq_unmask,
-	.set_wake  = msm_gpio_irq_set_wake,
-	.set_type  = msm_gpio_irq_set_type,
+	.name          = "msmgpio",
+	.irq_ack       = msm_gpio_irq_ack,
+	.irq_mask      = msm_gpio_irq_mask,
+	.irq_unmask    = msm_gpio_irq_unmask,
+	.irq_set_wake  = msm_gpio_irq_set_wake,
+	.irq_set_type  = msm_gpio_irq_set_type,
 };
 
 static int __init msm_init_gpio(void)
diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c
index 99f2c34..68c28bb 100644
--- a/arch/arm/mach-msm/irq-vic.c
+++ b/arch/arm/mach-msm/irq-vic.c
@@ -226,19 +226,18 @@ static inline void msm_irq_write_all_regs(void __iomem *base, unsigned int val)
 		writel(val, base + (i * 4));
 }
 
-static void msm_irq_ack(unsigned int irq)
+static void msm_irq_ack(struct irq_data *d)
 {
-	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq);
-	irq = 1 << (irq & 31);
-	writel(irq, reg);
+	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
+	writel(1 << (d->irq & 31), reg);
 }
 
-static void msm_irq_mask(unsigned int irq)
+static void msm_irq_mask(struct irq_data *d)
 {
-	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, irq);
-	unsigned index = VIC_INT_TO_REG_INDEX(irq);
-	uint32_t mask = 1UL << (irq & 31);
-	int smsm_irq = msm_irq_to_smsm[irq];
+	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, d->irq);
+	unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+	uint32_t mask = 1UL << (d->irq & 31);
+	int smsm_irq = msm_irq_to_smsm[d->irq];
 
 	msm_irq_shadow_reg[index].int_en[0] &= ~mask;
 	writel(mask, reg);
@@ -250,12 +249,12 @@ static void msm_irq_mask(unsigned int irq)
 	}
 }
 
-static void msm_irq_unmask(unsigned int irq)
+static void msm_irq_unmask(struct irq_data *d)
 {
-	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, irq);
-	unsigned index = VIC_INT_TO_REG_INDEX(irq);
-	uint32_t mask = 1UL << (irq & 31);
-	int smsm_irq = msm_irq_to_smsm[irq];
+	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, d->irq);
+	unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+	uint32_t mask = 1UL << (d->irq & 31);
+	int smsm_irq = msm_irq_to_smsm[d->irq];
 
 	msm_irq_shadow_reg[index].int_en[0] |= mask;
 	writel(mask, reg);
@@ -268,14 +267,14 @@ static void msm_irq_unmask(unsigned int irq)
 	}
 }
 
-static int msm_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_irq_set_wake(struct irq_data *d, unsigned int on)
 {
-	unsigned index = VIC_INT_TO_REG_INDEX(irq);
-	uint32_t mask = 1UL << (irq & 31);
-	int smsm_irq = msm_irq_to_smsm[irq];
+	unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+	uint32_t mask = 1UL << (d->irq & 31);
+	int smsm_irq = msm_irq_to_smsm[d->irq];
 
 	if (smsm_irq == 0) {
-		printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", irq);
+		printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", d->irq);
 		return -EINVAL;
 	}
 	if (on)
@@ -294,12 +293,12 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on)
 	return 0;
 }
 
-static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-	void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, irq);
-	void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, irq);
-	unsigned index = VIC_INT_TO_REG_INDEX(irq);
-	int b = 1 << (irq & 31);
+	void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, d->irq);
+	void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, d->irq);
+	unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+	int b = 1 << (d->irq & 31);
 	uint32_t polarity;
 	uint32_t type;
 
@@ -314,11 +313,11 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
 	type = msm_irq_shadow_reg[index].int_type;
 	if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
 		type |= b;
-		irq_desc[irq].handle_irq = handle_edge_irq;
+		irq_desc[d->irq].handle_irq = handle_edge_irq;
 	}
 	if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
 		type &= ~b;
-		irq_desc[irq].handle_irq = handle_level_irq;
+		irq_desc[d->irq].handle_irq = handle_level_irq;
 	}
 	writel(type, treg);
 	msm_irq_shadow_reg[index].int_type = type;
@@ -326,13 +325,13 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
 }
 
 static struct irq_chip msm_irq_chip = {
-	.name      = "msm",
-	.disable   = msm_irq_mask,
-	.ack       = msm_irq_ack,
-	.mask      = msm_irq_mask,
-	.unmask    = msm_irq_unmask,
-	.set_wake  = msm_irq_set_wake,
-	.set_type  = msm_irq_set_type,
+	.name          = "msm",
+	.irq_disable   = msm_irq_mask,
+	.irq_ack       = msm_irq_ack,
+	.irq_mask      = msm_irq_mask,
+	.irq_unmask    = msm_irq_unmask,
+	.irq_set_wake  = msm_irq_set_wake,
+	.irq_set_type  = msm_irq_set_type,
 };
 
 void __init msm_init_irq(void)
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 6c8d5f8..0b27d89 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -64,35 +64,34 @@
 #define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4))
 #define VIC_VECTADDR(n)     VIC_REG(0x0400+((n) * 4))
 
-static void msm_irq_ack(unsigned int irq)
+static void msm_irq_ack(struct irq_data *d)
 {
-	void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0);
-	irq = 1 << (irq & 31);
-	writel(irq, reg);
+	void __iomem *reg = VIC_INT_CLEAR0 + ((d->irq & 32) ? 4 : 0);
+	writel(1 << (d->irq & 31), reg);
 }
 
-static void msm_irq_mask(unsigned int irq)
+static void msm_irq_mask(struct irq_data *d)
 {
-	void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0);
-	writel(1 << (irq & 31), reg);
+	void __iomem *reg = VIC_INT_ENCLEAR0 + ((d->irq & 32) ? 4 : 0);
+	writel(1 << (d->irq & 31), reg);
 }
 
-static void msm_irq_unmask(unsigned int irq)
+static void msm_irq_unmask(struct irq_data *d)
 {
-	void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0);
-	writel(1 << (irq & 31), reg);
+	void __iomem *reg = VIC_INT_ENSET0 + ((d->irq & 32) ? 4 : 0);
+	writel(1 << (d->irq & 31), reg);
 }
 
-static int msm_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_irq_set_wake(struct irq_data *d, unsigned int on)
 {
 	return -EINVAL;
 }
 
-static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-	void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0);
-	void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0);
-	int b = 1 << (irq & 31);
+	void __iomem *treg = VIC_INT_TYPE0 + ((d->irq & 32) ? 4 : 0);
+	void __iomem *preg = VIC_INT_POLARITY0 + ((d->irq & 32) ? 4 : 0);
+	int b = 1 << (d->irq & 31);
 
 	if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
 		writel(readl(preg) | b, preg);
@@ -101,22 +100,22 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
 
 	if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
 		writel(readl(treg) | b, treg);
-		irq_desc[irq].handle_irq = handle_edge_irq;
+		irq_desc[d->irq].handle_irq = handle_edge_irq;
 	}
 	if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
 		writel(readl(treg) & (~b), treg);
-		irq_desc[irq].handle_irq = handle_level_irq;
+		irq_desc[d->irq].handle_irq = handle_level_irq;
 	}
 	return 0;
 }
 
 static struct irq_chip msm_irq_chip = {
-	.name      = "msm",
-	.ack       = msm_irq_ack,
-	.mask      = msm_irq_mask,
-	.unmask    = msm_irq_unmask,
-	.set_wake  = msm_irq_set_wake,
-	.set_type  = msm_irq_set_type,
+	.name          = "msm",
+	.irq_ack       = msm_irq_ack,
+	.irq_mask      = msm_irq_mask,
+	.irq_unmask    = msm_irq_unmask,
+	.irq_set_wake  = msm_irq_set_wake,
+	.irq_set_type  = msm_irq_set_type,
 };
 
 void __init msm_init_irq(void)
diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c
index b079452..59d0a25 100644
--- a/arch/arm/mach-msm/sirc.c
+++ b/arch/arm/mach-msm/sirc.c
@@ -45,12 +45,11 @@ static unsigned int save_polarity;
 
 /* Mask off the given interrupt. Keep the int_enable mask in sync with
    the enable reg, so it can be restored after power collapse. */
-static void sirc_irq_mask(unsigned int irq)
+static void sirc_irq_mask(struct irq_data *d)
 {
 	unsigned int mask;
 
-
-	mask = 1 << (irq - FIRST_SIRC_IRQ);
+	mask = 1 << (d->irq - FIRST_SIRC_IRQ);
 	writel(mask, sirc_regs.int_enable_clear);
 	int_enable &= ~mask;
 	return;
@@ -58,31 +57,31 @@ static void sirc_irq_mask(unsigned int irq)
 
 /* Unmask the given interrupt. Keep the int_enable mask in sync with
    the enable reg, so it can be restored after power collapse. */
-static void sirc_irq_unmask(unsigned int irq)
+static void sirc_irq_unmask(struct irq_data *d)
 {
 	unsigned int mask;
 
-	mask = 1 << (irq - FIRST_SIRC_IRQ);
+	mask = 1 << (d->irq - FIRST_SIRC_IRQ);
 	writel(mask, sirc_regs.int_enable_set);
 	int_enable |= mask;
 	return;
 }
 
-static void sirc_irq_ack(unsigned int irq)
+static void sirc_irq_ack(struct irq_data *d)
 {
 	unsigned int mask;
 
-	mask = 1 << (irq - FIRST_SIRC_IRQ);
+	mask = 1 << (d->irq - FIRST_SIRC_IRQ);
 	writel(mask, sirc_regs.int_clear);
 	return;
 }
 
-static int sirc_irq_set_wake(unsigned int irq, unsigned int on)
+static int sirc_irq_set_wake(struct irq_data *d, unsigned int on)
 {
 	unsigned int mask;
 
 	/* Used to set the interrupt enable mask during power collapse. */
-	mask = 1 << (irq - FIRST_SIRC_IRQ);
+	mask = 1 << (d->irq - FIRST_SIRC_IRQ);
 	if (on)
 		wake_enable |= mask;
 	else
@@ -91,12 +90,12 @@ static int sirc_irq_set_wake(unsigned int irq, unsigned int on)
 	return 0;
 }
 
-static int sirc_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
 	unsigned int mask;
 	unsigned int val;
 
-	mask = 1 << (irq - FIRST_SIRC_IRQ);
+	mask = 1 << (d->irq - FIRST_SIRC_IRQ);
 	val = readl(sirc_regs.int_polarity);
 
 	if (flow_type & (IRQF_TRIGGER_LOW | IRQF_TRIGGER_FALLING))
@@ -109,10 +108,10 @@ static int sirc_irq_set_type(unsigned int irq, unsigned int flow_type)
 	val = readl(sirc_regs.int_type);
 	if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
 		val |= mask;
-		irq_desc[irq].handle_irq = handle_edge_irq;
+		irq_desc[d->irq].handle_irq = handle_edge_irq;
 	} else {
 		val &= ~mask;
-		irq_desc[irq].handle_irq = handle_level_irq;
+		irq_desc[d->irq].handle_irq = handle_level_irq;
 	}
 
 	writel(val, sirc_regs.int_type);
@@ -142,16 +141,16 @@ static void sirc_irq_handler(unsigned int irq, struct irq_desc *desc)
 		;
 	generic_handle_irq(sirq+FIRST_SIRC_IRQ);
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 }
 
 static struct irq_chip sirc_irq_chip = {
-	.name      = "sirc",
-	.ack       = sirc_irq_ack,
-	.mask      = sirc_irq_mask,
-	.unmask    = sirc_irq_unmask,
-	.set_wake  = sirc_irq_set_wake,
-	.set_type  = sirc_irq_set_type,
+	.name          = "sirc",
+	.irq_ack       = sirc_irq_ack,
+	.irq_mask      = sirc_irq_mask,
+	.irq_unmask    = sirc_irq_unmask,
+	.irq_set_wake  = sirc_irq_set_wake,
+	.irq_set_type  = sirc_irq_set_type,
 };
 
 void __init msm_init_sirc(void)
-- 
1.7.1

[PATCH 31/54] ARM: mx3: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-mx3/mach-mx31ads.c |   18 +++++++++---------
 1 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index b993b9b..88b97d6 100644
--- a/arch/arm/mach-mx3/mach-mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -162,9 +162,9 @@ static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
  * Disable an expio pin's interrupt by setting the bit in the imr.
  * @param irq           an expio virtual irq number
  */
-static void expio_mask_irq(u32 irq)
+static void expio_mask_irq(struct irq_data *d)
 {
-	u32 expio = MXC_IRQ_TO_EXPIO(irq);
+	u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
 	/* mask the interrupt */
 	__raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
 	__raw_readw(PBC_INTMASK_CLEAR_REG);
@@ -174,9 +174,9 @@ static void expio_mask_irq(u32 irq)
  * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
  * @param irq           an expanded io virtual irq number
  */
-static void expio_ack_irq(u32 irq)
+static void expio_ack_irq(struct irq_data *d)
 {
-	u32 expio = MXC_IRQ_TO_EXPIO(irq);
+	u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
 	/* clear the interrupt status */
 	__raw_writew(1 << expio, PBC_INTSTATUS_REG);
 }
@@ -185,18 +185,18 @@ static void expio_ack_irq(u32 irq)
  * Enable a expio pin's interrupt by clearing the bit in the imr.
  * @param irq           a expio virtual irq number
  */
-static void expio_unmask_irq(u32 irq)
+static void expio_unmask_irq(struct irq_data *d)
 {
-	u32 expio = MXC_IRQ_TO_EXPIO(irq);
+	u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
 	/* unmask the interrupt */
 	__raw_writew(1 << expio, PBC_INTMASK_SET_REG);
 }
 
 static struct irq_chip expio_irq_chip = {
 	.name = "EXPIO(CPLD)",
-	.ack = expio_ack_irq,
-	.mask = expio_mask_irq,
-	.unmask = expio_unmask_irq,
+	.irq_ack = expio_ack_irq,
+	.irq_mask = expio_mask_irq,
+	.irq_unmask = expio_unmask_irq,
 };
 
 static void __init mx31ads_init_expio(void)
-- 
1.7.1

[PATCH 32/54] ARM: netx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-netx/generic.c |   30 +++++++++++++++---------------
 1 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 43da8bb..29ffa75 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -88,13 +88,13 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 }
 
 static int
-netx_hif_irq_type(unsigned int _irq, unsigned int type)
+netx_hif_irq_type(struct irq_data *d, unsigned int type)
 {
 	unsigned int val, irq;
 
 	val = readl(NETX_DPMAS_IF_CONF1);
 
-	irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+	irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
 
 	if (type & IRQ_TYPE_EDGE_RISING) {
 		DEBUG_IRQ("rising edges\n");
@@ -119,49 +119,49 @@ netx_hif_irq_type(unsigned int _irq, unsigned int type)
 }
 
 static void
-netx_hif_ack_irq(unsigned int _irq)
+netx_hif_ack_irq(struct irq_data *d)
 {
 	unsigned int val, irq;
 
-	irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+	irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
 	writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
 
 	val = readl(NETX_DPMAS_INT_EN);
 	val &= ~((1 << 24) << irq);
 	writel(val, NETX_DPMAS_INT_EN);
 
-	DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
+	DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
 }
 
 static void
-netx_hif_mask_irq(unsigned int _irq)
+netx_hif_mask_irq(struct irq_data *d)
 {
 	unsigned int val, irq;
 
-	irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+	irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
 	val = readl(NETX_DPMAS_INT_EN);
 	val &= ~((1 << 24) << irq);
 	writel(val, NETX_DPMAS_INT_EN);
-	DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
+	DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
 }
 
 static void
-netx_hif_unmask_irq(unsigned int _irq)
+netx_hif_unmask_irq(struct irq_data *d)
 {
 	unsigned int val, irq;
 
-	irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+	irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
 	val = readl(NETX_DPMAS_INT_EN);
 	val |= (1 << 24) << irq;
 	writel(val, NETX_DPMAS_INT_EN);
-	DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
+	DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
 }
 
 static struct irq_chip netx_hif_chip = {
-	.ack = netx_hif_ack_irq,
-	.mask = netx_hif_mask_irq,
-	.unmask = netx_hif_unmask_irq,
-	.set_type = netx_hif_irq_type,
+	.irq_ack = netx_hif_ack_irq,
+	.irq_mask = netx_hif_mask_irq,
+	.irq_unmask = netx_hif_unmask_irq,
+	.irq_set_type = netx_hif_irq_type,
 };
 
 void __init netx_init_irq(void)
-- 
1.7.1

[PATCH 33/54] ARM: ns9xxx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-ns9xxx/board-a9m9750dev.c |   28 ++++++++++++++--------------
 arch/arm/mach-ns9xxx/irq.c              |   28 ++++++++++++++--------------
 2 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index b45bb3b..0c0d524 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -37,44 +37,44 @@ void __init board_a9m9750dev_map_io(void)
 		     ARRAY_SIZE(board_a9m9750dev_io_desc));
 }
 
-static void a9m9750dev_fpga_ack_irq(unsigned int irq)
+static void a9m9750dev_fpga_ack_irq(struct irq_data *d)
 {
 	/* nothing */
 }
 
-static void a9m9750dev_fpga_mask_irq(unsigned int irq)
+static void a9m9750dev_fpga_mask_irq(struct irq_data *d)
 {
 	u8 ier;
 
 	ier = __raw_readb(FPGA_IER);
 
-	ier &= ~(1 << (irq - FPGA_IRQ(0)));
+	ier &= ~(1 << (d->irq - FPGA_IRQ(0)));
 
 	__raw_writeb(ier, FPGA_IER);
 }
 
-static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
+static void a9m9750dev_fpga_maskack_irq(struct irq_data *d)
 {
-	a9m9750dev_fpga_mask_irq(irq);
-	a9m9750dev_fpga_ack_irq(irq);
+	a9m9750dev_fpga_mask_irq(d);
+	a9m9750dev_fpga_ack_irq(d);
 }
 
-static void a9m9750dev_fpga_unmask_irq(unsigned int irq)
+static void a9m9750dev_fpga_unmask_irq(struct irq_data *d)
 {
 	u8 ier;
 
 	ier = __raw_readb(FPGA_IER);
 
-	ier |= 1 << (irq - FPGA_IRQ(0));
+	ier |= 1 << (d->irq - FPGA_IRQ(0));
 
 	__raw_writeb(ier, FPGA_IER);
 }
 
 static struct irq_chip a9m9750dev_fpga_chip = {
-	.ack		= a9m9750dev_fpga_ack_irq,
-	.mask		= a9m9750dev_fpga_mask_irq,
-	.mask_ack	= a9m9750dev_fpga_maskack_irq,
-	.unmask		= a9m9750dev_fpga_unmask_irq,
+	.irq_ack	= a9m9750dev_fpga_ack_irq,
+	.irq_mask	= a9m9750dev_fpga_mask_irq,
+	.irq_mask_ack	= a9m9750dev_fpga_maskack_irq,
+	.irq_unmask	= a9m9750dev_fpga_unmask_irq,
 };
 
 static void a9m9750dev_fpga_demux_handler(unsigned int irq,
@@ -82,7 +82,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
 {
 	u8 stat = __raw_readb(FPGA_ISR);
 
-	desc->chip->mask_ack(irq);
+	desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
 
 	while (stat != 0) {
 		int irqno = fls(stat) - 1;
@@ -92,7 +92,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
 		generic_handle_irq(FPGA_IRQ(irqno));
 	}
 
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 void __init board_a9m9750dev_init_irq(void)
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 038f24d..389fa5c 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -22,40 +22,40 @@
 #define irq2prio(i) (i)
 #define prio2irq(p) (p)
 
-static void ns9xxx_mask_irq(unsigned int irq)
+static void ns9xxx_mask_irq(struct irq_data *d)
 {
 	/* XXX: better use cpp symbols */
-	int prio = irq2prio(irq);
+	int prio = irq2prio(d->irq);
 	u32 ic = __raw_readl(SYS_IC(prio / 4));
 	ic &= ~(1 << (7 + 8 * (3 - (prio & 3))));
 	__raw_writel(ic, SYS_IC(prio / 4));
 }
 
-static void ns9xxx_ack_irq(unsigned int irq)
+static void ns9xxx_ack_irq(struct irq_data *d)
 {
 	__raw_writel(0, SYS_ISRADDR);
 }
 
-static void ns9xxx_maskack_irq(unsigned int irq)
+static void ns9xxx_maskack_irq(struct irq_data *d)
 {
-	ns9xxx_mask_irq(irq);
-	ns9xxx_ack_irq(irq);
+	ns9xxx_mask_irq(d);
+	ns9xxx_ack_irq(d);
 }
 
-static void ns9xxx_unmask_irq(unsigned int irq)
+static void ns9xxx_unmask_irq(struct irq_data *d)
 {
 	/* XXX: better use cpp symbols */
-	int prio = irq2prio(irq);
+	int prio = irq2prio(d->irq);
 	u32 ic = __raw_readl(SYS_IC(prio / 4));
 	ic |= 1 << (7 + 8 * (3 - (prio & 3)));
 	__raw_writel(ic, SYS_IC(prio / 4));
 }
 
 static struct irq_chip ns9xxx_chip = {
-	.ack		= ns9xxx_ack_irq,
-	.mask		= ns9xxx_mask_irq,
-	.mask_ack	= ns9xxx_maskack_irq,
-	.unmask		= ns9xxx_unmask_irq,
+	.irq_ack	= ns9xxx_ack_irq,
+	.irq_mask	= ns9xxx_mask_irq,
+	.irq_mask_ack	= ns9xxx_maskack_irq,
+	.irq_unmask	= ns9xxx_unmask_irq,
 };
 
 #if 0
@@ -92,10 +92,10 @@ static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
 
 	if (desc->status & IRQ_DISABLED)
 out_mask:
-		desc->chip->mask(irq);
+		desc->irq_data.chip->irq_mask(&desc->irq_data);
 
 	/* ack unconditionally to unmask lower prio irqs */
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	raw_spin_unlock(&desc->lock);
 }
-- 
1.7.1

[PATCH 34/54] ARM: nuc93x: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-nuc93x/irq.c |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c
index a7a88ea..1f8a05a 100644
--- a/arch/arm/mach-nuc93x/irq.c
+++ b/arch/arm/mach-nuc93x/irq.c
@@ -25,9 +25,9 @@
 #include <mach/hardware.h>
 #include <mach/regs-irq.h>
 
-static void nuc93x_irq_mask(unsigned int irq)
+static void nuc93x_irq_mask(struct irq_data *d)
 {
-	__raw_writel(1 << irq, REG_AIC_MDCR);
+	__raw_writel(1 << d->irq, REG_AIC_MDCR);
 }
 
 /*
@@ -35,21 +35,21 @@ static void nuc93x_irq_mask(unsigned int irq)
  * to REG_AIC_EOSCR for ACK
  */
 
-static void nuc93x_irq_ack(unsigned int irq)
+static void nuc93x_irq_ack(struct irq_data *d)
 {
 	__raw_writel(0x01, REG_AIC_EOSCR);
 }
 
-static void nuc93x_irq_unmask(unsigned int irq)
+static void nuc93x_irq_unmask(struct irq_data *d)
 {
-	__raw_writel(1 << irq, REG_AIC_MECR);
+	__raw_writel(1 << d->irq, REG_AIC_MECR);
 
 }
 
 static struct irq_chip nuc93x_irq_chip = {
-	.ack	   = nuc93x_irq_ack,
-	.mask	   = nuc93x_irq_mask,
-	.unmask	   = nuc93x_irq_unmask,
+	.irq_ack	= nuc93x_irq_ack,
+	.irq_mask	= nuc93x_irq_mask,
+	.irq_unmask	= nuc93x_irq_unmask,
 };
 
 void __init nuc93x_init_irq(void)
-- 
1.7.1

[PATCH 35/54] ARM: omap1: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-omap1/ams-delta-fiq.c |    8 ++++--
 arch/arm/mach-omap1/fpga.c          |   28 +++++++++++-----------
 arch/arm/mach-omap1/irq.c           |   44 +++++++++++++++++-----------------
 3 files changed, 41 insertions(+), 39 deletions(-)

diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index 6c994e2..152b32c 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -49,7 +49,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
 
 	irq_desc = irq_to_desc(IH_GPIO_BASE);
 	if (irq_desc)
-		irq_chip = irq_desc->chip;
+		irq_chip = irq_desc->irq_data.chip;
 
 	/*
 	 * For each handled GPIO interrupt, keep calling its interrupt handler
@@ -62,13 +62,15 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
 
 		while (irq_counter[gpio] < fiq_count) {
 			if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
+				struct irq_data *d = irq_get_irq_data(irq_num);
+
 				/*
 				 * It looks like handle_edge_irq() that
 				 * OMAP GPIO edge interrupts default to,
 				 * expects interrupt already unmasked.
 				 */
-				if (irq_chip && irq_chip->unmask)
-					irq_chip->unmask(irq_num);
+				if (irq_chip && irq_chip->irq_unmask)
+					irq_chip->irq_unmask(d);
 			}
 			generic_handle_irq(irq_num);
 
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 5cfce16..0de09fa 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -30,9 +30,9 @@
 #include <plat/fpga.h>
 #include <mach/gpio.h>
 
-static void fpga_mask_irq(unsigned int irq)
+static void fpga_mask_irq(struct irq_data *d)
 {
-	irq -= OMAP_FPGA_IRQ_BASE;
+	unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
 
 	if (irq < 8)
 		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
@@ -58,14 +58,14 @@ static inline u32 get_fpga_unmasked_irqs(void)
 }
 
 
-static void fpga_ack_irq(unsigned int irq)
+static void fpga_ack_irq(struct irq_data *d)
 {
 	/* Don't need to explicitly ACK FPGA interrupts */
 }
 
-static void fpga_unmask_irq(unsigned int irq)
+static void fpga_unmask_irq(struct irq_data *d)
 {
-	irq -= OMAP_FPGA_IRQ_BASE;
+	unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
 
 	if (irq < 8)
 		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
@@ -78,10 +78,10 @@ static void fpga_unmask_irq(unsigned int irq)
 			      | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
 }
 
-static void fpga_mask_ack_irq(unsigned int irq)
+static void fpga_mask_ack_irq(struct irq_data *d)
 {
-	fpga_mask_irq(irq);
-	fpga_ack_irq(irq);
+	fpga_mask_irq(d);
+	fpga_ack_irq(d);
 }
 
 void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
@@ -105,17 +105,17 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
 
 static struct irq_chip omap_fpga_irq_ack = {
 	.name		= "FPGA-ack",
-	.ack		= fpga_mask_ack_irq,
-	.mask		= fpga_mask_irq,
-	.unmask		= fpga_unmask_irq,
+	.irq_ack	= fpga_mask_ack_irq,
+	.irq_mask	= fpga_mask_irq,
+	.irq_unmask	= fpga_unmask_irq,
 };
 
 
 static struct irq_chip omap_fpga_irq = {
 	.name		= "FPGA",
-	.ack		= fpga_ack_irq,
-	.mask		= fpga_mask_irq,
-	.unmask		= fpga_unmask_irq,
+	.irq_ack	= fpga_ack_irq,
+	.irq_mask	= fpga_mask_irq,
+	.irq_unmask	= fpga_unmask_irq,
 };
 
 /*
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index db913c3..c2cfb27 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -70,48 +70,48 @@ static inline void irq_bank_writel(unsigned long value, int bank, int offset)
 	omap_writel(value, irq_banks[bank].base_reg + offset);
 }
 
-static void omap_ack_irq(unsigned int irq)
+static void omap_ack_irq(struct irq_data *d)
 {
-	if (irq > 31)
+	if (d->irq > 31)
 		omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET);
 
 	omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET);
 }
 
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_data *d)
 {
-	int bank = IRQ_BANK(irq);
+	int bank = IRQ_BANK(d->irq);
 	u32 l;
 
 	l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
-	l |= 1 << IRQ_BIT(irq);
+	l |= 1 << IRQ_BIT(d->irq);
 	omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
 }
 
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_data *d)
 {
-	int bank = IRQ_BANK(irq);
+	int bank = IRQ_BANK(d->irq);
 	u32 l;
 
 	l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
-	l &= ~(1 << IRQ_BIT(irq));
+	l &= ~(1 << IRQ_BIT(d->irq));
 	omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
 }
 
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_data *d)
 {
-	omap_mask_irq(irq);
-	omap_ack_irq(irq);
+	omap_mask_irq(d);
+	omap_ack_irq(d);
 }
 
-static int omap_wake_irq(unsigned int irq, unsigned int enable)
+static int omap_wake_irq(struct irq_data *d, unsigned int enable)
 {
-	int bank = IRQ_BANK(irq);
+	int bank = IRQ_BANK(d->irq);
 
 	if (enable)
-		irq_banks[bank].wake_enable |= IRQ_BIT(irq);
+		irq_banks[bank].wake_enable |= IRQ_BIT(d->irq);
 	else
-		irq_banks[bank].wake_enable &= ~IRQ_BIT(irq);
+		irq_banks[bank].wake_enable &= ~IRQ_BIT(d->irq);
 
 	return 0;
 }
@@ -168,10 +168,10 @@ static struct omap_irq_bank omap1610_irq_banks[] = {
 
 static struct irq_chip omap_irq_chip = {
 	.name		= "MPU",
-	.ack		= omap_mask_ack_irq,
-	.mask		= omap_mask_irq,
-	.unmask		= omap_unmask_irq,
-	.set_wake	= omap_wake_irq,
+	.irq_ack	= omap_mask_ack_irq,
+	.irq_mask	= omap_mask_irq,
+	.irq_unmask	= omap_unmask_irq,
+	.irq_set_wake	= omap_wake_irq,
 };
 
 void __init omap_init_irq(void)
@@ -234,9 +234,9 @@ void __init omap_init_irq(void)
 	/* Unmask level 2 handler */
 
 	if (cpu_is_omap7xx())
-		omap_unmask_irq(INT_7XX_IH2_IRQ);
+		omap_unmask_irq(irq_get_irq_data(INT_7XX_IH2_IRQ));
 	else if (cpu_is_omap15xx())
-		omap_unmask_irq(INT_1510_IH2_IRQ);
+		omap_unmask_irq(irq_get_irq_data(INT_1510_IH2_IRQ));
 	else if (cpu_is_omap16xx())
-		omap_unmask_irq(INT_1610_IH2_IRQ);
+		omap_unmask_irq(irq_get_irq_data(INT_1610_IH2_IRQ));
 }
-- 
1.7.1

[PATCH 35/54] ARM: omap1: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-omap1/ams-delta-fiq.c |    8 ++++--
 arch/arm/mach-omap1/fpga.c          |   28 +++++++++++-----------
 arch/arm/mach-omap1/irq.c           |   44 +++++++++++++++++-----------------
 3 files changed, 41 insertions(+), 39 deletions(-)

diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index 6c994e2..152b32c 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -49,7 +49,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
 
 	irq_desc = irq_to_desc(IH_GPIO_BASE);
 	if (irq_desc)
-		irq_chip = irq_desc->chip;
+		irq_chip = irq_desc->irq_data.chip;
 
 	/*
 	 * For each handled GPIO interrupt, keep calling its interrupt handler
@@ -62,13 +62,15 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
 
 		while (irq_counter[gpio] < fiq_count) {
 			if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
+				struct irq_data *d = irq_get_irq_data(irq_num);
+
 				/*
 				 * It looks like handle_edge_irq() that
 				 * OMAP GPIO edge interrupts default to,
 				 * expects interrupt already unmasked.
 				 */
-				if (irq_chip && irq_chip->unmask)
-					irq_chip->unmask(irq_num);
+				if (irq_chip && irq_chip->irq_unmask)
+					irq_chip->irq_unmask(d);
 			}
 			generic_handle_irq(irq_num);
 
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 5cfce16..0de09fa 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -30,9 +30,9 @@
 #include <plat/fpga.h>
 #include <mach/gpio.h>
 
-static void fpga_mask_irq(unsigned int irq)
+static void fpga_mask_irq(struct irq_data *d)
 {
-	irq -= OMAP_FPGA_IRQ_BASE;
+	unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
 
 	if (irq < 8)
 		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
@@ -58,14 +58,14 @@ static inline u32 get_fpga_unmasked_irqs(void)
 }
 
 
-static void fpga_ack_irq(unsigned int irq)
+static void fpga_ack_irq(struct irq_data *d)
 {
 	/* Don't need to explicitly ACK FPGA interrupts */
 }
 
-static void fpga_unmask_irq(unsigned int irq)
+static void fpga_unmask_irq(struct irq_data *d)
 {
-	irq -= OMAP_FPGA_IRQ_BASE;
+	unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
 
 	if (irq < 8)
 		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
@@ -78,10 +78,10 @@ static void fpga_unmask_irq(unsigned int irq)
 			      | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
 }
 
-static void fpga_mask_ack_irq(unsigned int irq)
+static void fpga_mask_ack_irq(struct irq_data *d)
 {
-	fpga_mask_irq(irq);
-	fpga_ack_irq(irq);
+	fpga_mask_irq(d);
+	fpga_ack_irq(d);
 }
 
 void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
@@ -105,17 +105,17 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
 
 static struct irq_chip omap_fpga_irq_ack = {
 	.name		= "FPGA-ack",
-	.ack		= fpga_mask_ack_irq,
-	.mask		= fpga_mask_irq,
-	.unmask		= fpga_unmask_irq,
+	.irq_ack	= fpga_mask_ack_irq,
+	.irq_mask	= fpga_mask_irq,
+	.irq_unmask	= fpga_unmask_irq,
 };
 
 
 static struct irq_chip omap_fpga_irq = {
 	.name		= "FPGA",
-	.ack		= fpga_ack_irq,
-	.mask		= fpga_mask_irq,
-	.unmask		= fpga_unmask_irq,
+	.irq_ack	= fpga_ack_irq,
+	.irq_mask	= fpga_mask_irq,
+	.irq_unmask	= fpga_unmask_irq,
 };
 
 /*
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index db913c3..c2cfb27 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -70,48 +70,48 @@ static inline void irq_bank_writel(unsigned long value, int bank, int offset)
 	omap_writel(value, irq_banks[bank].base_reg + offset);
 }
 
-static void omap_ack_irq(unsigned int irq)
+static void omap_ack_irq(struct irq_data *d)
 {
-	if (irq > 31)
+	if (d->irq > 31)
 		omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET);
 
 	omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET);
 }
 
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_data *d)
 {
-	int bank = IRQ_BANK(irq);
+	int bank = IRQ_BANK(d->irq);
 	u32 l;
 
 	l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
-	l |= 1 << IRQ_BIT(irq);
+	l |= 1 << IRQ_BIT(d->irq);
 	omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
 }
 
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_data *d)
 {
-	int bank = IRQ_BANK(irq);
+	int bank = IRQ_BANK(d->irq);
 	u32 l;
 
 	l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
-	l &= ~(1 << IRQ_BIT(irq));
+	l &= ~(1 << IRQ_BIT(d->irq));
 	omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
 }
 
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_data *d)
 {
-	omap_mask_irq(irq);
-	omap_ack_irq(irq);
+	omap_mask_irq(d);
+	omap_ack_irq(d);
 }
 
-static int omap_wake_irq(unsigned int irq, unsigned int enable)
+static int omap_wake_irq(struct irq_data *d, unsigned int enable)
 {
-	int bank = IRQ_BANK(irq);
+	int bank = IRQ_BANK(d->irq);
 
 	if (enable)
-		irq_banks[bank].wake_enable |= IRQ_BIT(irq);
+		irq_banks[bank].wake_enable |= IRQ_BIT(d->irq);
 	else
-		irq_banks[bank].wake_enable &= ~IRQ_BIT(irq);
+		irq_banks[bank].wake_enable &= ~IRQ_BIT(d->irq);
 
 	return 0;
 }
@@ -168,10 +168,10 @@ static struct omap_irq_bank omap1610_irq_banks[] = {
 
 static struct irq_chip omap_irq_chip = {
 	.name		= "MPU",
-	.ack		= omap_mask_ack_irq,
-	.mask		= omap_mask_irq,
-	.unmask		= omap_unmask_irq,
-	.set_wake	= omap_wake_irq,
+	.irq_ack	= omap_mask_ack_irq,
+	.irq_mask	= omap_mask_irq,
+	.irq_unmask	= omap_unmask_irq,
+	.irq_set_wake	= omap_wake_irq,
 };
 
 void __init omap_init_irq(void)
@@ -234,9 +234,9 @@ void __init omap_init_irq(void)
 	/* Unmask level 2 handler */
 
 	if (cpu_is_omap7xx())
-		omap_unmask_irq(INT_7XX_IH2_IRQ);
+		omap_unmask_irq(irq_get_irq_data(INT_7XX_IH2_IRQ));
 	else if (cpu_is_omap15xx())
-		omap_unmask_irq(INT_1510_IH2_IRQ);
+		omap_unmask_irq(irq_get_irq_data(INT_1510_IH2_IRQ));
 	else if (cpu_is_omap16xx())
-		omap_unmask_irq(INT_1610_IH2_IRQ);
+		omap_unmask_irq(irq_get_irq_data(INT_1610_IH2_IRQ));
 }
-- 
1.7.1

[PATCH 36/54] ARM: omap2: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-omap2/irq.c |   22 ++++++++++++----------
 1 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 32eeabe..3d17ef6 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -100,13 +100,14 @@ static int omap_check_spurious(unsigned int irq)
 }
 
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
-static void omap_ack_irq(unsigned int irq)
+static void omap_ack_irq(struct irq_data *d)
 {
 	intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL);
 }
 
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
 	int offset = irq & (~(IRQ_BITS_PER_REG - 1));
 
 	if (cpu_is_omap34xx()) {
@@ -128,8 +129,9 @@ static void omap_mask_irq(unsigned int irq)
 	intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
 }
 
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
 	int offset = irq & (~(IRQ_BITS_PER_REG - 1));
 
 	irq &= (IRQ_BITS_PER_REG - 1);
@@ -137,17 +139,17 @@ static void omap_unmask_irq(unsigned int irq)
 	intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
 }
 
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_data *d)
 {
-	omap_mask_irq(irq);
-	omap_ack_irq(irq);
+	omap_mask_irq(d);
+	omap_ack_irq(d);
 }
 
 static struct irq_chip omap_irq_chip = {
-	.name	= "INTC",
-	.ack	= omap_mask_ack_irq,
-	.mask	= omap_mask_irq,
-	.unmask	= omap_unmask_irq,
+	.name		= "INTC",
+	.irq_ack	= omap_mask_ack_irq,
+	.irq_mask	= omap_mask_irq,
+	.irq_unmask	= omap_unmask_irq,
 };
 
 static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
-- 
1.7.1

[PATCH 36/54] ARM: omap2: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-omap2/irq.c |   22 ++++++++++++----------
 1 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 32eeabe..3d17ef6 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -100,13 +100,14 @@ static int omap_check_spurious(unsigned int irq)
 }
 
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
-static void omap_ack_irq(unsigned int irq)
+static void omap_ack_irq(struct irq_data *d)
 {
 	intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL);
 }
 
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
 	int offset = irq & (~(IRQ_BITS_PER_REG - 1));
 
 	if (cpu_is_omap34xx()) {
@@ -128,8 +129,9 @@ static void omap_mask_irq(unsigned int irq)
 	intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
 }
 
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_data *d)
 {
+	unsigned int irq = d->irq;
 	int offset = irq & (~(IRQ_BITS_PER_REG - 1));
 
 	irq &= (IRQ_BITS_PER_REG - 1);
@@ -137,17 +139,17 @@ static void omap_unmask_irq(unsigned int irq)
 	intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
 }
 
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_data *d)
 {
-	omap_mask_irq(irq);
-	omap_ack_irq(irq);
+	omap_mask_irq(d);
+	omap_ack_irq(d);
 }
 
 static struct irq_chip omap_irq_chip = {
-	.name	= "INTC",
-	.ack	= omap_mask_ack_irq,
-	.mask	= omap_mask_irq,
-	.unmask	= omap_unmask_irq,
+	.name		= "INTC",
+	.irq_ack	= omap_mask_ack_irq,
+	.irq_mask	= omap_mask_irq,
+	.irq_unmask	= omap_unmask_irq,
 };
 
 static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
-- 
1.7.1

[PATCH 37/54] ARM: pnx4008: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-pnx4008/irq.c |   62 +++++++++++++++++++++++--------------------
 1 files changed, 33 insertions(+), 29 deletions(-)

diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index a9ce02b..c69c180 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -36,44 +36,44 @@
 
 static u8 pnx4008_irq_type[NR_IRQS] = PNX4008_IRQ_TYPES;
 
-static void pnx4008_mask_irq(unsigned int irq)
+static void pnx4008_mask_irq(struct irq_data *d)
 {
-	__raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq));	/* mask interrupt */
+	__raw_writel(__raw_readl(INTC_ER(d->irq)) & ~INTC_BIT(d->irq), INTC_ER(d->irq));	/* mask interrupt */
 }
 
-static void pnx4008_unmask_irq(unsigned int irq)
+static void pnx4008_unmask_irq(struct irq_data *d)
 {
-	__raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq));	/* unmask interrupt */
+	__raw_writel(__raw_readl(INTC_ER(d->irq)) | INTC_BIT(d->irq), INTC_ER(d->irq));	/* unmask interrupt */
 }
 
-static void pnx4008_mask_ack_irq(unsigned int irq)
+static void pnx4008_mask_ack_irq(struct irq_data *d)
 {
-	__raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq));	/* mask interrupt */
-	__raw_writel(INTC_BIT(irq), INTC_SR(irq));	/* clear interrupt status */
+	__raw_writel(__raw_readl(INTC_ER(d->irq)) & ~INTC_BIT(d->irq), INTC_ER(d->irq));	/* mask interrupt */
+	__raw_writel(INTC_BIT(d->irq), INTC_SR(d->irq));	/* clear interrupt status */
 }
 
-static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
+static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type)
 {
 	switch (type) {
 	case IRQ_TYPE_EDGE_RISING:
-		__raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));	/*edge sensitive */
-		__raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));	/*rising edge */
-		set_irq_handler(irq, handle_edge_irq);
+		__raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq));	/*edge sensitive */
+		__raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq));	/*rising edge */
+		set_irq_handler(d->irq, handle_edge_irq);
 		break;
 	case IRQ_TYPE_EDGE_FALLING:
-		__raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));	/*edge sensitive */
-		__raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));	/*falling edge */
-		set_irq_handler(irq, handle_edge_irq);
+		__raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq));	/*edge sensitive */
+		__raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq));	/*falling edge */
+		set_irq_handler(d->irq, handle_edge_irq);
 		break;
 	case IRQ_TYPE_LEVEL_LOW:
-		__raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));	/*level sensitive */
-		__raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));	/*low level */
-		set_irq_handler(irq, handle_level_irq);
+		__raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq));	/*level sensitive */
+		__raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq));	/*low level */
+		set_irq_handler(d->irq, handle_level_irq);
 		break;
 	case IRQ_TYPE_LEVEL_HIGH:
-		__raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));	/*level sensitive */
-		__raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));	/* high level */
-		set_irq_handler(irq, handle_level_irq);
+		__raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq));	/*level sensitive */
+		__raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq));	/* high level */
+		set_irq_handler(d->irq, handle_level_irq);
 		break;
 
 	/* IRQ_TYPE_EDGE_BOTH is not supported */
@@ -85,10 +85,10 @@ static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
 }
 
 static struct irq_chip pnx4008_irq_chip = {
-	.ack = pnx4008_mask_ack_irq,
-	.mask = pnx4008_mask_irq,
-	.unmask = pnx4008_unmask_irq,
-	.set_type = pnx4008_set_irq_type,
+	.irq_ack = pnx4008_mask_ack_irq,
+	.irq_mask = pnx4008_mask_irq,
+	.irq_unmask = pnx4008_unmask_irq,
+	.irq_set_type = pnx4008_set_irq_type,
 };
 
 void __init pnx4008_init_irq(void)
@@ -99,14 +99,18 @@ void __init pnx4008_init_irq(void)
 	for (i = 0; i < NR_IRQS; i++) {
 		set_irq_flags(i, IRQF_VALID);
 		set_irq_chip(i, &pnx4008_irq_chip);
-		pnx4008_set_irq_type(i, pnx4008_irq_type[i]);
+		pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]);
 	}
 
 	/* configure and enable IRQ 0,1,30,31 (cascade interrupts) */
-	pnx4008_set_irq_type(SUB1_IRQ_N, pnx4008_irq_type[SUB1_IRQ_N]);
-	pnx4008_set_irq_type(SUB2_IRQ_N, pnx4008_irq_type[SUB2_IRQ_N]);
-	pnx4008_set_irq_type(SUB1_FIQ_N, pnx4008_irq_type[SUB1_FIQ_N]);
-	pnx4008_set_irq_type(SUB2_FIQ_N, pnx4008_irq_type[SUB2_FIQ_N]);
+	pnx4008_set_irq_type(irq_get_irq_data(SUB1_IRQ_N),
+			     pnx4008_irq_type[SUB1_IRQ_N]);
+	pnx4008_set_irq_type(irq_get_irq_data(SUB2_IRQ_N),
+			     pnx4008_irq_type[SUB2_IRQ_N]);
+	pnx4008_set_irq_type(irq_get_irq_data(SUB1_FIQ_N),
+			     pnx4008_irq_type[SUB1_FIQ_N]);
+	pnx4008_set_irq_type(irq_get_irq_data(SUB2_FIQ_N),
+			     pnx4008_irq_type[SUB2_FIQ_N]);
 
 	/* mask all others */
 	__raw_writel((1 << SUB2_FIQ_N) | (1 << SUB1_FIQ_N) |
-- 
1.7.1

[PATCH 38/54] ARM: PXA SoCs: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-pxa/balloon3.c          |   23 +++++++++++-------
 arch/arm/mach-pxa/cm-x2xx-pci.c       |    2 +-
 arch/arm/mach-pxa/generic.h           |    4 ++-
 arch/arm/mach-pxa/irq.c               |   42 ++++++++++++++++----------------
 arch/arm/mach-pxa/lpd270.c            |   17 +++++++------
 arch/arm/mach-pxa/lubbock.c           |   17 +++++++------
 arch/arm/mach-pxa/mainstone.c         |   17 +++++++------
 arch/arm/mach-pxa/pcm990-baseboard.c  |   15 ++++++-----
 arch/arm/mach-pxa/pxa25x.c            |    7 +++--
 arch/arm/mach-pxa/pxa27x.c            |    9 ++++---
 arch/arm/mach-pxa/pxa3xx.c            |   36 ++++++++++++++--------------
 arch/arm/mach-pxa/viper.c             |   22 ++++++++--------
 arch/arm/mach-pxa/zeus.c              |   22 ++++++++--------
 arch/arm/plat-pxa/gpio.c              |   28 +++++++++++-----------
 arch/arm/plat-pxa/include/plat/gpio.h |    4 ++-
 15 files changed, 140 insertions(+), 125 deletions(-)

diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 21e1889..e9352b9 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -477,25 +477,25 @@ static inline void balloon3_leds_init(void) {}
 /******************************************************************************
  * FPGA IRQ
  ******************************************************************************/
-static void balloon3_mask_irq(unsigned int irq)
+static void balloon3_mask_irq(struct irq_data *d)
 {
-	int balloon3_irq = (irq - BALLOON3_IRQ(0));
+	int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
 	balloon3_irq_enabled &= ~(1 << balloon3_irq);
 	__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
 }
 
-static void balloon3_unmask_irq(unsigned int irq)
+static void balloon3_unmask_irq(struct irq_data *d)
 {
-	int balloon3_irq = (irq - BALLOON3_IRQ(0));
+	int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
 	balloon3_irq_enabled |= (1 << balloon3_irq);
 	__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
 }
 
 static struct irq_chip balloon3_irq_chip = {
 	.name		= "FPGA",
-	.ack		= balloon3_mask_irq,
-	.mask		= balloon3_mask_irq,
-	.unmask		= balloon3_unmask_irq,
+	.irq_ack	= balloon3_mask_irq,
+	.irq_mask	= balloon3_mask_irq,
+	.irq_unmask	= balloon3_unmask_irq,
 };
 
 static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -504,8 +504,13 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
 					balloon3_irq_enabled;
 	do {
 		/* clear useless edge notification */
-		if (desc->chip->ack)
-			desc->chip->ack(BALLOON3_AUX_NIRQ);
+		if (desc->irq_data.chip->irq_ack) {
+			struct irq_data *d;
+
+			d = irq_get_irq_data(BALLOON3_AUX_NIRQ);
+			desc->irq_data.chip->irq_ack(d);
+		}
+
 		while (pending) {
 			irq = BALLOON3_IRQ(0) + __ffs(pending);
 			generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 0f31305..a2380cd 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size,
 static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
 	/* clear our parent irq */
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	it8152_irq_demux(irq, desc);
 }
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 4b1ad27..3842608 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -9,11 +9,13 @@
  * published by the Free Software Foundation.
  */
 
+struct irq_data;
 struct sys_timer;
 
 extern struct sys_timer pxa_timer;
 extern void __init pxa_init_irq(int irq_nr,
-				int (*set_wake)(unsigned int, unsigned int));
+				int (*set_wake)(struct irq_data *,
+						unsigned int));
 extern void __init pxa25x_init_irq(void);
 #ifdef CONFIG_CPU_PXA26x
 extern void __init pxa26x_init_irq(void);
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 1beb40f..fd59b64 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -37,29 +37,29 @@
 
 static int pxa_internal_irq_nr;
 
-static void pxa_mask_irq(unsigned int irq)
+static void pxa_mask_irq(struct irq_data *d)
 {
-	_ICMR(irq) &= ~(1 << IRQ_BIT(irq));
+	_ICMR(d->irq) &= ~(1 << IRQ_BIT(d->irq));
 }
 
-static void pxa_unmask_irq(unsigned int irq)
+static void pxa_unmask_irq(struct irq_data *d)
 {
-	_ICMR(irq) |= 1 << IRQ_BIT(irq);
+	_ICMR(d->irq) |= 1 << IRQ_BIT(d->irq);
 }
 
 static struct irq_chip pxa_internal_irq_chip = {
 	.name		= "SC",
-	.ack		= pxa_mask_irq,
-	.mask		= pxa_mask_irq,
-	.unmask		= pxa_unmask_irq,
+	.irq_ack	= pxa_mask_irq,
+	.irq_mask	= pxa_mask_irq,
+	.irq_unmask	= pxa_unmask_irq,
 };
 
 /*
  * GPIO IRQs for GPIO 0 and 1
  */
-static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
+static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
 {
-	int gpio = irq - IRQ_GPIO0;
+	int gpio = d->irq - IRQ_GPIO0;
 
 	if (__gpio_is_occupied(gpio)) {
 		pr_err("%s failed: GPIO is configured\n", __func__);
@@ -79,27 +79,27 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
 	return 0;
 }
 
-static void pxa_ack_low_gpio(unsigned int irq)
+static void pxa_ack_low_gpio(struct irq_data *d)
 {
-	GEDR0 = (1 << (irq - IRQ_GPIO0));
+	GEDR0 = (1 << (d->irq - IRQ_GPIO0));
 }
 
-static void pxa_mask_low_gpio(unsigned int irq)
+static void pxa_mask_low_gpio(struct irq_data *d)
 {
-	ICMR &= ~(1 << (irq - PXA_IRQ(0)));
+	ICMR &= ~(1 << (d->irq - PXA_IRQ(0)));
 }
 
-static void pxa_unmask_low_gpio(unsigned int irq)
+static void pxa_unmask_low_gpio(struct irq_data *d)
 {
-	ICMR |= 1 << (irq - PXA_IRQ(0));
+	ICMR |= 1 << (d->irq - PXA_IRQ(0));
 }
 
 static struct irq_chip pxa_low_gpio_chip = {
 	.name		= "GPIO-l",
-	.ack		= pxa_ack_low_gpio,
-	.mask		= pxa_mask_low_gpio,
-	.unmask		= pxa_unmask_low_gpio,
-	.set_type	= pxa_set_low_gpio_type,
+	.irq_ack	= pxa_ack_low_gpio,
+	.irq_mask	= pxa_mask_low_gpio,
+	.irq_unmask	= pxa_unmask_low_gpio,
+	.irq_set_type	= pxa_set_low_gpio_type,
 };
 
 static void __init pxa_init_low_gpio_irq(set_wake_t fn)
@@ -117,7 +117,7 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
 		set_irq_flags(irq, IRQF_VALID);
 	}
 
-	pxa_low_gpio_chip.set_wake = fn;
+	pxa_low_gpio_chip.irq_set_wake = fn;
 }
 
 void __init pxa_init_irq(int irq_nr, set_wake_t fn)
@@ -148,7 +148,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 		set_irq_flags(irq, IRQF_VALID);
 	}
 
-	pxa_internal_irq_chip.set_wake = fn;
+	pxa_internal_irq_chip.irq_set_wake = fn;
 	pxa_init_low_gpio_irq(fn);
 }
 
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 623af02..cdc402f 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -94,9 +94,9 @@ static unsigned long lpd270_pin_config[] __initdata = {
 
 static unsigned int lpd270_irq_enabled;
 
-static void lpd270_mask_irq(unsigned int irq)
+static void lpd270_mask_irq(struct irq_data *d)
 {
-	int lpd270_irq = irq - LPD270_IRQ(0);
+	int lpd270_irq = d->irq - LPD270_IRQ(0);
 
 	__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
 
@@ -104,9 +104,9 @@ static void lpd270_mask_irq(unsigned int irq)
 	__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 }
 
-static void lpd270_unmask_irq(unsigned int irq)
+static void lpd270_unmask_irq(struct irq_data *d)
 {
-	int lpd270_irq = irq - LPD270_IRQ(0);
+	int lpd270_irq = d->irq - LPD270_IRQ(0);
 
 	lpd270_irq_enabled |= 1 << lpd270_irq;
 	__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
@@ -114,9 +114,9 @@ static void lpd270_unmask_irq(unsigned int irq)
 
 static struct irq_chip lpd270_irq_chip = {
 	.name		= "CPLD",
-	.ack		= lpd270_mask_irq,
-	.mask		= lpd270_mask_irq,
-	.unmask		= lpd270_unmask_irq,
+	.irq_ack	= lpd270_mask_irq,
+	.irq_mask	= lpd270_mask_irq,
+	.irq_unmask	= lpd270_unmask_irq,
 };
 
 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -125,7 +125,8 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 	pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
 	do {
-		desc->chip->ack(irq);	/* clear useless edge notification */
+		/* clear useless edge notification */
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 		if (likely(pending)) {
 			irq = LPD270_IRQ(0) + __ffs(pending);
 			generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 1499493..3ee1b39 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -121,15 +121,15 @@ EXPORT_SYMBOL(lubbock_set_misc_wr);
 
 static unsigned long lubbock_irq_enabled;
 
-static void lubbock_mask_irq(unsigned int irq)
+static void lubbock_mask_irq(struct irq_data *d)
 {
-	int lubbock_irq = (irq - LUBBOCK_IRQ(0));
+	int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
 	LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
 }
 
-static void lubbock_unmask_irq(unsigned int irq)
+static void lubbock_unmask_irq(struct irq_data *d)
 {
-	int lubbock_irq = (irq - LUBBOCK_IRQ(0));
+	int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
 	/* the irq can be acknowledged only if deasserted, so it's done here */
 	LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
 	LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
@@ -137,16 +137,17 @@ static void lubbock_unmask_irq(unsigned int irq)
 
 static struct irq_chip lubbock_irq_chip = {
 	.name		= "FPGA",
-	.ack		= lubbock_mask_irq,
-	.mask		= lubbock_mask_irq,
-	.unmask		= lubbock_unmask_irq,
+	.irq_ack	= lubbock_mask_irq,
+	.irq_mask	= lubbock_mask_irq,
+	.irq_unmask	= lubbock_unmask_irq,
 };
 
 static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
 	unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
 	do {
-		desc->chip->ack(irq);	/* clear our parent irq */
+		/* clear our parent irq */
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 		if (likely(pending)) {
 			irq = LUBBOCK_IRQ(0) + __ffs(pending);
 			generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index a980a5c..0591239 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -122,15 +122,15 @@ static unsigned long mainstone_pin_config[] = {
 
 static unsigned long mainstone_irq_enabled;
 
-static void mainstone_mask_irq(unsigned int irq)
+static void mainstone_mask_irq(struct irq_data *d)
 {
-	int mainstone_irq = (irq - MAINSTONE_IRQ(0));
+	int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
 	MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
 }
 
-static void mainstone_unmask_irq(unsigned int irq)
+static void mainstone_unmask_irq(struct irq_data *d)
 {
-	int mainstone_irq = (irq - MAINSTONE_IRQ(0));
+	int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
 	/* the irq can be acknowledged only if deasserted, so it's done here */
 	MST_INTSETCLR &= ~(1 << mainstone_irq);
 	MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
@@ -138,16 +138,17 @@ static void mainstone_unmask_irq(unsigned int irq)
 
 static struct irq_chip mainstone_irq_chip = {
 	.name		= "FPGA",
-	.ack		= mainstone_mask_irq,
-	.mask		= mainstone_mask_irq,
-	.unmask		= mainstone_unmask_irq,
+	.irq_ack	= mainstone_mask_irq,
+	.irq_mask	= mainstone_mask_irq,
+	.irq_unmask	= mainstone_unmask_irq,
 };
 
 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
 	unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
 	do {
-		desc->chip->ack(irq);	/* clear useless edge notification */
+		/* clear useless edge notification */
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 		if (likely(pending)) {
 			irq = MAINSTONE_IRQ(0) + __ffs(pending);
 			generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index f33647a..90820fa 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -241,23 +241,23 @@ static struct platform_device pcm990_backlight_device = {
 
 static unsigned long pcm990_irq_enabled;
 
-static void pcm990_mask_ack_irq(unsigned int irq)
+static void pcm990_mask_ack_irq(struct irq_data *d)
 {
-	int pcm990_irq = (irq - PCM027_IRQ(0));
+	int pcm990_irq = (d->irq - PCM027_IRQ(0));
 	PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
 }
 
-static void pcm990_unmask_irq(unsigned int irq)
+static void pcm990_unmask_irq(struct irq_data *d)
 {
-	int pcm990_irq = (irq - PCM027_IRQ(0));
+	int pcm990_irq = (d->irq - PCM027_IRQ(0));
 	/* the irq can be acknowledged only if deasserted, so it's done here */
 	PCM990_INTSETCLR |= 1 << pcm990_irq;
 	PCM990_INTMSKENA  = (pcm990_irq_enabled |= (1 << pcm990_irq));
 }
 
 static struct irq_chip pcm990_irq_chip = {
-	.mask_ack	= pcm990_mask_ack_irq,
-	.unmask		= pcm990_unmask_irq,
+	.irq_mask_ack	= pcm990_mask_ack_irq,
+	.irq_unmask	= pcm990_unmask_irq,
 };
 
 static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -265,7 +265,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
 	unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
 
 	do {
-		desc->chip->ack(irq);	/* clear our parent IRQ */
+		/* clear our parent IRQ */
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 		if (likely(pending)) {
 			irq = PCM027_IRQ(0) + __ffs(pending);
 			generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index de53f2e..34c0a23 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -22,6 +22,7 @@
 #include <linux/platform_device.h>
 #include <linux/suspend.h>
 #include <linux/sysdev.h>
+#include <linux/irq.h>
 
 #include <mach/hardware.h>
 #include <mach/irqs.h>
@@ -282,15 +283,15 @@ static inline void pxa25x_init_pm(void) {}
 /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
  */
 
-static int pxa25x_set_wake(unsigned int irq, unsigned int on)
+static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
 {
-	int gpio = IRQ_TO_GPIO(irq);
+	int gpio = IRQ_TO_GPIO(d->irq);
 	uint32_t mask = 0;
 
 	if (gpio >= 0 && gpio < 85)
 		return gpio_set_wake(gpio, on);
 
-	if (irq == IRQ_RTCAlrm) {
+	if (d->irq == IRQ_RTCAlrm) {
 		mask = PWER_RTC;
 		goto set_pwer;
 	}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d1fbf29..52771eb 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -17,6 +17,7 @@
 #include <linux/suspend.h>
 #include <linux/platform_device.h>
 #include <linux/sysdev.h>
+#include <linux/irq.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -334,18 +335,18 @@ static inline void pxa27x_init_pm(void) {}
 /* PXA27x:  Various gpios can issue wakeup events.  This logic only
  * handles the simple cases, not the WEMUX2 and WEMUX3 options
  */
-static int pxa27x_set_wake(unsigned int irq, unsigned int on)
+static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
 {
-	int gpio = IRQ_TO_GPIO(irq);
+	int gpio = IRQ_TO_GPIO(d->irq);
 	uint32_t mask;
 
 	if (gpio >= 0 && gpio < 128)
 		return gpio_set_wake(gpio, on);
 
-	if (irq == IRQ_KEYPAD)
+	if (d->irq == IRQ_KEYPAD)
 		return keypad_set_wake(on);
 
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_RTCAlrm:
 		mask = PWER_RTC;
 		break;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index d1c747c..98b6c3d 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -425,11 +425,11 @@ static void __init pxa3xx_init_pm(void)
 	pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns;
 }
 
-static int pxa3xx_set_wake(unsigned int irq, unsigned int on)
+static int pxa3xx_set_wake(struct irq_data *d, unsigned int on)
 {
 	unsigned long flags, mask = 0;
 
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_SSP3:
 		mask = ADXER_MFP_WSSP3;
 		break;
@@ -518,40 +518,40 @@ static inline void pxa3xx_init_pm(void) {}
 #define pxa3xx_set_wake	NULL
 #endif
 
-static void pxa_ack_ext_wakeup(unsigned int irq)
+static void pxa_ack_ext_wakeup(struct irq_data *d)
 {
-	PECR |= PECR_IS(irq - IRQ_WAKEUP0);
+	PECR |= PECR_IS(d->irq - IRQ_WAKEUP0);
 }
 
-static void pxa_mask_ext_wakeup(unsigned int irq)
+static void pxa_mask_ext_wakeup(struct irq_data *d)
 {
-	ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f));
-	PECR &= ~PECR_IE(irq - IRQ_WAKEUP0);
+	ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f));
+	PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
 }
 
-static void pxa_unmask_ext_wakeup(unsigned int irq)
+static void pxa_unmask_ext_wakeup(struct irq_data *d)
 {
-	ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f);
-	PECR |= PECR_IE(irq - IRQ_WAKEUP0);
+	ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f);
+	PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
 }
 
-static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type)
+static int pxa_set_ext_wakeup_type(struct irq_data *d, unsigned int flow_type)
 {
 	if (flow_type & IRQ_TYPE_EDGE_RISING)
-		PWER |= 1 << (irq - IRQ_WAKEUP0);
+		PWER |= 1 << (d->irq - IRQ_WAKEUP0);
 
 	if (flow_type & IRQ_TYPE_EDGE_FALLING)
-		PWER |= 1 << (irq - IRQ_WAKEUP0 + 2);
+		PWER |= 1 << (d->irq - IRQ_WAKEUP0 + 2);
 
 	return 0;
 }
 
 static struct irq_chip pxa_ext_wakeup_chip = {
 	.name		= "WAKEUP",
-	.ack		= pxa_ack_ext_wakeup,
-	.mask		= pxa_mask_ext_wakeup,
-	.unmask		= pxa_unmask_ext_wakeup,
-	.set_type	= pxa_set_ext_wakeup_type,
+	.irq_ack	= pxa_ack_ext_wakeup,
+	.irq_mask	= pxa_mask_ext_wakeup,
+	.irq_unmask	= pxa_unmask_ext_wakeup,
+	.irq_set_type	= pxa_set_ext_wakeup_type,
 };
 
 static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
@@ -564,7 +564,7 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
 		set_irq_flags(irq, IRQF_VALID);
 	}
 
-	pxa_ext_wakeup_chip.set_wake = fn;
+	pxa_ext_wakeup_chip.irq_set_wake = fn;
 }
 
 void __init pxa3xx_init_irq(void)
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 438fc9a..59cc35f 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -249,9 +249,9 @@ static inline int viper_bit_to_irq(int bit)
 	return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
 }
 
-static void viper_ack_irq(unsigned int irq)
+static void viper_ack_irq(struct irq_data *d)
 {
-	int viper_irq = viper_irq_to_bitmask(irq);
+	int viper_irq = viper_irq_to_bitmask(d->irq);
 
 	if (viper_irq & 0xff)
 		VIPER_LO_IRQ_STATUS = viper_irq;
@@ -259,14 +259,14 @@ static void viper_ack_irq(unsigned int irq)
 		VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
 }
 
-static void viper_mask_irq(unsigned int irq)
+static void viper_mask_irq(struct irq_data *d)
 {
-	viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
+	viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
 }
 
-static void viper_unmask_irq(unsigned int irq)
+static void viper_unmask_irq(struct irq_data *d)
 {
-	viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
+	viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
 }
 
 static inline unsigned long viper_irq_pending(void)
@@ -283,7 +283,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
 	do {
 		/* we're in a chained irq handler,
 		 * so ack the interrupt by hand */
-		desc->chip->ack(irq);
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 		if (likely(pending)) {
 			irq = viper_bit_to_irq(__ffs(pending));
@@ -294,10 +294,10 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
 }
 
 static struct irq_chip viper_irq_chip = {
-	.name	= "ISA",
-	.ack	= viper_ack_irq,
-	.mask	= viper_mask_irq,
-	.unmask	= viper_unmask_irq
+	.name		= "ISA",
+	.irq_ack	= viper_ack_irq,
+	.irq_mask	= viper_mask_irq,
+	.irq_unmask	= viper_unmask_irq
 };
 
 static void __init viper_init_irq(void)
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index dea46a2..054f42b 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -82,19 +82,19 @@ static inline int zeus_bit_to_irq(int bit)
 	return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
 }
 
-static void zeus_ack_irq(unsigned int irq)
+static void zeus_ack_irq(struct irq_data *d)
 {
-	__raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ);
+	__raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
 }
 
-static void zeus_mask_irq(unsigned int irq)
+static void zeus_mask_irq(struct irq_data *d)
 {
-	zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq));
+	zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
 }
 
-static void zeus_unmask_irq(unsigned int irq)
+static void zeus_unmask_irq(struct irq_data *d)
 {
-	zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq);
+	zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
 }
 
 static inline unsigned long zeus_irq_pending(void)
@@ -110,7 +110,7 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
 	do {
 		/* we're in a chained irq handler,
 		 * so ack the interrupt by hand */
-		desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO));
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 		if (likely(pending)) {
 			irq = zeus_bit_to_irq(__ffs(pending));
@@ -121,10 +121,10 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
 }
 
 static struct irq_chip zeus_irq_chip = {
-	.name	= "ISA",
-	.ack	= zeus_ack_irq,
-	.mask	= zeus_mask_irq,
-	.unmask	= zeus_unmask_irq,
+	.name		= "ISA",
+	.irq_ack	= zeus_ack_irq,
+	.irq_mask	= zeus_mask_irq,
+	.irq_unmask	= zeus_unmask_irq,
 };
 
 static void __init zeus_init_irq(void)
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index 98548c6..e7de6ae 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -155,10 +155,10 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
 	__raw_writel(gfer, c->regbase + GFER_OFFSET);
 }
 
-static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
+static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
 {
 	struct pxa_gpio_chip *c;
-	int gpio = irq_to_gpio(irq);
+	int gpio = irq_to_gpio(d->irq);
 	unsigned long gpdr, mask = GPIO_bit(gpio);
 
 	c = gpio_to_chip(gpio);
@@ -195,7 +195,7 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
 
 	update_edge_detect(c);
 
-	pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio,
+	pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, d->irq, gpio,
 		((type & IRQ_TYPE_EDGE_RISING)  ? " rising"  : ""),
 		((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : ""));
 	return 0;
@@ -227,17 +227,17 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
 	} while (loop);
 }
 
-static void pxa_ack_muxed_gpio(unsigned int irq)
+static void pxa_ack_muxed_gpio(struct irq_data *d)
 {
-	int gpio = irq_to_gpio(irq);
+	int gpio = irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_chip(gpio);
 
 	__raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
 }
 
-static void pxa_mask_muxed_gpio(unsigned int irq)
+static void pxa_mask_muxed_gpio(struct irq_data *d)
 {
-	int gpio = irq_to_gpio(irq);
+	int gpio = irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_chip(gpio);
 	uint32_t grer, gfer;
 
@@ -249,9 +249,9 @@ static void pxa_mask_muxed_gpio(unsigned int irq)
 	__raw_writel(gfer, c->regbase + GFER_OFFSET);
 }
 
-static void pxa_unmask_muxed_gpio(unsigned int irq)
+static void pxa_unmask_muxed_gpio(struct irq_data *d)
 {
-	int gpio = irq_to_gpio(irq);
+	int gpio = irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_chip(gpio);
 
 	c->irq_mask |= GPIO_bit(gpio);
@@ -260,10 +260,10 @@ static void pxa_unmask_muxed_gpio(unsigned int irq)
 
 static struct irq_chip pxa_muxed_gpio_chip = {
 	.name		= "GPIO",
-	.ack		= pxa_ack_muxed_gpio,
-	.mask		= pxa_mask_muxed_gpio,
-	.unmask		= pxa_unmask_muxed_gpio,
-	.set_type	= pxa_gpio_irq_type,
+	.irq_ack	= pxa_ack_muxed_gpio,
+	.irq_mask	= pxa_mask_muxed_gpio,
+	.irq_unmask	= pxa_unmask_muxed_gpio,
+	.irq_set_type	= pxa_gpio_irq_type,
 };
 
 void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
@@ -291,7 +291,7 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
 
 	/* Install handler for GPIO>=2 edge detect interrupts */
 	set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler);
-	pxa_muxed_gpio_chip.set_wake = fn;
+	pxa_muxed_gpio_chip.irq_set_wake = fn;
 }
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
index 44248cb..1ddd2b9 100644
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ b/arch/arm/plat-pxa/include/plat/gpio.h
@@ -1,6 +1,8 @@
 #ifndef __PLAT_GPIO_H
 #define __PLAT_GPIO_H
 
+struct irq_data;
+
 /*
  * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
  * one set of registers. The register offsets are organized below:
@@ -56,7 +58,7 @@ static inline void gpio_set_value(unsigned gpio, int value)
  */
 extern int pxa_last_gpio;
 
-typedef int (*set_wake_t)(unsigned int irq, unsigned int on);
+typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
 
 extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
 #endif /* __PLAT_GPIO_H */
-- 
1.7.1

[PATCH 39/54] ARM: rpc: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-rpc/irq.c |   60 +++++++++++++++++++++++-----------------------
 1 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
index 9dd15d6..d29cd9b 100644
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -6,110 +6,110 @@
 #include <asm/hardware/iomd.h>
 #include <asm/irq.h>
 
-static void iomd_ack_irq_a(unsigned int irq)
+static void iomd_ack_irq_a(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << irq;
+	mask = 1 << d->irq;
 	val = iomd_readb(IOMD_IRQMASKA);
 	iomd_writeb(val & ~mask, IOMD_IRQMASKA);
 	iomd_writeb(mask, IOMD_IRQCLRA);
 }
 
-static void iomd_mask_irq_a(unsigned int irq)
+static void iomd_mask_irq_a(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << irq;
+	mask = 1 << d->irq;
 	val = iomd_readb(IOMD_IRQMASKA);
 	iomd_writeb(val & ~mask, IOMD_IRQMASKA);
 }
 
-static void iomd_unmask_irq_a(unsigned int irq)
+static void iomd_unmask_irq_a(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << irq;
+	mask = 1 << d->irq;
 	val = iomd_readb(IOMD_IRQMASKA);
 	iomd_writeb(val | mask, IOMD_IRQMASKA);
 }
 
 static struct irq_chip iomd_a_chip = {
-	.ack	= iomd_ack_irq_a,
-	.mask	= iomd_mask_irq_a,
-	.unmask = iomd_unmask_irq_a,
+	.irq_ack	= iomd_ack_irq_a,
+	.irq_mask	= iomd_mask_irq_a,
+	.irq_unmask	= iomd_unmask_irq_a,
 };
 
-static void iomd_mask_irq_b(unsigned int irq)
+static void iomd_mask_irq_b(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << (irq & 7);
+	mask = 1 << (d->irq & 7);
 	val = iomd_readb(IOMD_IRQMASKB);
 	iomd_writeb(val & ~mask, IOMD_IRQMASKB);
 }
 
-static void iomd_unmask_irq_b(unsigned int irq)
+static void iomd_unmask_irq_b(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << (irq & 7);
+	mask = 1 << (d->irq & 7);
 	val = iomd_readb(IOMD_IRQMASKB);
 	iomd_writeb(val | mask, IOMD_IRQMASKB);
 }
 
 static struct irq_chip iomd_b_chip = {
-	.ack	= iomd_mask_irq_b,
-	.mask	= iomd_mask_irq_b,
-	.unmask = iomd_unmask_irq_b,
+	.irq_ack	= iomd_mask_irq_b,
+	.irq_mask	= iomd_mask_irq_b,
+	.irq_unmask	= iomd_unmask_irq_b,
 };
 
-static void iomd_mask_irq_dma(unsigned int irq)
+static void iomd_mask_irq_dma(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << (irq & 7);
+	mask = 1 << (d->irq & 7);
 	val = iomd_readb(IOMD_DMAMASK);
 	iomd_writeb(val & ~mask, IOMD_DMAMASK);
 }
 
-static void iomd_unmask_irq_dma(unsigned int irq)
+static void iomd_unmask_irq_dma(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << (irq & 7);
+	mask = 1 << (d->irq & 7);
 	val = iomd_readb(IOMD_DMAMASK);
 	iomd_writeb(val | mask, IOMD_DMAMASK);
 }
 
 static struct irq_chip iomd_dma_chip = {
-	.ack	= iomd_mask_irq_dma,
-	.mask	= iomd_mask_irq_dma,
-	.unmask = iomd_unmask_irq_dma,
+	.irq_ack	= iomd_mask_irq_dma,
+	.irq_mask	= iomd_mask_irq_dma,
+	.irq_unmask	= iomd_unmask_irq_dma,
 };
 
-static void iomd_mask_irq_fiq(unsigned int irq)
+static void iomd_mask_irq_fiq(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << (irq & 7);
+	mask = 1 << (d->irq & 7);
 	val = iomd_readb(IOMD_FIQMASK);
 	iomd_writeb(val & ~mask, IOMD_FIQMASK);
 }
 
-static void iomd_unmask_irq_fiq(unsigned int irq)
+static void iomd_unmask_irq_fiq(struct irq_data *d)
 {
 	unsigned int val, mask;
 
-	mask = 1 << (irq & 7);
+	mask = 1 << (d->irq & 7);
 	val = iomd_readb(IOMD_FIQMASK);
 	iomd_writeb(val | mask, IOMD_FIQMASK);
 }
 
 static struct irq_chip iomd_fiq_chip = {
-	.ack	= iomd_mask_irq_fiq,
-	.mask	= iomd_mask_irq_fiq,
-	.unmask = iomd_unmask_irq_fiq,
+	.irq_ack	= iomd_mask_irq_fiq,
+	.irq_mask	= iomd_mask_irq_fiq,
+	.irq_unmask	= iomd_unmask_irq_fiq,
 };
 
 void __init rpc_init_irq(void)
-- 
1.7.1

[PATCH 40/54] ARM: Samsung SoCs: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-s3c2410/bast-irq.c         |   22 ++--
 arch/arm/mach-s3c2412/irq.c              |   50 +++++-----
 arch/arm/mach-s3c2416/irq.c              |   72 +++++++-------
 arch/arm/mach-s3c2440/irq.c              |   18 ++--
 arch/arm/mach-s3c2440/s3c244x-irq.c      |   18 ++--
 arch/arm/mach-s3c2443/irq.c              |   90 ++++++++--------
 arch/arm/mach-s3c64xx/irq-eint.c         |   34 +++---
 arch/arm/mach-s5pv310/irq-combiner.c     |   26 +++--
 arch/arm/mach-s5pv310/irq-eint.c         |   55 +++++-----
 arch/arm/plat-s3c24xx/include/plat/irq.h |    4 +-
 arch/arm/plat-s3c24xx/irq-pm.c           |    9 +-
 arch/arm/plat-s3c24xx/irq.c              |  170 +++++++++++++++---------------
 arch/arm/plat-s5p/irq-eint.c             |   84 ++++++++--------
 arch/arm/plat-s5p/irq-gpioint.c          |   50 +++++-----
 arch/arm/plat-s5p/irq-pm.c               |    6 +-
 arch/arm/plat-samsung/include/plat/pm.h  |    4 +-
 arch/arm/plat-samsung/irq-uart.c         |   44 ++++----
 arch/arm/plat-samsung/irq-vic-timer.c    |   22 ++--
 arch/arm/plat-samsung/pm.c               |    7 +-
 19 files changed, 396 insertions(+), 389 deletions(-)

diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 217b102..a22a8a0 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -75,38 +75,38 @@ static unsigned char bast_pc104_irqmasks[] = {
 static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };
 
 static void
-bast_pc104_mask(unsigned int irqno)
+bast_pc104_mask(struct irq_data *d)
 {
 	unsigned long temp;
 
 	temp = __raw_readb(BAST_VA_PC104_IRQMASK);
-	temp &= ~bast_pc104_irqmasks[irqno];
+	temp &= ~bast_pc104_irqmasks[d->irq];
 	__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
 }
 
 static void
-bast_pc104_maskack(unsigned int irqno)
+bast_pc104_maskack(struct irq_data *d)
 {
 	struct irq_desc *desc = irq_desc + IRQ_ISA;
 
-	bast_pc104_mask(irqno);
-	desc->chip->ack(IRQ_ISA);
+	bast_pc104_mask(d);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 }
 
 static void
-bast_pc104_unmask(unsigned int irqno)
+bast_pc104_unmask(struct irq_data *d)
 {
 	unsigned long temp;
 
 	temp = __raw_readb(BAST_VA_PC104_IRQMASK);
-	temp |= bast_pc104_irqmasks[irqno];
+	temp |= bast_pc104_irqmasks[d->irq];
 	__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
 }
 
 static struct irq_chip  bast_pc104_chip = {
-	.mask	     = bast_pc104_mask,
-	.unmask	     = bast_pc104_unmask,
-	.ack	     = bast_pc104_maskack
+	.irq_mask	= bast_pc104_mask,
+	.irq_unmask     = bast_pc104_unmask,
+	.irq_ack	= bast_pc104_maskack
 };
 
 static void
@@ -123,7 +123,7 @@ bast_irq_pc104_demux(unsigned int irq,
 		/* ack if we get an irq with nothing (ie, startup) */
 
 		desc = irq_desc + IRQ_ISA;
-		desc->chip->ack(IRQ_ISA);
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 	} else {
 		/* handle the IRQ */
 
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index 6000ca9..b8b86c3 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -49,9 +49,9 @@
 */
 
 static void
-s3c2412_irq_mask(unsigned int irqno)
+s3c2412_irq_mask(struct irq_data *d)
 {
-	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
 	unsigned long mask;
 
 	mask = __raw_readl(S3C2410_INTMSK);
@@ -62,9 +62,9 @@ s3c2412_irq_mask(unsigned int irqno)
 }
 
 static inline void
-s3c2412_irq_ack(unsigned int irqno)
+s3c2412_irq_ack(struct irq_data *d)
 {
-	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
 
 	__raw_writel(bitval, S3C2412_EINTPEND);
 	__raw_writel(bitval, S3C2410_SRCPND);
@@ -72,9 +72,9 @@ s3c2412_irq_ack(unsigned int irqno)
 }
 
 static inline void
-s3c2412_irq_maskack(unsigned int irqno)
+s3c2412_irq_maskack(struct irq_data *d)
 {
-	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
 	unsigned long mask;
 
 	mask = __raw_readl(S3C2410_INTMSK);
@@ -89,9 +89,9 @@ s3c2412_irq_maskack(unsigned int irqno)
 }
 
 static void
-s3c2412_irq_unmask(unsigned int irqno)
+s3c2412_irq_unmask(struct irq_data *d)
 {
-	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
 	unsigned long mask;
 
 	mask = __raw_readl(S3C2412_EINTMASK);
@@ -102,11 +102,11 @@ s3c2412_irq_unmask(unsigned int irqno)
 }
 
 static struct irq_chip s3c2412_irq_eint0t4 = {
-	.ack	   = s3c2412_irq_ack,
-	.mask	   = s3c2412_irq_mask,
-	.unmask	   = s3c2412_irq_unmask,
-	.set_wake  = s3c_irq_wake,
-	.set_type  = s3c_irqext_type,
+	.irq_ack	= s3c2412_irq_ack,
+	.irq_mask	= s3c2412_irq_mask,
+	.irq_unmask	= s3c2412_irq_unmask,
+	.irq_set_wake   = s3c_irq_wake,
+	.irq_set_type   = s3c_irqext_type,
 };
 
 #define INTBIT(x)	(1 << ((x) - S3C2410_IRQSUB(0)))
@@ -132,29 +132,29 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_CFSDI	(1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
 #define SUBMSK_CFSDI	INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF)
 
-static void s3c2412_irq_cfsdi_mask(unsigned int irqno)
+static void s3c2412_irq_cfsdi_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
+	s3c_irqsub_mask(d->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
 }
 
-static void s3c2412_irq_cfsdi_unmask(unsigned int irqno)
+static void s3c2412_irq_cfsdi_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_CFSDI);
+	s3c_irqsub_unmask(d->irq, INTMSK_CFSDI);
 }
 
-static void s3c2412_irq_cfsdi_ack(unsigned int irqno)
+static void s3c2412_irq_cfsdi_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
+	s3c_irqsub_maskack(d->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
 }
 
 static struct irq_chip s3c2412_irq_cfsdi = {
 	.name		= "s3c2412-cfsdi",
-	.ack		= s3c2412_irq_cfsdi_ack,
-	.mask		= s3c2412_irq_cfsdi_mask,
-	.unmask		= s3c2412_irq_cfsdi_unmask,
+	.irq_ack	= s3c2412_irq_cfsdi_ack,
+	.irq_mask	= s3c2412_irq_cfsdi_mask,
+	.irq_unmask	= s3c2412_irq_cfsdi_unmask,
 };
 
-static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
+static int s3c2412_irq_rtc_wake(struct irq_data *d, unsigned int state)
 {
 	unsigned long pwrcfg;
 
@@ -165,7 +165,7 @@ static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
 		pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ;
 	__raw_writel(pwrcfg, S3C2412_PWRCFG);
 
-	return s3c_irq_chip.set_wake(irqno, state);
+	return s3c_irq_chip.irq_set_wake(d, state);
 }
 
 static struct irq_chip s3c2412_irq_rtc_chip;
@@ -193,7 +193,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
 	/* change RTC IRQ's set wake method */
 
 	s3c2412_irq_rtc_chip = s3c_irq_chip;
-	s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake;
+	s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake;
 
 	set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
 
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c
index 00174da..6268d2c 100644
--- a/arch/arm/mach-s3c2416/irq.c
+++ b/arch/arm/mach-s3c2416/irq.c
@@ -77,25 +77,25 @@ static void s3c2416_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_WDTAC97	(1UL << (IRQ_WDT - IRQ_EINT0))
 #define SUBMSK_WDTAC97	INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
 
-static void s3c2416_irq_wdtac97_mask(unsigned int irqno)
+static void s3c2416_irq_wdtac97_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
+	s3c_irqsub_mask(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
 }
 
-static void s3c2416_irq_wdtac97_unmask(unsigned int irqno)
+static void s3c2416_irq_wdtac97_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
+	s3c_irqsub_unmask(d->irq, INTMSK_WDTAC97);
 }
 
-static void s3c2416_irq_wdtac97_ack(unsigned int irqno)
+static void s3c2416_irq_wdtac97_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
+	s3c_irqsub_maskack(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
 }
 
 static struct irq_chip s3c2416_irq_wdtac97 = {
-	.mask	    = s3c2416_irq_wdtac97_mask,
-	.unmask	    = s3c2416_irq_wdtac97_unmask,
-	.ack	    = s3c2416_irq_wdtac97_ack,
+	.irq_mask	= s3c2416_irq_wdtac97_mask,
+	.irq_unmask	= s3c2416_irq_wdtac97_unmask,
+	.irq_ack	= s3c2416_irq_wdtac97_ack,
 };
 
 
@@ -109,25 +109,25 @@ static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_LCD	(1UL << (IRQ_LCD - IRQ_EINT0))
 #define SUBMSK_LCD	INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
 
-static void s3c2416_irq_lcd_mask(unsigned int irqno)
+static void s3c2416_irq_lcd_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
+	s3c_irqsub_mask(d->irq, INTMSK_LCD, SUBMSK_LCD);
 }
 
-static void s3c2416_irq_lcd_unmask(unsigned int irqno)
+static void s3c2416_irq_lcd_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_LCD);
+	s3c_irqsub_unmask(d->irq, INTMSK_LCD);
 }
 
-static void s3c2416_irq_lcd_ack(unsigned int irqno)
+static void s3c2416_irq_lcd_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
+	s3c_irqsub_maskack(d->irq, INTMSK_LCD, SUBMSK_LCD);
 }
 
 static struct irq_chip s3c2416_irq_lcd = {
-	.mask	    = s3c2416_irq_lcd_mask,
-	.unmask	    = s3c2416_irq_lcd_unmask,
-	.ack	    = s3c2416_irq_lcd_ack,
+	.irq_mask	= s3c2416_irq_lcd_mask,
+	.irq_unmask	= s3c2416_irq_lcd_unmask,
+	.irq_ack	= s3c2416_irq_lcd_ack,
 };
 
 
@@ -142,25 +142,25 @@ static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
 #define SUBMSK_DMA	INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
 
 
-static void s3c2416_irq_dma_mask(unsigned int irqno)
+static void s3c2416_irq_dma_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
+	s3c_irqsub_mask(d->irq, INTMSK_DMA, SUBMSK_DMA);
 }
 
-static void s3c2416_irq_dma_unmask(unsigned int irqno)
+static void s3c2416_irq_dma_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_DMA);
+	s3c_irqsub_unmask(d->irq, INTMSK_DMA);
 }
 
-static void s3c2416_irq_dma_ack(unsigned int irqno)
+static void s3c2416_irq_dma_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
+	s3c_irqsub_maskack(d->irq, INTMSK_DMA, SUBMSK_DMA);
 }
 
 static struct irq_chip s3c2416_irq_dma = {
-	.mask	    = s3c2416_irq_dma_mask,
-	.unmask	    = s3c2416_irq_dma_unmask,
-	.ack	    = s3c2416_irq_dma_ack,
+	.irq_mask	= s3c2416_irq_dma_mask,
+	.irq_unmask	= s3c2416_irq_dma_unmask,
+	.irq_ack	= s3c2416_irq_dma_ack,
 };
 
 
@@ -174,25 +174,25 @@ static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_UART3	(1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
 #define SUBMSK_UART3	(0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
 
-static void s3c2416_irq_uart3_mask(unsigned int irqno)
+static void s3c2416_irq_uart3_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
+	s3c_irqsub_mask(d->irq, INTMSK_UART3, SUBMSK_UART3);
 }
 
-static void s3c2416_irq_uart3_unmask(unsigned int irqno)
+static void s3c2416_irq_uart3_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_UART3);
+	s3c_irqsub_unmask(d->irq, INTMSK_UART3);
 }
 
-static void s3c2416_irq_uart3_ack(unsigned int irqno)
+static void s3c2416_irq_uart3_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
+	s3c_irqsub_maskack(d->irq, INTMSK_UART3, SUBMSK_UART3);
 }
 
 static struct irq_chip s3c2416_irq_uart3 = {
-	.mask	    = s3c2416_irq_uart3_mask,
-	.unmask	    = s3c2416_irq_uart3_unmask,
-	.ack	    = s3c2416_irq_uart3_ack,
+	.irq_mask	= s3c2416_irq_uart3_mask,
+	.irq_unmask	= s3c2416_irq_uart3_unmask,
+	.irq_ack	= s3c2416_irq_uart3_ack,
 };
 
 
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
index 0c049b9..9af46d5 100644
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -69,27 +69,27 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
 #define INTMSK_WDT	 (1UL << (IRQ_WDT - IRQ_EINT0))
 
 static void
-s3c_irq_wdtac97_mask(unsigned int irqno)
+s3c_irq_wdtac97_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
+	s3c_irqsub_mask(d->irq, INTMSK_WDT, 3<<13);
 }
 
 static void
-s3c_irq_wdtac97_unmask(unsigned int irqno)
+s3c_irq_wdtac97_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_WDT);
+	s3c_irqsub_unmask(d->irq, INTMSK_WDT);
 }
 
 static void
-s3c_irq_wdtac97_ack(unsigned int irqno)
+s3c_irq_wdtac97_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
+	s3c_irqsub_maskack(d->irq, INTMSK_WDT, 3<<13);
 }
 
 static struct irq_chip s3c_irq_wdtac97 = {
-	.mask	    = s3c_irq_wdtac97_mask,
-	.unmask	    = s3c_irq_wdtac97_unmask,
-	.ack	    = s3c_irq_wdtac97_ack,
+	.irq_mask	= s3c_irq_wdtac97_mask,
+	.irq_unmask	= s3c_irq_wdtac97_unmask,
+	.irq_ack	= s3c_irq_wdtac97_ack,
 };
 
 static int s3c2440_irq_add(struct sys_device *sysdev)
diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index a75c0c2..3878c0a 100644
--- a/arch/arm/mach-s3c2440/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
@@ -68,27 +68,27 @@ static void s3c_irq_demux_cam(unsigned int irq,
 #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
 
 static void
-s3c_irq_cam_mask(unsigned int irqno)
+s3c_irq_cam_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
+	s3c_irqsub_mask(d->irq, INTMSK_CAM, 3<<11);
 }
 
 static void
-s3c_irq_cam_unmask(unsigned int irqno)
+s3c_irq_cam_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_CAM);
+	s3c_irqsub_unmask(d->irq, INTMSK_CAM);
 }
 
 static void
-s3c_irq_cam_ack(unsigned int irqno)
+s3c_irq_cam_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
+	s3c_irqsub_maskack(d->irq, INTMSK_CAM, 3<<11);
 }
 
 static struct irq_chip s3c_irq_cam = {
-	.mask	    = s3c_irq_cam_mask,
-	.unmask	    = s3c_irq_cam_unmask,
-	.ack	    = s3c_irq_cam_ack,
+	.irq_mask	= s3c_irq_cam_mask,
+	.irq_unmask	= s3c_irq_cam_unmask,
+	.irq_ack	= s3c_irq_cam_ack,
 };
 
 static int s3c244x_irq_add(struct sys_device *sysdev)
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index 8934247..74b49f4 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -75,25 +75,25 @@ static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_WDTAC97	(1UL << (IRQ_WDT - IRQ_EINT0))
 #define SUBMSK_WDTAC97	INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
 
-static void s3c2443_irq_wdtac97_mask(unsigned int irqno)
+static void s3c2443_irq_wdtac97_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
+	s3c_irqsub_mask(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
 }
 
-static void s3c2443_irq_wdtac97_unmask(unsigned int irqno)
+static void s3c2443_irq_wdtac97_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
+	s3c_irqsub_unmask(d->irq, INTMSK_WDTAC97);
 }
 
-static void s3c2443_irq_wdtac97_ack(unsigned int irqno)
+static void s3c2443_irq_wdtac97_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
+	s3c_irqsub_maskack(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
 }
 
 static struct irq_chip s3c2443_irq_wdtac97 = {
-	.mask	    = s3c2443_irq_wdtac97_mask,
-	.unmask	    = s3c2443_irq_wdtac97_unmask,
-	.ack	    = s3c2443_irq_wdtac97_ack,
+	.irq_mask	= s3c2443_irq_wdtac97_mask,
+	.irq_unmask	= s3c2443_irq_wdtac97_unmask,
+	.irq_ack	= s3c2443_irq_wdtac97_ack,
 };
 
 
@@ -107,25 +107,25 @@ static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_LCD	(1UL << (IRQ_LCD - IRQ_EINT0))
 #define SUBMSK_LCD	INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
 
-static void s3c2443_irq_lcd_mask(unsigned int irqno)
+static void s3c2443_irq_lcd_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
+	s3c_irqsub_mask(d->irq, INTMSK_LCD, SUBMSK_LCD);
 }
 
-static void s3c2443_irq_lcd_unmask(unsigned int irqno)
+static void s3c2443_irq_lcd_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_LCD);
+	s3c_irqsub_unmask(d->irq, INTMSK_LCD);
 }
 
-static void s3c2443_irq_lcd_ack(unsigned int irqno)
+static void s3c2443_irq_lcd_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
+	s3c_irqsub_maskack(d->irq, INTMSK_LCD, SUBMSK_LCD);
 }
 
 static struct irq_chip s3c2443_irq_lcd = {
-	.mask	    = s3c2443_irq_lcd_mask,
-	.unmask	    = s3c2443_irq_lcd_unmask,
-	.ack	    = s3c2443_irq_lcd_ack,
+	.irq_mask	= s3c2443_irq_lcd_mask,
+	.irq_unmask	= s3c2443_irq_lcd_unmask,
+	.irq_ack	= s3c2443_irq_lcd_ack,
 };
 
 
@@ -140,25 +140,25 @@ static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
 #define SUBMSK_DMA	INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
 
 
-static void s3c2443_irq_dma_mask(unsigned int irqno)
+static void s3c2443_irq_dma_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
+	s3c_irqsub_mask(d->irq, INTMSK_DMA, SUBMSK_DMA);
 }
 
-static void s3c2443_irq_dma_unmask(unsigned int irqno)
+static void s3c2443_irq_dma_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_DMA);
+	s3c_irqsub_unmask(d->irq, INTMSK_DMA);
 }
 
-static void s3c2443_irq_dma_ack(unsigned int irqno)
+static void s3c2443_irq_dma_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
+	s3c_irqsub_maskack(d->irq, INTMSK_DMA, SUBMSK_DMA);
 }
 
 static struct irq_chip s3c2443_irq_dma = {
-	.mask	    = s3c2443_irq_dma_mask,
-	.unmask	    = s3c2443_irq_dma_unmask,
-	.ack	    = s3c2443_irq_dma_ack,
+	.irq_mask	= s3c2443_irq_dma_mask,
+	.irq_unmask	= s3c2443_irq_dma_unmask,
+	.irq_ack	= s3c2443_irq_dma_ack,
 };
 
 
@@ -172,25 +172,25 @@ static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_UART3	(1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
 #define SUBMSK_UART3	(0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
 
-static void s3c2443_irq_uart3_mask(unsigned int irqno)
+static void s3c2443_irq_uart3_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
+	s3c_irqsub_mask(d->irq, INTMSK_UART3, SUBMSK_UART3);
 }
 
-static void s3c2443_irq_uart3_unmask(unsigned int irqno)
+static void s3c2443_irq_uart3_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_UART3);
+	s3c_irqsub_unmask(d->irq, INTMSK_UART3);
 }
 
-static void s3c2443_irq_uart3_ack(unsigned int irqno)
+static void s3c2443_irq_uart3_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
+	s3c_irqsub_maskack(d->irq, INTMSK_UART3, SUBMSK_UART3);
 }
 
 static struct irq_chip s3c2443_irq_uart3 = {
-	.mask	    = s3c2443_irq_uart3_mask,
-	.unmask	    = s3c2443_irq_uart3_unmask,
-	.ack	    = s3c2443_irq_uart3_ack,
+	.irq_mask	= s3c2443_irq_uart3_mask,
+	.irq_unmask	= s3c2443_irq_uart3_unmask,
+	.irq_ack	= s3c2443_irq_uart3_ack,
 };
 
 
@@ -204,25 +204,25 @@ static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
 #define INTMSK_CAM	(1UL << (IRQ_CAM - IRQ_EINT0))
 #define SUBMSK_CAM	INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
 
-static void s3c2443_irq_cam_mask(unsigned int irqno)
+static void s3c2443_irq_cam_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_CAM, SUBMSK_CAM);
+	s3c_irqsub_mask(d->irq, INTMSK_CAM, SUBMSK_CAM);
 }
 
-static void s3c2443_irq_cam_unmask(unsigned int irqno)
+static void s3c2443_irq_cam_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_CAM);
+	s3c_irqsub_unmask(d->irq, INTMSK_CAM);
 }
 
-static void s3c2443_irq_cam_ack(unsigned int irqno)
+static void s3c2443_irq_cam_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_CAM, SUBMSK_CAM);
+	s3c_irqsub_maskack(d->irq, INTMSK_CAM, SUBMSK_CAM);
 }
 
 static struct irq_chip s3c2443_irq_cam = {
-	.mask	    = s3c2443_irq_cam_mask,
-	.unmask	    = s3c2443_irq_cam_unmask,
-	.ack	    = s3c2443_irq_cam_ack,
+	.irq_mask	= s3c2443_irq_cam_mask,
+	.irq_unmask	= s3c2443_irq_cam_unmask,
+	.irq_ack	= s3c2443_irq_cam_ack,
 };
 
 /* IRQ initialisation code */
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index 5682d6a..27961d3 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -32,39 +32,39 @@
 #define eint_offset(irq)	((irq) - IRQ_EINT(0))
 #define eint_irq_to_bit(irq)	(1 << eint_offset(irq))
 
-static inline void s3c_irq_eint_mask(unsigned int irq)
+static inline void s3c_irq_eint_mask(struct irq_data *d)
 {
 	u32 mask;
 
 	mask = __raw_readl(S3C64XX_EINT0MASK);
-	mask |= eint_irq_to_bit(irq);
+	mask |= eint_irq_to_bit(d->irq);
 	__raw_writel(mask, S3C64XX_EINT0MASK);
 }
 
-static void s3c_irq_eint_unmask(unsigned int irq)
+static void s3c_irq_eint_unmask(struct irq_data *d)
 {
 	u32 mask;
 
 	mask = __raw_readl(S3C64XX_EINT0MASK);
-	mask &= ~eint_irq_to_bit(irq);
+	mask &= ~eint_irq_to_bit(d->irq);
 	__raw_writel(mask, S3C64XX_EINT0MASK);
 }
 
-static inline void s3c_irq_eint_ack(unsigned int irq)
+static inline void s3c_irq_eint_ack(struct irq_data *d)
 {
-	__raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND);
+	__raw_writel(eint_irq_to_bit(d->irq), S3C64XX_EINT0PEND);
 }
 
-static void s3c_irq_eint_maskack(unsigned int irq)
+static void s3c_irq_eint_maskack(struct irq_data *d)
 {
 	/* compiler should in-line these */
-	s3c_irq_eint_mask(irq);
-	s3c_irq_eint_ack(irq);
+	s3c_irq_eint_mask(d);
+	s3c_irq_eint_ack(d);
 }
 
-static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
+static int s3c_irq_eint_set_type(struct irq_data *d, unsigned int type)
 {
-	int offs = eint_offset(irq);
+	int offs = eint_offset(d->irq);
 	int pin, pin_val;
 	int shift;
 	u32 ctrl, mask;
@@ -140,12 +140,12 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
 
 static struct irq_chip s3c_irq_eint = {
 	.name		= "s3c-eint",
-	.mask		= s3c_irq_eint_mask,
-	.unmask		= s3c_irq_eint_unmask,
-	.mask_ack	= s3c_irq_eint_maskack,
-	.ack		= s3c_irq_eint_ack,
-	.set_type	= s3c_irq_eint_set_type,
-	.set_wake	= s3c_irqext_wake,
+	.irq_mask	= s3c_irq_eint_mask,
+	.irq_unmask	= s3c_irq_eint_unmask,
+	.irq_mask_ack	= s3c_irq_eint_maskack,
+	.irq_ack	= s3c_irq_eint_ack,
+	.irq_set_type	= s3c_irq_eint_set_type,
+	.irq_set_wake	= s3c_irqext_wake,
 };
 
 /* s3c_irq_demux_eint
diff --git a/arch/arm/mach-s5pv310/irq-combiner.c b/arch/arm/mach-s5pv310/irq-combiner.c
index c3f88c3..8ef0c38 100644
--- a/arch/arm/mach-s5pv310/irq-combiner.c
+++ b/arch/arm/mach-s5pv310/irq-combiner.c
@@ -29,24 +29,26 @@ struct combiner_chip_data {
 
 static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
 
-static inline void __iomem *combiner_base(unsigned int irq)
+static inline void __iomem *combiner_base(struct irq_data *d)
 {
-	struct combiner_chip_data *combiner_data = get_irq_chip_data(irq);
+	struct combiner_chip_data *combiner_data =
+		irq_data_get_irq_chip_data(d);
+
 	return combiner_data->base;
 }
 
-static void combiner_mask_irq(unsigned int irq)
+static void combiner_mask_irq(struct irq_data *d)
 {
-	u32 mask = 1 << (irq % 32);
+	u32 mask = 1 << (d->irq % 32);
 
-	__raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_CLEAR);
+	__raw_writel(mask, combiner_base(d) + COMBINER_ENABLE_CLEAR);
 }
 
-static void combiner_unmask_irq(unsigned int irq)
+static void combiner_unmask_irq(struct irq_data *d)
 {
-	u32 mask = 1 << (irq % 32);
+	u32 mask = 1 << (d->irq % 32);
 
-	__raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_SET);
+	__raw_writel(mask, combiner_base(d) + COMBINER_ENABLE_SET);
 }
 
 static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
@@ -57,7 +59,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 	unsigned long status;
 
 	/* primary controller ack'ing */
-	chip->ack(irq);
+	chip->irq_ack(&desc->irq_data);
 
 	spin_lock(&irq_controller_lock);
 	status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
@@ -76,13 +78,13 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 
  out:
 	/* primary controller unmasking */
-	chip->unmask(irq);
+	chip->irq_unmask(&desc->irq_data);
 }
 
 static struct irq_chip combiner_chip = {
 	.name		= "COMBINER",
-	.mask		= combiner_mask_irq,
-	.unmask		= combiner_unmask_irq,
+	.irq_mask	= combiner_mask_irq,
+	.irq_unmask	= combiner_unmask_irq,
 };
 
 void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
diff --git a/arch/arm/mach-s5pv310/irq-eint.c b/arch/arm/mach-s5pv310/irq-eint.c
index 5877503..ed26db8 100644
--- a/arch/arm/mach-s5pv310/irq-eint.c
+++ b/arch/arm/mach-s5pv310/irq-eint.c
@@ -48,42 +48,43 @@ static unsigned int s5pv310_get_irq_nr(unsigned int number)
 	return ret;
 }
 
-static inline void s5pv310_irq_eint_mask(unsigned int irq)
+static inline void s5pv310_irq_eint_mask(struct irq_data *d)
 {
 	u32 mask;
 
 	spin_lock(&eint_lock);
-	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
-	mask |= eint_irq_to_bit(irq);
-	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
+	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
+	mask |= eint_irq_to_bit(d->irq);
+	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
 	spin_unlock(&eint_lock);
 }
 
-static void s5pv310_irq_eint_unmask(unsigned int irq)
+static void s5pv310_irq_eint_unmask(struct irq_data *d)
 {
 	u32 mask;
 
 	spin_lock(&eint_lock);
-	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
-	mask &= ~(eint_irq_to_bit(irq));
-	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
+	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
+	mask &= ~(eint_irq_to_bit(d->irq));
+	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
 	spin_unlock(&eint_lock);
 }
 
-static inline void s5pv310_irq_eint_ack(unsigned int irq)
+static inline void s5pv310_irq_eint_ack(struct irq_data *d)
 {
-	__raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq)));
+	__raw_writel(eint_irq_to_bit(d->irq),
+		     S5P_EINT_PEND(EINT_REG_NR(d->irq)));
 }
 
-static void s5pv310_irq_eint_maskack(unsigned int irq)
+static void s5pv310_irq_eint_maskack(struct irq_data *d)
 {
-	s5pv310_irq_eint_mask(irq);
-	s5pv310_irq_eint_ack(irq);
+	s5pv310_irq_eint_mask(d);
+	s5pv310_irq_eint_ack(d);
 }
 
-static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type)
+static int s5pv310_irq_eint_set_type(struct irq_data *d, unsigned int type)
 {
-	int offs = EINT_OFFSET(irq);
+	int offs = EINT_OFFSET(d->irq);
 	int shift;
 	u32 ctrl, mask;
 	u32 newvalue = 0;
@@ -118,10 +119,10 @@ static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type)
 	mask = 0x7 << shift;
 
 	spin_lock(&eint_lock);
-	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq)));
+	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(d->irq)));
 	ctrl &= ~mask;
 	ctrl |= newvalue << shift;
-	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq)));
+	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(d->irq)));
 	spin_unlock(&eint_lock);
 
 	switch (offs) {
@@ -146,13 +147,13 @@ static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type)
 
 static struct irq_chip s5pv310_irq_eint = {
 	.name		= "s5pv310-eint",
-	.mask		= s5pv310_irq_eint_mask,
-	.unmask		= s5pv310_irq_eint_unmask,
-	.mask_ack	= s5pv310_irq_eint_maskack,
-	.ack		= s5pv310_irq_eint_ack,
-	.set_type	= s5pv310_irq_eint_set_type,
+	.irq_mask	= s5pv310_irq_eint_mask,
+	.irq_unmask	= s5pv310_irq_eint_unmask,
+	.irq_mask_ack	= s5pv310_irq_eint_maskack,
+	.irq_ack	= s5pv310_irq_eint_ack,
+	.irq_set_type	= s5pv310_irq_eint_set_type,
 #ifdef CONFIG_PM
-	.set_wake	= s3c_irqext_wake,
+	.irq_set_wake	= s3c_irqext_wake,
 #endif
 };
 
@@ -192,14 +193,14 @@ static void s5pv310_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 	u32 *irq_data = get_irq_data(irq);
 	struct irq_chip *chip = get_irq_chip(irq);
 
-	chip->mask(irq);
+	chip->irq_mask(&desc->irq_data);
 
-	if (chip->ack)
-		chip->ack(irq);
+	if (chip->irq_ack)
+		chip->irq_ack(&desc->irq_data);
 
 	generic_handle_irq(*irq_data);
 
-	chip->unmask(irq);
+	chip->irq_unmask(&desc->irq_data);
 }
 
 int __init s5pv310_init_irq_eint(void)
diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-s3c24xx/include/plat/irq.h
index 69e1be8..15fdd71 100644
--- a/arch/arm/plat-s3c24xx/include/plat/irq.h
+++ b/arch/arm/plat-s3c24xx/include/plat/irq.h
@@ -107,9 +107,9 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
 /* exported for use in arch/arm/mach-s3c2410 */
 
 #ifdef CONFIG_PM
-extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
+extern int s3c_irq_wake(struct irq_data *d, unsigned int state);
 #else
 #define s3c_irq_wake NULL
 #endif
 
-extern int s3c_irqext_type(unsigned int irq, unsigned int type);
+extern int s3c_irqext_type(struct irq_data *d, unsigned int type);
diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/plat-s3c24xx/irq-pm.c
index ea8dea3..5dbf56d 100644
--- a/arch/arm/plat-s3c24xx/irq-pm.c
+++ b/arch/arm/plat-s3c24xx/irq-pm.c
@@ -15,11 +15,14 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/sysdev.h>
+#include <linux/irq.h>
 
 #include <plat/cpu.h>
 #include <plat/pm.h>
 #include <plat/irq.h>
 
+#include <asm/irq.h>
+
 /* state for IRQs over sleep */
 
 /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
@@ -30,15 +33,15 @@
 unsigned long s3c_irqwake_intallow	= 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;
 unsigned long s3c_irqwake_eintallow	= 0x0000fff0L;
 
-int s3c_irq_wake(unsigned int irqno, unsigned int state)
+int s3c_irq_wake(struct irq_data *d, unsigned int state)
 {
-	unsigned long irqbit = 1 << (irqno - IRQ_EINT0);
+	unsigned long irqbit = 1 << (d->irq - IRQ_EINT0);
 
 	if (!(s3c_irqwake_intallow & irqbit))
 		return -ENOENT;
 
 	printk(KERN_INFO "wake %s for irq %d\n",
-	       state ? "enabled" : "disabled", irqno);
+	       state ? "enabled" : "disabled", d->irq);
 
 	if (!state)
 		s3c_irqwake_intmask |= irqbit;
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index ad0d44e..bacd817 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -34,30 +34,29 @@
 #include <plat/irq.h>
 
 static void
-s3c_irq_mask(unsigned int irqno)
+s3c_irq_mask(struct irq_data *d)
 {
+	unsigned int irqno = d->irq - IRQ_EINT0;
 	unsigned long mask;
 
-	irqno -= IRQ_EINT0;
-
 	mask = __raw_readl(S3C2410_INTMSK);
 	mask |= 1UL << irqno;
 	__raw_writel(mask, S3C2410_INTMSK);
 }
 
 static inline void
-s3c_irq_ack(unsigned int irqno)
+s3c_irq_ack(struct irq_data *d)
 {
-	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
 
 	__raw_writel(bitval, S3C2410_SRCPND);
 	__raw_writel(bitval, S3C2410_INTPND);
 }
 
 static inline void
-s3c_irq_maskack(unsigned int irqno)
+s3c_irq_maskack(struct irq_data *d)
 {
-	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
 	unsigned long mask;
 
 	mask = __raw_readl(S3C2410_INTMSK);
@@ -69,8 +68,9 @@ s3c_irq_maskack(unsigned int irqno)
 
 
 static void
-s3c_irq_unmask(unsigned int irqno)
+s3c_irq_unmask(struct irq_data *d)
 {
+	unsigned int irqno = d->irq;
 	unsigned long mask;
 
 	if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23)
@@ -85,40 +85,39 @@ s3c_irq_unmask(unsigned int irqno)
 
 struct irq_chip s3c_irq_level_chip = {
 	.name		= "s3c-level",
-	.ack		= s3c_irq_maskack,
-	.mask		= s3c_irq_mask,
-	.unmask		= s3c_irq_unmask,
-	.set_wake	= s3c_irq_wake
+	.irq_ack	= s3c_irq_maskack,
+	.irq_mask	= s3c_irq_mask,
+	.irq_unmask	= s3c_irq_unmask,
+	.irq_set_wake	= s3c_irq_wake
 };
 
 struct irq_chip s3c_irq_chip = {
 	.name		= "s3c",
-	.ack		= s3c_irq_ack,
-	.mask		= s3c_irq_mask,
-	.unmask		= s3c_irq_unmask,
-	.set_wake	= s3c_irq_wake
+	.irq_ack	= s3c_irq_ack,
+	.irq_mask	= s3c_irq_mask,
+	.irq_unmask	= s3c_irq_unmask,
+	.irq_set_wake	= s3c_irq_wake
 };
 
 static void
-s3c_irqext_mask(unsigned int irqno)
+s3c_irqext_mask(struct irq_data *d)
 {
+	unsigned int irqno = d->irq - EXTINT_OFF;
 	unsigned long mask;
 
-	irqno -= EXTINT_OFF;
-
 	mask = __raw_readl(S3C24XX_EINTMASK);
 	mask |= ( 1UL << irqno);
 	__raw_writel(mask, S3C24XX_EINTMASK);
 }
 
 static void
-s3c_irqext_ack(unsigned int irqno)
+s3c_irqext_ack(struct irq_data *d)
 {
 	unsigned long req;
 	unsigned long bit;
 	unsigned long mask;
 
-	bit = 1UL << (irqno - EXTINT_OFF);
+	bit = 1UL << (d->irq - EXTINT_OFF);
 
 	mask = __raw_readl(S3C24XX_EINTMASK);
 
@@ -129,62 +128,61 @@ s3c_irqext_ack(unsigned int irqno)
 
 	/* not sure if we should be acking the parent irq... */
 
-	if (irqno <= IRQ_EINT7 ) {
+	if (d->irq <= IRQ_EINT7 ) {
 		if ((req & 0xf0) == 0)
-			s3c_irq_ack(IRQ_EINT4t7);
+			s3c_irq_ack(irq_get_irq_data(IRQ_EINT4t7));
 	} else {
 		if ((req >> 8) == 0)
-			s3c_irq_ack(IRQ_EINT8t23);
+			s3c_irq_ack(irq_get_irq_data(IRQ_EINT8t23));
 	}
 }
 
 static void
-s3c_irqext_unmask(unsigned int irqno)
+s3c_irqext_unmask(struct irq_data *d)
 {
+	unsigned int irqno = d->irq - EXTINT_OFF;
 	unsigned long mask;
 
-	irqno -= EXTINT_OFF;
-
 	mask = __raw_readl(S3C24XX_EINTMASK);
 	mask &= ~( 1UL << irqno);
 	__raw_writel(mask, S3C24XX_EINTMASK);
 }
 
 int
-s3c_irqext_type(unsigned int irq, unsigned int type)
+s3c_irqext_type(struct irq_data *d, unsigned int type)
 {
 	void __iomem *extint_reg;
 	void __iomem *gpcon_reg;
 	unsigned long gpcon_offset, extint_offset;
 	unsigned long newvalue = 0, value;
 
-	if ((irq >= IRQ_EINT0) && (irq <= IRQ_EINT3))
+	if ((d->irq >= IRQ_EINT0) && (d->irq <= IRQ_EINT3))
 	{
 		gpcon_reg = S3C2410_GPFCON;
 		extint_reg = S3C24XX_EXTINT0;
-		gpcon_offset = (irq - IRQ_EINT0) * 2;
-		extint_offset = (irq - IRQ_EINT0) * 4;
+		gpcon_offset = (d->irq - IRQ_EINT0) * 2;
+		extint_offset = (d->irq - IRQ_EINT0) * 4;
 	}
-	else if ((irq >= IRQ_EINT4) && (irq <= IRQ_EINT7))
+	else if ((d->irq >= IRQ_EINT4) && (d->irq <= IRQ_EINT7))
 	{
 		gpcon_reg = S3C2410_GPFCON;
 		extint_reg = S3C24XX_EXTINT0;
-		gpcon_offset = (irq - (EXTINT_OFF)) * 2;
-		extint_offset = (irq - (EXTINT_OFF)) * 4;
+		gpcon_offset = (d->irq - (EXTINT_OFF)) * 2;
+		extint_offset = (d->irq - (EXTINT_OFF)) * 4;
 	}
-	else if ((irq >= IRQ_EINT8) && (irq <= IRQ_EINT15))
+	else if ((d->irq >= IRQ_EINT8) && (d->irq <= IRQ_EINT15))
 	{
 		gpcon_reg = S3C2410_GPGCON;
 		extint_reg = S3C24XX_EXTINT1;
-		gpcon_offset = (irq - IRQ_EINT8) * 2;
-		extint_offset = (irq - IRQ_EINT8) * 4;
+		gpcon_offset = (d->irq - IRQ_EINT8) * 2;
+		extint_offset = (d->irq - IRQ_EINT8) * 4;
 	}
-	else if ((irq >= IRQ_EINT16) && (irq <= IRQ_EINT23))
+	else if ((d->irq >= IRQ_EINT16) && (d->irq <= IRQ_EINT23))
 	{
 		gpcon_reg = S3C2410_GPGCON;
 		extint_reg = S3C24XX_EXTINT2;
-		gpcon_offset = (irq - IRQ_EINT8) * 2;
-		extint_offset = (irq - IRQ_EINT16) * 4;
+		gpcon_offset = (d->irq - IRQ_EINT8) * 2;
+		extint_offset = (d->irq - IRQ_EINT16) * 4;
 	} else
 		return -1;
 
@@ -234,20 +232,20 @@ s3c_irqext_type(unsigned int irq, unsigned int type)
 
 static struct irq_chip s3c_irqext_chip = {
 	.name		= "s3c-ext",
-	.mask		= s3c_irqext_mask,
-	.unmask		= s3c_irqext_unmask,
-	.ack		= s3c_irqext_ack,
-	.set_type	= s3c_irqext_type,
-	.set_wake	= s3c_irqext_wake
+	.irq_mask	= s3c_irqext_mask,
+	.irq_unmask	= s3c_irqext_unmask,
+	.irq_ack	= s3c_irqext_ack,
+	.irq_set_type	= s3c_irqext_type,
+	.irq_set_wake	= s3c_irqext_wake
 };
 
 static struct irq_chip s3c_irq_eint0t4 = {
 	.name		= "s3c-ext0",
-	.ack		= s3c_irq_ack,
-	.mask		= s3c_irq_mask,
-	.unmask		= s3c_irq_unmask,
-	.set_wake	= s3c_irq_wake,
-	.set_type	= s3c_irqext_type,
+	.irq_ack	= s3c_irq_ack,
+	.irq_mask	= s3c_irq_mask,
+	.irq_unmask	= s3c_irq_unmask,
+	.irq_set_wake	= s3c_irq_wake,
+	.irq_set_type	= s3c_irqext_type,
 };
 
 /* mask values for the parent registers for each of the interrupt types */
@@ -261,109 +259,109 @@ static struct irq_chip s3c_irq_eint0t4 = {
 /* UART0 */
 
 static void
-s3c_irq_uart0_mask(unsigned int irqno)
+s3c_irq_uart0_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_UART0, 7);
+	s3c_irqsub_mask(d->irq, INTMSK_UART0, 7);
 }
 
 static void
-s3c_irq_uart0_unmask(unsigned int irqno)
+s3c_irq_uart0_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_UART0);
+	s3c_irqsub_unmask(d->irq, INTMSK_UART0);
 }
 
 static void
-s3c_irq_uart0_ack(unsigned int irqno)
+s3c_irq_uart0_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_UART0, 7);
+	s3c_irqsub_maskack(d->irq, INTMSK_UART0, 7);
 }
 
 static struct irq_chip s3c_irq_uart0 = {
 	.name		= "s3c-uart0",
-	.mask		= s3c_irq_uart0_mask,
-	.unmask		= s3c_irq_uart0_unmask,
-	.ack		= s3c_irq_uart0_ack,
+	.irq_mask	= s3c_irq_uart0_mask,
+	.irq_unmask	= s3c_irq_uart0_unmask,
+	.irq_ack	= s3c_irq_uart0_ack,
 };
 
 /* UART1 */
 
 static void
-s3c_irq_uart1_mask(unsigned int irqno)
+s3c_irq_uart1_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_UART1, 7 << 3);
+	s3c_irqsub_mask(d->irq, INTMSK_UART1, 7 << 3);
 }
 
 static void
-s3c_irq_uart1_unmask(unsigned int irqno)
+s3c_irq_uart1_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_UART1);
+	s3c_irqsub_unmask(d->irq, INTMSK_UART1);
 }
 
 static void
-s3c_irq_uart1_ack(unsigned int irqno)
+s3c_irq_uart1_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_UART1, 7 << 3);
+	s3c_irqsub_maskack(d->irq, INTMSK_UART1, 7 << 3);
 }
 
 static struct irq_chip s3c_irq_uart1 = {
 	.name		= "s3c-uart1",
-	.mask		= s3c_irq_uart1_mask,
-	.unmask		= s3c_irq_uart1_unmask,
-	.ack		= s3c_irq_uart1_ack,
+	.irq_mask	= s3c_irq_uart1_mask,
+	.irq_unmask	= s3c_irq_uart1_unmask,
+	.irq_ack	= s3c_irq_uart1_ack,
 };
 
 /* UART2 */
 
 static void
-s3c_irq_uart2_mask(unsigned int irqno)
+s3c_irq_uart2_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_UART2, 7 << 6);
+	s3c_irqsub_mask(d->irq, INTMSK_UART2, 7 << 6);
 }
 
 static void
-s3c_irq_uart2_unmask(unsigned int irqno)
+s3c_irq_uart2_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_UART2);
+	s3c_irqsub_unmask(d->irq, INTMSK_UART2);
 }
 
 static void
-s3c_irq_uart2_ack(unsigned int irqno)
+s3c_irq_uart2_ack(struct irq_data *d)
 {
-	s3c_irqsub_maskack(irqno, INTMSK_UART2, 7 << 6);
+	s3c_irqsub_maskack(d->irq, INTMSK_UART2, 7 << 6);
 }
 
 static struct irq_chip s3c_irq_uart2 = {
 	.name		= "s3c-uart2",
-	.mask		= s3c_irq_uart2_mask,
-	.unmask		= s3c_irq_uart2_unmask,
-	.ack		= s3c_irq_uart2_ack,
+	.irq_mask	= s3c_irq_uart2_mask,
+	.irq_unmask	= s3c_irq_uart2_unmask,
+	.irq_ack	= s3c_irq_uart2_ack,
 };
 
 /* ADC and Touchscreen */
 
 static void
-s3c_irq_adc_mask(unsigned int irqno)
+s3c_irq_adc_mask(struct irq_data *d)
 {
-	s3c_irqsub_mask(irqno, INTMSK_ADCPARENT, 3 << 9);
+	s3c_irqsub_mask(d->irq, INTMSK_ADCPARENT, 3 << 9);
 }
 
 static void
-s3c_irq_adc_unmask(unsigned int irqno)
+s3c_irq_adc_unmask(struct irq_data *d)
 {
-	s3c_irqsub_unmask(irqno, INTMSK_ADCPARENT);
+	s3c_irqsub_unmask(d->irq, INTMSK_ADCPARENT);
 }
 
 static void
-s3c_irq_adc_ack(unsigned int irqno)
+s3c_irq_adc_ack(struct irq_data *d)
 {
-	s3c_irqsub_ack(irqno, INTMSK_ADCPARENT, 3 << 9);
+	s3c_irqsub_ack(d->irq, INTMSK_ADCPARENT, 3 << 9);
 }
 
 static struct irq_chip s3c_irq_adc = {
 	.name		= "s3c-adc",
-	.mask		= s3c_irq_adc_mask,
-	.unmask		= s3c_irq_adc_unmask,
-	.ack		= s3c_irq_adc_ack,
+	.irq_mask	= s3c_irq_adc_mask,
+	.irq_unmask	= s3c_irq_adc_unmask,
+	.irq_ack	= s3c_irq_adc_ack,
 };
 
 /* irq demux for adc */
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
index 752f1a6..088655a 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -28,39 +28,39 @@
 #include <plat/gpio-cfg.h>
 #include <mach/regs-gpio.h>
 
-static inline void s5p_irq_eint_mask(unsigned int irq)
+static inline void s5p_irq_eint_mask(struct irq_data *d)
 {
 	u32 mask;
 
-	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
-	mask |= eint_irq_to_bit(irq);
-	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
+	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
+	mask |= eint_irq_to_bit(d->irq);
+	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
 }
 
-static void s5p_irq_eint_unmask(unsigned int irq)
+static void s5p_irq_eint_unmask(struct irq_data *d)
 {
 	u32 mask;
 
-	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
-	mask &= ~(eint_irq_to_bit(irq));
-	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
+	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
+	mask &= ~(eint_irq_to_bit(d->irq));
+	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
 }
 
-static inline void s5p_irq_eint_ack(unsigned int irq)
+static inline void s5p_irq_eint_ack(struct irq_data *d)
 {
-	__raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq)));
+	__raw_writel(eint_irq_to_bit(d->irq), S5P_EINT_PEND(EINT_REG_NR(d->irq)));
 }
 
-static void s5p_irq_eint_maskack(unsigned int irq)
+static void s5p_irq_eint_maskack(struct irq_data *d)
 {
 	/* compiler should in-line these */
-	s5p_irq_eint_mask(irq);
-	s5p_irq_eint_ack(irq);
+	s5p_irq_eint_mask(d);
+	s5p_irq_eint_ack(d);
 }
 
-static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)
+static int s5p_irq_eint_set_type(struct irq_data *d, unsigned int type)
 {
-	int offs = EINT_OFFSET(irq);
+	int offs = EINT_OFFSET(d->irq);
 	int shift;
 	u32 ctrl, mask;
 	u32 newvalue = 0;
@@ -94,10 +94,10 @@ static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)
 	shift = (offs & 0x7) * 4;
 	mask = 0x7 << shift;
 
-	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq)));
+	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(d->irq)));
 	ctrl &= ~mask;
 	ctrl |= newvalue << shift;
-	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq)));
+	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(d->irq)));
 
 	if ((0 <= offs) && (offs < 8))
 		s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
@@ -119,13 +119,13 @@ static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)
 
 static struct irq_chip s5p_irq_eint = {
 	.name		= "s5p-eint",
-	.mask		= s5p_irq_eint_mask,
-	.unmask		= s5p_irq_eint_unmask,
-	.mask_ack	= s5p_irq_eint_maskack,
-	.ack		= s5p_irq_eint_ack,
-	.set_type	= s5p_irq_eint_set_type,
+	.irq_mask	= s5p_irq_eint_mask,
+	.irq_unmask	= s5p_irq_eint_unmask,
+	.irq_mask_ack	= s5p_irq_eint_maskack,
+	.irq_ack	= s5p_irq_eint_ack,
+	.irq_set_type	= s5p_irq_eint_set_type,
 #ifdef CONFIG_PM
-	.set_wake	= s3c_irqext_wake,
+	.irq_set_wake	= s3c_irqext_wake,
 #endif
 };
 
@@ -159,42 +159,42 @@ static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 	s5p_irq_demux_eint(IRQ_EINT(24));
 }
 
-static inline void s5p_irq_vic_eint_mask(unsigned int irq)
+static inline void s5p_irq_vic_eint_mask(struct irq_data *d)
 {
-	void __iomem *base = get_irq_chip_data(irq);
+	void __iomem *base = irq_data_get_irq_chip_data(d);
 
-	s5p_irq_eint_mask(irq);
-	writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE_CLEAR);
+	s5p_irq_eint_mask(d);
+	writel(1 << EINT_OFFSET(d->irq), base + VIC_INT_ENABLE_CLEAR);
 }
 
-static void s5p_irq_vic_eint_unmask(unsigned int irq)
+static void s5p_irq_vic_eint_unmask(struct irq_data *d)
 {
-	void __iomem *base = get_irq_chip_data(irq);
+	void __iomem *base = irq_data_get_irq_chip_data(d);
 
-	s5p_irq_eint_unmask(irq);
-	writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE);
+	s5p_irq_eint_unmask(d);
+	writel(1 << EINT_OFFSET(d->irq), base + VIC_INT_ENABLE);
 }
 
-static inline void s5p_irq_vic_eint_ack(unsigned int irq)
+static inline void s5p_irq_vic_eint_ack(struct irq_data *d)
 {
-	__raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq)));
+	__raw_writel(eint_irq_to_bit(d->irq), S5P_EINT_PEND(EINT_REG_NR(d->irq)));
 }
 
-static void s5p_irq_vic_eint_maskack(unsigned int irq)
+static void s5p_irq_vic_eint_maskack(struct irq_data *d)
 {
-	s5p_irq_vic_eint_mask(irq);
-	s5p_irq_vic_eint_ack(irq);
+	s5p_irq_vic_eint_mask(d);
+	s5p_irq_vic_eint_ack(d);
 }
 
 static struct irq_chip s5p_irq_vic_eint = {
 	.name		= "s5p_vic_eint",
-	.mask		= s5p_irq_vic_eint_mask,
-	.unmask		= s5p_irq_vic_eint_unmask,
-	.mask_ack	= s5p_irq_vic_eint_maskack,
-	.ack		= s5p_irq_vic_eint_ack,
-	.set_type	= s5p_irq_eint_set_type,
+	.irq_mask	= s5p_irq_vic_eint_mask,
+	.irq_unmask	= s5p_irq_vic_eint_unmask,
+	.irq_mask_ack	= s5p_irq_vic_eint_maskack,
+	.irq_ack	= s5p_irq_vic_eint_ack,
+	.irq_set_type	= s5p_irq_eint_set_type,
 #ifdef CONFIG_PM
-	.set_wake	= s3c_irqext_wake,
+	.irq_set_wake	= s3c_irqext_wake,
 #endif
 };
 
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index 0e5dc8c..6b96d32 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -30,9 +30,9 @@
 
 static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR];
 
-static int s5p_gpioint_get_group(unsigned int irq)
+static int s5p_gpioint_get_group(struct irq_data *d)
 {
-	struct gpio_chip *chip = get_irq_data(irq);
+	struct gpio_chip *chip = irq_data_get_irq_data(d);
 	struct s3c_gpio_chip *s3c_chip = container_of(chip,
 			struct s3c_gpio_chip, chip);
 	int group;
@@ -44,22 +44,22 @@ static int s5p_gpioint_get_group(unsigned int irq)
 	return group;
 }
 
-static int s5p_gpioint_get_offset(unsigned int irq)
+static int s5p_gpioint_get_offset(struct irq_data *d)
 {
-	struct gpio_chip *chip = get_irq_data(irq);
+	struct gpio_chip *chip = irq_data_get_irq_data(d);
 	struct s3c_gpio_chip *s3c_chip = container_of(chip,
 			struct s3c_gpio_chip, chip);
 
-	return irq - s3c_chip->irq_base;
+	return d->irq - s3c_chip->irq_base;
 }
 
-static void s5p_gpioint_ack(unsigned int irq)
+static void s5p_gpioint_ack(struct irq_data *d)
 {
 	int group, offset, pend_offset;
 	unsigned int value;
 
-	group = s5p_gpioint_get_group(irq);
-	offset = s5p_gpioint_get_offset(irq);
+	group = s5p_gpioint_get_group(d);
+	offset = s5p_gpioint_get_offset(d);
 	pend_offset = group << 2;
 
 	value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
@@ -67,13 +67,13 @@ static void s5p_gpioint_ack(unsigned int irq)
 	__raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
 }
 
-static void s5p_gpioint_mask(unsigned int irq)
+static void s5p_gpioint_mask(struct irq_data *d)
 {
 	int group, offset, mask_offset;
 	unsigned int value;
 
-	group = s5p_gpioint_get_group(irq);
-	offset = s5p_gpioint_get_offset(irq);
+	group = s5p_gpioint_get_group(d);
+	offset = s5p_gpioint_get_offset(d);
 	mask_offset = group << 2;
 
 	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
@@ -81,13 +81,13 @@ static void s5p_gpioint_mask(unsigned int irq)
 	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
 }
 
-static void s5p_gpioint_unmask(unsigned int irq)
+static void s5p_gpioint_unmask(struct irq_data *d)
 {
 	int group, offset, mask_offset;
 	unsigned int value;
 
-	group = s5p_gpioint_get_group(irq);
-	offset = s5p_gpioint_get_offset(irq);
+	group = s5p_gpioint_get_group(d);
+	offset = s5p_gpioint_get_offset(d);
 	mask_offset = group << 2;
 
 	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
@@ -95,19 +95,19 @@ static void s5p_gpioint_unmask(unsigned int irq)
 	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
 }
 
-static void s5p_gpioint_mask_ack(unsigned int irq)
+static void s5p_gpioint_mask_ack(struct irq_data *d)
 {
-	s5p_gpioint_mask(irq);
-	s5p_gpioint_ack(irq);
+	s5p_gpioint_mask(d);
+	s5p_gpioint_ack(d);
 }
 
-static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
+static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type)
 {
 	int group, offset, con_offset;
 	unsigned int value;
 
-	group = s5p_gpioint_get_group(irq);
-	offset = s5p_gpioint_get_offset(irq);
+	group = s5p_gpioint_get_group(d);
+	offset = s5p_gpioint_get_offset(d);
 	con_offset = group << 2;
 
 	switch (type) {
@@ -142,11 +142,11 @@ static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
 
 struct irq_chip s5p_gpioint = {
 	.name		= "s5p_gpioint",
-	.ack		= s5p_gpioint_ack,
-	.mask		= s5p_gpioint_mask,
-	.mask_ack	= s5p_gpioint_mask_ack,
-	.unmask		= s5p_gpioint_unmask,
-	.set_type	= s5p_gpioint_set_type,
+	.irq_ack	= s5p_gpioint_ack,
+	.irq_mask	= s5p_gpioint_mask,
+	.irq_mask_ack	= s5p_gpioint_mask_ack,
+	.irq_unmask	= s5p_gpioint_unmask,
+	.irq_set_type	= s5p_gpioint_set_type,
 };
 
 static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c
index dc33b9e..7918261 100644
--- a/arch/arm/plat-s5p/irq-pm.c
+++ b/arch/arm/plat-s5p/irq-pm.c
@@ -37,14 +37,14 @@
 unsigned long s3c_irqwake_intallow	= 0x00000006L;
 unsigned long s3c_irqwake_eintallow	= 0xffffffffL;
 
-int s3c_irq_wake(unsigned int irqno, unsigned int state)
+int s3c_irq_wake(struct irq_data *d, unsigned int state)
 {
 	unsigned long irqbit;
 
-	switch (irqno) {
+	switch (d->irq) {
 	case IRQ_RTC_TIC:
 	case IRQ_RTC_ALARM:
-		irqbit = 1 << (irqno + 1 - IRQ_RTC_ALARM);
+		irqbit = 1 << (d->irq + 1 - IRQ_RTC_ALARM);
 		if (!state)
 			s3c_irqwake_intmask |= irqbit;
 		else
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 245836d..0f212c2 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -15,6 +15,8 @@
  * management
 */
 
+struct irq_data;
+
 #ifdef CONFIG_PM
 
 extern __init int s3c_pm_init(void);
@@ -100,7 +102,7 @@ extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
 extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
 
 #ifdef CONFIG_PM
-extern int s3c_irqext_wake(unsigned int irqno, unsigned int state);
+extern int s3c_irqext_wake(struct irq_data *d, unsigned int state);
 extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
 extern int s3c24xx_irq_resume(struct sys_device *dev);
 #else
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
index 4f8c102..92a25d6 100644
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -28,21 +28,21 @@
  * are consecutive when looking up the interrupt in the demux routines.
  */
 
-static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
+static inline void __iomem *s3c_irq_uart_base(struct irq_data *d)
 {
-	struct s3c_uart_irq *uirq = get_irq_chip_data(irq);
+	struct s3c_uart_irq *uirq = irq_data_get_irq_chip_data(d);
 	return uirq->regs;
 }
 
-static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
+static inline unsigned int s3c_irq_uart_bit(struct irq_data *d)
 {
-	return irq & 3;
+	return d->irq & 3;
 }
 
-static void s3c_irq_uart_mask(unsigned int irq)
+static void s3c_irq_uart_mask(struct irq_data *d)
 {
-	void __iomem *regs = s3c_irq_uart_base(irq);
-	unsigned int bit = s3c_irq_uart_bit(irq);
+	void __iomem *regs = s3c_irq_uart_base(d);
+	unsigned int bit = s3c_irq_uart_bit(d);
 	u32 reg;
 
 	reg = __raw_readl(regs + S3C64XX_UINTM);
@@ -50,10 +50,10 @@ static void s3c_irq_uart_mask(unsigned int irq)
 	__raw_writel(reg, regs + S3C64XX_UINTM);
 }
 
-static void s3c_irq_uart_maskack(unsigned int irq)
+static void s3c_irq_uart_maskack(struct irq_data *d)
 {
-	void __iomem *regs = s3c_irq_uart_base(irq);
-	unsigned int bit = s3c_irq_uart_bit(irq);
+	void __iomem *regs = s3c_irq_uart_base(d);
+	unsigned int bit = s3c_irq_uart_bit(d);
 	u32 reg;
 
 	reg = __raw_readl(regs + S3C64XX_UINTM);
@@ -62,10 +62,10 @@ static void s3c_irq_uart_maskack(unsigned int irq)
 	__raw_writel(1 << bit, regs + S3C64XX_UINTP);
 }
 
-static void s3c_irq_uart_unmask(unsigned int irq)
+static void s3c_irq_uart_unmask(struct irq_data *d)
 {
-	void __iomem *regs = s3c_irq_uart_base(irq);
-	unsigned int bit = s3c_irq_uart_bit(irq);
+	void __iomem *regs = s3c_irq_uart_base(d);
+	unsigned int bit = s3c_irq_uart_bit(d);
 	u32 reg;
 
 	reg = __raw_readl(regs + S3C64XX_UINTM);
@@ -73,17 +73,17 @@ static void s3c_irq_uart_unmask(unsigned int irq)
 	__raw_writel(reg, regs + S3C64XX_UINTM);
 }
 
-static void s3c_irq_uart_ack(unsigned int irq)
+static void s3c_irq_uart_ack(struct irq_data *d)
 {
-	void __iomem *regs = s3c_irq_uart_base(irq);
-	unsigned int bit = s3c_irq_uart_bit(irq);
+	void __iomem *regs = s3c_irq_uart_base(d);
+	unsigned int bit = s3c_irq_uart_bit(d);
 
 	__raw_writel(1 << bit, regs + S3C64XX_UINTP);
 }
 
 static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
 {
-	struct s3c_uart_irq *uirq = desc->handler_data;
+	struct s3c_uart_irq *uirq = desc->irq_data.handler_data;
 	u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
 	int base = uirq->base_irq;
 
@@ -99,10 +99,10 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
 
 static struct irq_chip s3c_irq_uart = {
 	.name		= "s3c-uart",
-	.mask		= s3c_irq_uart_mask,
-	.unmask		= s3c_irq_uart_unmask,
-	.mask_ack	= s3c_irq_uart_maskack,
-	.ack		= s3c_irq_uart_ack,
+	.irq_mask	= s3c_irq_uart_mask,
+	.irq_unmask	= s3c_irq_uart_unmask,
+	.irq_mask_ack	= s3c_irq_uart_maskack,
+	.irq_ack	= s3c_irq_uart_ack,
 };
 
 static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
@@ -124,7 +124,7 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
 		set_irq_flags(irq, IRQF_VALID);
 	}
 
-	desc->handler_data = uirq;
+	desc->irq_data.handler_data = uirq;
 	set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
 }
 
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index 0270519..6ee39e0 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -24,43 +24,43 @@
 
 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
 {
-	generic_handle_irq((int)desc->handler_data);
+	generic_handle_irq((int)desc->irq_data.handler_data);
 }
 
 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
 
-static void s3c_irq_timer_mask(unsigned int irq)
+static void s3c_irq_timer_mask(struct irq_data *d)
 {
 	u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
 
 	reg &= 0x1f;  /* mask out pending interrupts */
-	reg &= ~(1 << (irq - IRQ_TIMER0));
+	reg &= ~(1 << (d->irq - IRQ_TIMER0));
 	__raw_writel(reg, S3C64XX_TINT_CSTAT);
 }
 
-static void s3c_irq_timer_unmask(unsigned int irq)
+static void s3c_irq_timer_unmask(struct irq_data *d)
 {
 	u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
 
 	reg &= 0x1f;  /* mask out pending interrupts */
-	reg |= 1 << (irq - IRQ_TIMER0);
+	reg |= 1 << (d->irq - IRQ_TIMER0);
 	__raw_writel(reg, S3C64XX_TINT_CSTAT);
 }
 
-static void s3c_irq_timer_ack(unsigned int irq)
+static void s3c_irq_timer_ack(struct irq_data *d)
 {
 	u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
 
 	reg &= 0x1f;
-	reg |= (1 << 5) << (irq - IRQ_TIMER0);
+	reg |= (1 << 5) << (d->irq - IRQ_TIMER0);
 	__raw_writel(reg, S3C64XX_TINT_CSTAT);
 }
 
 static struct irq_chip s3c_irq_timer = {
 	.name		= "s3c-timer",
-	.mask		= s3c_irq_timer_mask,
-	.unmask		= s3c_irq_timer_unmask,
-	.ack		= s3c_irq_timer_ack,
+	.irq_mask	= s3c_irq_timer_mask,
+	.irq_unmask	= s3c_irq_timer_unmask,
+	.irq_ack	= s3c_irq_timer_ack,
 };
 
 /**
@@ -82,5 +82,5 @@ void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
 	set_irq_handler(timer_irq, handle_level_irq);
 	set_irq_flags(timer_irq, IRQF_VALID);
 
-	desc->handler_data = (void *)timer_irq;
+	desc->irq_data.handler_data = (void *)timer_irq;
 }
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 27cfca5..510a9c6 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -18,6 +18,7 @@
 #include <linux/delay.h>
 #include <linux/serial_core.h>
 #include <linux/io.h>
+#include <linux/irq.h>
 
 #include <asm/cacheflush.h>
 #include <mach/hardware.h>
@@ -136,15 +137,15 @@ static void s3c_pm_restore_uarts(void) { }
 unsigned long s3c_irqwake_intmask	= 0xffffffffL;
 unsigned long s3c_irqwake_eintmask	= 0xffffffffL;
 
-int s3c_irqext_wake(unsigned int irqno, unsigned int state)
+int s3c_irqext_wake(struct irq_data *d, unsigned int state)
 {
-	unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
+	unsigned long bit = 1L << IRQ_EINT_BIT(d->irq);
 
 	if (!(s3c_irqwake_eintallow & bit))
 		return -ENOENT;
 
 	printk(KERN_INFO "wake %s for irq %d\n",
-	       state ? "enabled" : "disabled", irqno);
+	       state ? "enabled" : "disabled", d->irq);
 
 	if (!state)
 		s3c_irqwake_eintmask |= bit;
-- 
1.7.1

[PATCH 41/54] ARM: sa1100: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-sa1100/irq.c      |   84 +++++++++++++++++++-------------------
 arch/arm/mach-sa1100/neponset.c |    8 ++--
 2 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 3093d46..3d85dfa 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -37,14 +37,14 @@ static int GPIO_IRQ_mask = (1 << 11) - 1;
 #define GPIO_11_27_IRQ(i)	((i) - 21)
 #define GPIO11_27_MASK(irq)	(1 << GPIO_11_27_IRQ(irq))
 
-static int sa1100_gpio_type(unsigned int irq, unsigned int type)
+static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
 {
 	unsigned int mask;
 
-	if (irq <= 10)
-		mask = 1 << irq;
+	if (d->irq <= 10)
+		mask = 1 << d->irq;
 	else
-		mask = GPIO11_27_MASK(irq);
+		mask = GPIO11_27_MASK(d->irq);
 
 	if (type == IRQ_TYPE_PROBE) {
 		if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
@@ -70,37 +70,37 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type)
 /*
  * GPIO IRQs must be acknowledged.  This is for IRQs from 0 to 10.
  */
-static void sa1100_low_gpio_ack(unsigned int irq)
+static void sa1100_low_gpio_ack(struct irq_data *d)
 {
-	GEDR = (1 << irq);
+	GEDR = (1 << d->irq);
 }
 
-static void sa1100_low_gpio_mask(unsigned int irq)
+static void sa1100_low_gpio_mask(struct irq_data *d)
 {
-	ICMR &= ~(1 << irq);
+	ICMR &= ~(1 << d->irq);
 }
 
-static void sa1100_low_gpio_unmask(unsigned int irq)
+static void sa1100_low_gpio_unmask(struct irq_data *d)
 {
-	ICMR |= 1 << irq;
+	ICMR |= 1 << d->irq;
 }
 
-static int sa1100_low_gpio_wake(unsigned int irq, unsigned int on)
+static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on)
 {
 	if (on)
-		PWER |= 1 << irq;
+		PWER |= 1 << d->irq;
 	else
-		PWER &= ~(1 << irq);
+		PWER &= ~(1 << d->irq);
 	return 0;
 }
 
 static struct irq_chip sa1100_low_gpio_chip = {
 	.name		= "GPIO-l",
-	.ack		= sa1100_low_gpio_ack,
-	.mask		= sa1100_low_gpio_mask,
-	.unmask		= sa1100_low_gpio_unmask,
-	.set_type	= sa1100_gpio_type,
-	.set_wake	= sa1100_low_gpio_wake,
+	.irq_ack	= sa1100_low_gpio_ack,
+	.irq_mask	= sa1100_low_gpio_mask,
+	.irq_unmask	= sa1100_low_gpio_unmask,
+	.irq_set_type	= sa1100_gpio_type,
+	.irq_set_wake	= sa1100_low_gpio_wake,
 };
 
 /*
@@ -139,16 +139,16 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
  * In addition, the IRQs are all collected up into one bit in the
  * interrupt controller registers.
  */
-static void sa1100_high_gpio_ack(unsigned int irq)
+static void sa1100_high_gpio_ack(struct irq_data *d)
 {
-	unsigned int mask = GPIO11_27_MASK(irq);
+	unsigned int mask = GPIO11_27_MASK(d->irq);
 
 	GEDR = mask;
 }
 
-static void sa1100_high_gpio_mask(unsigned int irq)
+static void sa1100_high_gpio_mask(struct irq_data *d)
 {
-	unsigned int mask = GPIO11_27_MASK(irq);
+	unsigned int mask = GPIO11_27_MASK(d->irq);
 
 	GPIO_IRQ_mask &= ~mask;
 
@@ -156,9 +156,9 @@ static void sa1100_high_gpio_mask(unsigned int irq)
 	GFER &= ~mask;
 }
 
-static void sa1100_high_gpio_unmask(unsigned int irq)
+static void sa1100_high_gpio_unmask(struct irq_data *d)
 {
-	unsigned int mask = GPIO11_27_MASK(irq);
+	unsigned int mask = GPIO11_27_MASK(d->irq);
 
 	GPIO_IRQ_mask |= mask;
 
@@ -166,44 +166,44 @@ static void sa1100_high_gpio_unmask(unsigned int irq)
 	GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
 }
 
-static int sa1100_high_gpio_wake(unsigned int irq, unsigned int on)
+static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on)
 {
 	if (on)
-		PWER |= GPIO11_27_MASK(irq);
+		PWER |= GPIO11_27_MASK(d->irq);
 	else
-		PWER &= ~GPIO11_27_MASK(irq);
+		PWER &= ~GPIO11_27_MASK(d->irq);
 	return 0;
 }
 
 static struct irq_chip sa1100_high_gpio_chip = {
 	.name		= "GPIO-h",
-	.ack		= sa1100_high_gpio_ack,
-	.mask		= sa1100_high_gpio_mask,
-	.unmask		= sa1100_high_gpio_unmask,
-	.set_type	= sa1100_gpio_type,
-	.set_wake	= sa1100_high_gpio_wake,
+	.irq_ack	= sa1100_high_gpio_ack,
+	.irq_mask	= sa1100_high_gpio_mask,
+	.irq_unmask	= sa1100_high_gpio_unmask,
+	.irq_set_type	= sa1100_gpio_type,
+	.irq_set_wake	= sa1100_high_gpio_wake,
 };
 
 /*
  * We don't need to ACK IRQs on the SA1100 unless they're GPIOs
  * this is for internal IRQs i.e. from 11 to 31.
  */
-static void sa1100_mask_irq(unsigned int irq)
+static void sa1100_mask_irq(struct irq_data *d)
 {
-	ICMR &= ~(1 << irq);
+	ICMR &= ~(1 << d->irq);
 }
 
-static void sa1100_unmask_irq(unsigned int irq)
+static void sa1100_unmask_irq(struct irq_data *d)
 {
-	ICMR |= (1 << irq);
+	ICMR |= (1 << d->irq);
 }
 
 /*
  * Apart form GPIOs, only the RTC alarm can be a wakeup event.
  */
-static int sa1100_set_wake(unsigned int irq, unsigned int on)
+static int sa1100_set_wake(struct irq_data *d, unsigned int on)
 {
-	if (irq == IRQ_RTCAlrm) {
+	if (d->irq == IRQ_RTCAlrm) {
 		if (on)
 			PWER |= PWER_RTC;
 		else
@@ -215,10 +215,10 @@ static int sa1100_set_wake(unsigned int irq, unsigned int on)
 
 static struct irq_chip sa1100_normal_chip = {
 	.name		= "SC",
-	.ack		= sa1100_mask_irq,
-	.mask		= sa1100_mask_irq,
-	.unmask		= sa1100_unmask_irq,
-	.set_wake	= sa1100_set_wake,
+	.irq_ack	= sa1100_mask_irq,
+	.irq_mask	= sa1100_mask_irq,
+	.irq_unmask	= sa1100_unmask_irq,
+	.irq_set_wake	= sa1100_set_wake,
 };
 
 static struct resource irq_resource = {
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index c601a75..4aad01f 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -35,7 +35,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
 		/*
 		 * Acknowledge the parent IRQ.
 		 */
-		desc->chip->ack(irq);
+		desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 		/*
 		 * Read the interrupt reason register.  Let's have all
@@ -53,7 +53,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
 		 * recheck the register for any pending IRQs.
 		 */
 		if (irr & (IRR_ETHERNET | IRR_USAR)) {
-			desc->chip->mask(irq);
+			desc->irq_data.chip->irq_mask(&desc->irq_data);
 
 			/*
 			 * Ack the interrupt now to prevent re-entering
@@ -61,7 +61,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
 			 * since we'll check the IRR register prior to
 			 * leaving.
 			 */
-			desc->chip->ack(irq);
+			desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 			if (irr & IRR_ETHERNET) {
 				generic_handle_irq(IRQ_NEPONSET_SMC9196);
@@ -71,7 +71,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
 				generic_handle_irq(IRQ_NEPONSET_USAR);
 			}
 
-			desc->chip->unmask(irq);
+			desc->irq_data.chip->irq_unmask(&desc->irq_data);
 		}
 
 		if (irr & IRR_SA1111) {
-- 
1.7.1

[PATCH 42/54] ARM: shark: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-shark/irq.c |   26 +++++++++++++-------------
 1 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c
index c04eb6a..831fc66 100644
--- a/arch/arm/mach-shark/irq.c
+++ b/arch/arm/mach-shark/irq.c
@@ -30,35 +30,35 @@ static unsigned char cached_irq_mask[2] = { 0xfb, 0xff };
  * These have to be protected by the irq controller spinlock
  * before being called.
  */
-static void shark_disable_8259A_irq(unsigned int irq)
+static void shark_disable_8259A_irq(struct irq_data *d)
 {
 	unsigned int mask;
-	if (irq<8) {
-	  mask = 1 << irq;
+	if (d->irq<8) {
+	  mask = 1 << d->irq;
 	  cached_irq_mask[0] |= mask;
 	  outb(cached_irq_mask[1],0xA1);
 	} else {
-	  mask = 1 << (irq-8);
+	  mask = 1 << (d->irq-8);
 	  cached_irq_mask[1] |= mask;
 	  outb(cached_irq_mask[0],0x21);
 	}
 }
 
-static void shark_enable_8259A_irq(unsigned int irq)
+static void shark_enable_8259A_irq(struct irq_data *d)
 {
 	unsigned int mask;
-	if (irq<8) {
-	  mask = ~(1 << irq);
+	if (d->irq<8) {
+	  mask = ~(1 << d->irq);
 	  cached_irq_mask[0] &= mask;
 	  outb(cached_irq_mask[0],0x21);
 	} else {
-	  mask = ~(1 << (irq-8));
+	  mask = ~(1 << (d->irq-8));
 	  cached_irq_mask[1] &= mask;
 	  outb(cached_irq_mask[1],0xA1);
 	}
 }
 
-static void shark_ack_8259A_irq(unsigned int irq){}
+static void shark_ack_8259A_irq(struct irq_data *d){}
 
 static irqreturn_t bogus_int(int irq, void *dev_id)
 {
@@ -69,10 +69,10 @@ static irqreturn_t bogus_int(int irq, void *dev_id)
 static struct irqaction cascade;
 
 static struct irq_chip fb_chip = {
-	.name	= "XT-PIC",
-	.ack	= shark_ack_8259A_irq,
-	.mask	= shark_disable_8259A_irq,
-	.unmask = shark_enable_8259A_irq,
+	.name		= "XT-PIC",
+	.irq_ack	= shark_ack_8259A_irq,
+	.irq_mask	= shark_disable_8259A_irq,
+	.irq_unmask	= shark_enable_8259A_irq,
 };
 
 void __init shark_init_irq(void)
-- 
1.7.1

[PATCH 43/54] ARM: stmp378x: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-stmp378x/stmp378x.c |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-stmp378x/stmp378x.c b/arch/arm/mach-stmp378x/stmp378x.c
index ddd49a7..c2f9fe0 100644
--- a/arch/arm/mach-stmp378x/stmp378x.c
+++ b/arch/arm/mach-stmp378x/stmp378x.c
@@ -47,7 +47,7 @@
 /*
  * IRQ handling
  */
-static void stmp378x_ack_irq(unsigned int irq)
+static void stmp378x_ack_irq(struct irq_data *d)
 {
 	/* Tell ICOLL to release IRQ line */
 	__raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR);
@@ -60,24 +60,24 @@ static void stmp378x_ack_irq(unsigned int irq)
 	(void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT);
 }
 
-static void stmp378x_mask_irq(unsigned int irq)
+static void stmp378x_mask_irq(struct irq_data *d)
 {
 	/* IRQ disable */
 	stmp3xxx_clearl(BM_ICOLL_INTERRUPTn_ENABLE,
-			REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
+			REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + d->irq * 0x10);
 }
 
-static void stmp378x_unmask_irq(unsigned int irq)
+static void stmp378x_unmask_irq(struct irq_data *d)
 {
 	/* IRQ enable */
 	stmp3xxx_setl(BM_ICOLL_INTERRUPTn_ENABLE,
-		      REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
+		      REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + d->irq * 0x10);
 }
 
 static struct irq_chip stmp378x_chip = {
-	.ack	= stmp378x_ack_irq,
-	.mask	= stmp378x_mask_irq,
-	.unmask = stmp378x_unmask_irq,
+	.irq_ack	= stmp378x_ack_irq,
+	.irq_mask	= stmp378x_mask_irq,
+	.irq_unmask	= stmp378x_unmask_irq,
 };
 
 void __init stmp378x_init_irq(void)
-- 
1.7.1

[PATCH 44/54] ARM: stmp37xx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-stmp37xx/stmp37xx.c |   24 ++++++++++++------------
 1 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-stmp37xx/stmp37xx.c b/arch/arm/mach-stmp37xx/stmp37xx.c
index 8c7d6fb..a9aed06 100644
--- a/arch/arm/mach-stmp37xx/stmp37xx.c
+++ b/arch/arm/mach-stmp37xx/stmp37xx.c
@@ -43,11 +43,11 @@
 /*
  * IRQ handling
  */
-static void stmp37xx_ack_irq(unsigned int irq)
+static void stmp37xx_ack_irq(struct irq_data *d)
 {
 	/* Disable IRQ */
-	stmp3xxx_clearl(0x04 << ((irq % 4) * 8),
-		REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10);
+	stmp3xxx_clearl(0x04 << ((d->irq % 4) * 8),
+		REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + d->irq / 4 * 0x10);
 
 	/* ACK current interrupt */
 	__raw_writel(1, REGS_ICOLL_BASE + HW_ICOLL_LEVELACK);
@@ -56,24 +56,24 @@ static void stmp37xx_ack_irq(unsigned int irq)
 	(void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT);
 }
 
-static void stmp37xx_mask_irq(unsigned int irq)
+static void stmp37xx_mask_irq(struct irq_data *d)
 {
 	/* IRQ disable */
-	stmp3xxx_clearl(0x04 << ((irq % 4) * 8),
-		REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10);
+	stmp3xxx_clearl(0x04 << ((d->irq % 4) * 8),
+		REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + d->irq / 4 * 0x10);
 }
 
-static void stmp37xx_unmask_irq(unsigned int irq)
+static void stmp37xx_unmask_irq(struct irq_data *d)
 {
 	/* IRQ enable */
-	stmp3xxx_setl(0x04 << ((irq % 4) * 8),
-		REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10);
+	stmp3xxx_setl(0x04 << ((d->irq % 4) * 8),
+		REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + d->irq / 4 * 0x10);
 }
 
 static struct irq_chip stmp37xx_chip = {
-	.ack	= stmp37xx_ack_irq,
-	.mask	= stmp37xx_mask_irq,
-	.unmask = stmp37xx_unmask_irq,
+	.irq_ack	= stmp37xx_ack_irq,
+	.irq_mask	= stmp37xx_mask_irq,
+	.irq_unmask	= stmp37xx_unmask_irq,
 };
 
 void __init stmp37xx_init_irq(void)
-- 
1.7.1

[PATCH 45/54] ARM: tcc8k: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-tcc8k/irq.c |   56 ++++++++++++++++++++++----------------------
 1 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
index 34575c4..aa9231f 100644
--- a/arch/arm/mach-tcc8k/irq.c
+++ b/arch/arm/mach-tcc8k/irq.c
@@ -18,65 +18,65 @@
 #include "common.h"
 
 /* Disable IRQ */
-static void tcc8000_mask_ack_irq0(unsigned int irq)
+static void tcc8000_mask_ack_irq0(struct irq_data *d)
 {
-	PIC0_IEN &= ~(1 << irq);
-	PIC0_CREQ |=  (1 << irq);
+	PIC0_IEN &= ~(1 << d->irq);
+	PIC0_CREQ |=  (1 << d->irq);
 }
 
-static void tcc8000_mask_ack_irq1(unsigned int irq)
+static void tcc8000_mask_ack_irq1(struct irq_data *d)
 {
-	PIC1_IEN &= ~(1 << (irq - 32));
-	PIC1_CREQ |= (1 << (irq - 32));
+	PIC1_IEN &= ~(1 << (d->irq - 32));
+	PIC1_CREQ |= (1 << (d->irq - 32));
 }
 
-static void tcc8000_mask_irq0(unsigned int irq)
+static void tcc8000_mask_irq0(struct irq_data *d)
 {
-	PIC0_IEN &= ~(1 << irq);
+	PIC0_IEN &= ~(1 << d->irq);
 }
 
-static void tcc8000_mask_irq1(unsigned int irq)
+static void tcc8000_mask_irq1(struct irq_data *d)
 {
-	PIC1_IEN &= ~(1 << (irq - 32));
+	PIC1_IEN &= ~(1 << (d->irq - 32));
 }
 
-static void tcc8000_ack_irq0(unsigned int irq)
+static void tcc8000_ack_irq0(struct irq_data *d)
 {
-	PIC0_CREQ |=  (1 << irq);
+	PIC0_CREQ |=  (1 << d->irq);
 }
 
-static void tcc8000_ack_irq1(unsigned int irq)
+static void tcc8000_ack_irq1(struct irq_data *d)
 {
-	PIC1_CREQ |= (1 << (irq - 32));
+	PIC1_CREQ |= (1 << (d->irq - 32));
 }
 
 /* Enable IRQ */
-static void tcc8000_unmask_irq0(unsigned int irq)
+static void tcc8000_unmask_irq0(struct irq_data *d)
 {
-	PIC0_IEN |= (1 << irq);
-	PIC0_INTOEN |= (1 << irq);
+	PIC0_IEN |= (1 << d->irq);
+	PIC0_INTOEN |= (1 << d->irq);
 }
 
-static void tcc8000_unmask_irq1(unsigned int irq)
+static void tcc8000_unmask_irq1(struct irq_data *d)
 {
-	PIC1_IEN |= (1 << (irq - 32));
-	PIC1_INTOEN |= (1 << (irq - 32));
+	PIC1_IEN |= (1 << (d->irq - 32));
+	PIC1_INTOEN |= (1 << (d->irq - 32));
 }
 
 static struct irq_chip tcc8000_irq_chip0 = {
 	.name		= "tcc_irq0",
-	.mask		= tcc8000_mask_irq0,
-	.ack		= tcc8000_ack_irq0,
-	.mask_ack	= tcc8000_mask_ack_irq0,
-	.unmask		= tcc8000_unmask_irq0,
+	.irq_mask	= tcc8000_mask_irq0,
+	.irq_ack	= tcc8000_ack_irq0,
+	.irq_mask_ack	= tcc8000_mask_ack_irq0,
+	.irq_unmask	= tcc8000_unmask_irq0,
 };
 
 static struct irq_chip tcc8000_irq_chip1 = {
 	.name		= "tcc_irq1",
-	.mask		= tcc8000_mask_irq1,
-	.ack		= tcc8000_ack_irq1,
-	.mask_ack	= tcc8000_mask_ack_irq1,
-	.unmask		= tcc8000_unmask_irq1,
+	.irq_mask	= tcc8000_mask_irq1,
+	.irq_ack	= tcc8000_ack_irq1,
+	.irq_mask_ack	= tcc8000_mask_ack_irq1,
+	.irq_unmask	= tcc8000_unmask_irq1,
 };
 
 void __init tcc8k_init_irq(void)
-- 
1.7.1

[PATCH 46/54] ARM: tegra: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-tegra/gpio.c |   38 +++++++++++++++++++-------------------
 arch/arm/mach-tegra/irq.c  |   36 ++++++++++++++++++------------------
 2 files changed, 37 insertions(+), 37 deletions(-)

diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index 0775265..bd06620 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -142,31 +142,31 @@ static struct gpio_chip tegra_gpio_chip = {
 	.ngpio			= TEGRA_NR_GPIOS,
 };
 
-static void tegra_gpio_irq_ack(unsigned int irq)
+static void tegra_gpio_irq_ack(struct irq_data *d)
 {
-	int gpio = irq - INT_GPIO_BASE;
+	int gpio = d->irq - INT_GPIO_BASE;
 
 	__raw_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio));
 }
 
-static void tegra_gpio_irq_mask(unsigned int irq)
+static void tegra_gpio_irq_mask(struct irq_data *d)
 {
-	int gpio = irq - INT_GPIO_BASE;
+	int gpio = d->irq - INT_GPIO_BASE;
 
 	tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0);
 }
 
-static void tegra_gpio_irq_unmask(unsigned int irq)
+static void tegra_gpio_irq_unmask(struct irq_data *d)
 {
-	int gpio = irq - INT_GPIO_BASE;
+	int gpio = d->irq - INT_GPIO_BASE;
 
 	tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1);
 }
 
-static int tegra_gpio_irq_set_type(unsigned int irq, unsigned int type)
+static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 {
-	int gpio = irq - INT_GPIO_BASE;
-	struct tegra_gpio_bank *bank = get_irq_chip_data(irq);
+	int gpio = d->irq - INT_GPIO_BASE;
+	struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
 	int port = GPIO_PORT(gpio);
 	int lvl_type;
 	int val;
@@ -221,7 +221,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	int pin;
 	int unmasked = 0;
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	bank = get_irq_data(irq);
 
@@ -240,7 +240,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 			 */
 			if (lvl & (0x100 << pin)) {
 				unmasked = 1;
-				desc->chip->unmask(irq);
+				desc->irq_data.chip->irq_unmask(&desc->irq_data);
 			}
 
 			generic_handle_irq(gpio_to_irq(gpio + pin));
@@ -248,7 +248,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	}
 
 	if (!unmasked)
-		desc->chip->unmask(irq);
+		desc->irq_data.chip->irq_unmask(&desc->irq_data);
 
 }
 
@@ -316,21 +316,21 @@ void tegra_gpio_suspend(void)
 	local_irq_restore(flags);
 }
 
-static int tegra_gpio_wake_enable(unsigned int irq, unsigned int enable)
+static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable)
 {
-	struct tegra_gpio_bank *bank = get_irq_chip_data(irq);
+	struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
 	return set_irq_wake(bank->irq, enable);
 }
 #endif
 
 static struct irq_chip tegra_gpio_irq_chip = {
 	.name		= "GPIO",
-	.ack		= tegra_gpio_irq_ack,
-	.mask		= tegra_gpio_irq_mask,
-	.unmask		= tegra_gpio_irq_unmask,
-	.set_type	= tegra_gpio_irq_set_type,
+	.irq_ack	= tegra_gpio_irq_ack,
+	.irq_mask	= tegra_gpio_irq_mask,
+	.irq_unmask	= tegra_gpio_irq_unmask,
+	.irq_set_type	= tegra_gpio_irq_set_type,
 #ifdef CONFIG_PM
-	.set_wake	= tegra_gpio_wake_enable,
+	.irq_set_wake	= tegra_gpio_wake_enable,
 #endif
 };
 
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 50a8dfb..ef8d10b 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -46,30 +46,30 @@
 #define ICTLR_COP_IER_CLR	0x38
 #define ICTLR_COP_IEP_CLASS	0x3c
 
-static void (*gic_mask_irq)(unsigned int irq);
-static void (*gic_unmask_irq)(unsigned int irq);
+static void (*gic_mask_irq)(struct irq_data *d);
+static void (*gic_unmask_irq)(struct irq_data *d);
 
 #define irq_to_ictlr(irq) (((irq)-32) >> 5)
 static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE);
 #define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100)
 
-static void tegra_mask(unsigned int irq)
+static void tegra_mask(struct irq_data *d)
 {
-	void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq));
-	gic_mask_irq(irq);
-	writel(1<<(irq&31), addr+ICTLR_CPU_IER_CLR);
+	void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
+	gic_mask_irq(d);
+	writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR);
 }
 
-static void tegra_unmask(unsigned int irq)
+static void tegra_unmask(struct irq_data *d)
 {
-	void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq));
-	gic_unmask_irq(irq);
-	writel(1<<(irq&31), addr+ICTLR_CPU_IER_SET);
+	void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
+	gic_unmask_irq(d);
+	writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET);
 }
 
 #ifdef CONFIG_PM
 
-static int tegra_set_wake(unsigned int irq, unsigned int on)
+static int tegra_set_wake(struct irq_data *d, unsigned int on)
 {
 	return 0;
 }
@@ -77,10 +77,10 @@ static int tegra_set_wake(unsigned int irq, unsigned int on)
 
 static struct irq_chip tegra_irq = {
 	.name		= "PPI",
-	.mask		= tegra_mask,
-	.unmask		= tegra_unmask,
+	.irq_mask	= tegra_mask,
+	.irq_unmask	= tegra_unmask,
 #ifdef CONFIG_PM
-	.set_wake	= tegra_set_wake,
+	.irq_set_wake	= tegra_set_wake,
 #endif
 };
 
@@ -98,11 +98,11 @@ void __init tegra_init_irq(void)
 	gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
 
 	gic = get_irq_chip(29);
-	gic_unmask_irq = gic->unmask;
-	gic_mask_irq = gic->mask;
-	tegra_irq.ack = gic->ack;
+	gic_unmask_irq = gic->irq_unmask;
+	gic_mask_irq = gic->irq_mask;
+	tegra_irq.irq_ack = gic->irq_ack;
 #ifdef CONFIG_SMP
-	tegra_irq.set_affinity = gic->set_affinity;
+	tegra_irq.irq_set_affinity = gic->irq_set_affinity;
 #endif
 
 	for (i = INT_PRI_BASE; i < INT_GPIO_BASE; i++) {
-- 
1.7.1

[PATCH 47/54] ARM: versatile: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-versatile/core.c |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index e38acb0..9b9b6fa 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -62,23 +62,23 @@
 #define VA_VIC_BASE		__io_address(VERSATILE_VIC_BASE)
 #define VA_SIC_BASE		__io_address(VERSATILE_SIC_BASE)
 
-static void sic_mask_irq(unsigned int irq)
+static void sic_mask_irq(struct irq_data *d)
 {
-	irq -= IRQ_SIC_START;
+	unsigned int irq = d->irq - IRQ_SIC_START;
 	writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
 }
 
-static void sic_unmask_irq(unsigned int irq)
+static void sic_unmask_irq(struct irq_data *d)
 {
-	irq -= IRQ_SIC_START;
+	unsigned int irq = d->irq - IRQ_SIC_START;
 	writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
 }
 
 static struct irq_chip sic_chip = {
-	.name	= "SIC",
-	.ack	= sic_mask_irq,
-	.mask	= sic_mask_irq,
-	.unmask	= sic_unmask_irq,
+	.name		= "SIC",
+	.irq_ack	= sic_mask_irq,
+	.irq_mask	= sic_mask_irq,
+	.irq_unmask	= sic_unmask_irq,
 };
 
 static void
-- 
1.7.1

[PATCH 48/54] ARM: w90x900: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/mach-w90x900/irq.c |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
index 0ce9d8e..9c35010 100644
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -92,15 +92,15 @@ static void nuc900_group_enable(struct group_irq *gpirq, int enable)
 	__raw_writel(regval, REG_AIC_GEN);
 }
 
-static void nuc900_irq_mask(unsigned int irq)
+static void nuc900_irq_mask(struct irq_data *d)
 {
 	struct group_irq *group_irq;
 
 	group_irq = NULL;
 
-	__raw_writel(1 << irq, REG_AIC_MDCR);
+	__raw_writel(1 << d->irq, REG_AIC_MDCR);
 
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_GROUP0:
 		group_irq = &group_nirq0;
 		break;
@@ -143,20 +143,20 @@ static void nuc900_irq_mask(unsigned int irq)
  * to REG_AIC_EOSCR for ACK
  */
 
-static void nuc900_irq_ack(unsigned int irq)
+static void nuc900_irq_ack(struct irq_data *d)
 {
 	__raw_writel(0x01, REG_AIC_EOSCR);
 }
 
-static void nuc900_irq_unmask(unsigned int irq)
+static void nuc900_irq_unmask(struct irq_data *d)
 {
 	struct group_irq *group_irq;
 
 	group_irq = NULL;
 
-	__raw_writel(1 << irq, REG_AIC_MECR);
+	__raw_writel(1 << d->irq, REG_AIC_MECR);
 
-	switch (irq) {
+	switch (d->irq) {
 	case IRQ_GROUP0:
 		group_irq = &group_nirq0;
 		break;
@@ -195,9 +195,9 @@ static void nuc900_irq_unmask(unsigned int irq)
 }
 
 static struct irq_chip nuc900_irq_chip = {
-	.ack	   = nuc900_irq_ack,
-	.mask	   = nuc900_irq_mask,
-	.unmask	   = nuc900_irq_unmask,
+	.irq_ack	= nuc900_irq_ack,
+	.irq_mask	= nuc900_irq_mask,
+	.irq_unmask	= nuc900_irq_unmask,
 };
 
 void __init nuc900_init_irq(void)
-- 
1.7.1

[PATCH 49/54] ARM: plat-mxc: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/plat-mxc/3ds_debugboard.c |   28 +++++++++++++-------------
 arch/arm/plat-mxc/gpio.c           |   30 ++++++++++++++--------------
 arch/arm/plat-mxc/irq.c            |   14 ++++++------
 arch/arm/plat-mxc/tzic.c           |   38 ++++++++++++++++++------------------
 4 files changed, 55 insertions(+), 55 deletions(-)

diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index 639c54a..c856fa3 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -60,7 +60,6 @@
 #define EXPIO_INT_BUTTON_B	(MXC_BOARD_IRQ_START + 4)
 
 static void __iomem *brd_io;
-static void expio_ack_irq(u32 irq);
 
 static struct resource smsc911x_resources[] = {
 	{
@@ -93,7 +92,8 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
 	u32 int_valid;
 	u32 expio_irq;
 
-	desc->chip->mask(irq);	/* irq = gpio irq number */
+	/* irq = gpio irq number */
+	desc->irq_data.chip->irq_mask(&desc->irq_data);
 
 	imr_val = __raw_readw(brd_io + INTR_MASK_REG);
 	int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
@@ -110,37 +110,37 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
 			d->handle_irq(expio_irq, d);
 	}
 
-	desc->chip->ack(irq);
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 /*
  * Disable an expio pin's interrupt by setting the bit in the imr.
  * Irq is an expio virtual irq number
  */
-static void expio_mask_irq(u32 irq)
+static void expio_mask_irq(struct irq_data *d)
 {
 	u16 reg;
-	u32 expio = MXC_IRQ_TO_EXPIO(irq);
+	u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
 
 	reg = __raw_readw(brd_io + INTR_MASK_REG);
 	reg |= (1 << expio);
 	__raw_writew(reg, brd_io + INTR_MASK_REG);
 }
 
-static void expio_ack_irq(u32 irq)
+static void expio_ack_irq(struct irq_data *d)
 {
-	u32 expio = MXC_IRQ_TO_EXPIO(irq);
+	u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
 
 	__raw_writew(1 << expio, brd_io + INTR_RESET_REG);
 	__raw_writew(0, brd_io + INTR_RESET_REG);
-	expio_mask_irq(irq);
+	expio_mask_irq(d);
 }
 
-static void expio_unmask_irq(u32 irq)
+static void expio_unmask_irq(struct irq_data *d)
 {
 	u16 reg;
-	u32 expio = MXC_IRQ_TO_EXPIO(irq);
+	u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
 
 	reg = __raw_readw(brd_io + INTR_MASK_REG);
 	reg &= ~(1 << expio);
@@ -148,9 +148,9 @@ static void expio_unmask_irq(u32 irq)
 }
 
 static struct irq_chip expio_irq_chip = {
-	.ack = expio_ack_irq,
-	.mask = expio_mask_irq,
-	.unmask = expio_unmask_irq,
+	.irq_ack = expio_ack_irq,
+	.irq_mask = expio_mask_irq,
+	.irq_unmask = expio_unmask_irq,
 };
 
 int __init mxc_expio_init(u32 base, u32 p_irq)
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 9c3e362..679ca48 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -63,29 +63,29 @@ static void _set_gpio_irqenable(struct mxc_gpio_port *port, u32 index,
 	__raw_writel(l, port->base + GPIO_IMR);
 }
 
-static void gpio_ack_irq(u32 irq)
+static void gpio_ack_irq(struct irq_data *d)
 {
-	u32 gpio = irq_to_gpio(irq);
+	u32 gpio = irq_to_gpio(d->irq);
 	_clear_gpio_irqstatus(&mxc_gpio_ports[gpio / 32], gpio & 0x1f);
 }
 
-static void gpio_mask_irq(u32 irq)
+static void gpio_mask_irq(struct irq_data *d)
 {
-	u32 gpio = irq_to_gpio(irq);
+	u32 gpio = irq_to_gpio(d->irq);
 	_set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 0);
 }
 
-static void gpio_unmask_irq(u32 irq)
+static void gpio_unmask_irq(struct irq_data *d)
 {
-	u32 gpio = irq_to_gpio(irq);
+	u32 gpio = irq_to_gpio(d->irq);
 	_set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1);
 }
 
 static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset);
 
-static int gpio_set_irq_type(u32 irq, u32 type)
+static int gpio_set_irq_type(struct irq_data *d, u32 type)
 {
-	u32 gpio = irq_to_gpio(irq);
+	u32 gpio = irq_to_gpio(d->irq);
 	struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32];
 	u32 bit, val;
 	int edge;
@@ -211,9 +211,9 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
  * @param  enable       enable as wake-up if equal to non-zero
  * @return       This function returns 0 on success.
  */
-static int gpio_set_wake_irq(u32 irq, u32 enable)
+static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
 {
-	u32 gpio = irq_to_gpio(irq);
+	u32 gpio = irq_to_gpio(d->irq);
 	u32 gpio_idx = gpio & 0x1F;
 	struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32];
 
@@ -233,11 +233,11 @@ static int gpio_set_wake_irq(u32 irq, u32 enable)
 }
 
 static struct irq_chip gpio_irq_chip = {
-	.ack = gpio_ack_irq,
-	.mask = gpio_mask_irq,
-	.unmask = gpio_unmask_irq,
-	.set_type = gpio_set_irq_type,
-	.set_wake = gpio_set_wake_irq,
+	.irq_ack = gpio_ack_irq,
+	.irq_mask = gpio_mask_irq,
+	.irq_unmask = gpio_unmask_irq,
+	.irq_set_type = gpio_set_irq_type,
+	.irq_set_wake = gpio_set_wake_irq,
 };
 
 static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index 7331f2a..d1f250c 100644
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -91,21 +91,21 @@ EXPORT_SYMBOL(mxc_set_irq_fiq);
 #endif /* CONFIG_FIQ */
 
 /* Disable interrupt number "irq" in the AVIC */
-static void mxc_mask_irq(unsigned int irq)
+static void mxc_mask_irq(struct irq_data *d)
 {
-	__raw_writel(irq, avic_base + AVIC_INTDISNUM);
+	__raw_writel(d->irq, avic_base + AVIC_INTDISNUM);
 }
 
 /* Enable interrupt number "irq" in the AVIC */
-static void mxc_unmask_irq(unsigned int irq)
+static void mxc_unmask_irq(struct irq_data *d)
 {
-	__raw_writel(irq, avic_base + AVIC_INTENNUM);
+	__raw_writel(d->irq, avic_base + AVIC_INTENNUM);
 }
 
 static struct irq_chip mxc_avic_chip = {
-	.ack = mxc_mask_irq,
-	.mask = mxc_mask_irq,
-	.unmask = mxc_unmask_irq,
+	.irq_ack = mxc_mask_irq,
+	.irq_mask = mxc_mask_irq,
+	.irq_unmask = mxc_unmask_irq,
 };
 
 /*
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index 3703ab2..6456fa4 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -48,50 +48,50 @@
 void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
 
 /**
- * tzic_mask_irq() - Disable interrupt number "irq" in the TZIC
+ * tzic_mask_irq() - Disable interrupt source "d" in the TZIC
  *
- * @param  irq          interrupt source number
+ * @param  d            interrupt source
  */
-static void tzic_mask_irq(unsigned int irq)
+static void tzic_mask_irq(struct irq_data *d)
 {
 	int index, off;
 
-	index = irq >> 5;
-	off = irq & 0x1F;
+	index = d->irq >> 5;
+	off = d->irq & 0x1F;
 	__raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index));
 }
 
 /**
- * tzic_unmask_irq() - Enable interrupt number "irq" in the TZIC
+ * tzic_unmask_irq() - Enable interrupt source "d" in the TZIC
  *
- * @param  irq          interrupt source number
+ * @param  d            interrupt source
  */
-static void tzic_unmask_irq(unsigned int irq)
+static void tzic_unmask_irq(struct irq_data *d)
 {
 	int index, off;
 
-	index = irq >> 5;
-	off = irq & 0x1F;
+	index = d->irq >> 5;
+	off = d->irq & 0x1F;
 	__raw_writel(1 << off, tzic_base + TZIC_ENSET0(index));
 }
 
 static unsigned int wakeup_intr[4];
 
 /**
- * tzic_set_wake_irq() - Set interrupt number "irq" in the TZIC as a wake-up source.
+ * tzic_set_wake_irq() - Set interrupt source "d" in the TZIC as a wake-up source.
  *
- * @param  irq          interrupt source number
+ * @param  d            interrupt source
  * @param  enable       enable as wake-up if equal to non-zero
  * 			disble as wake-up if equal to zero
  *
  * @return       This function returns 0 on success.
  */
-static int tzic_set_wake_irq(unsigned int irq, unsigned int enable)
+static int tzic_set_wake_irq(struct irq_data *d, unsigned int enable)
 {
 	unsigned int index, off;
 
-	index = irq >> 5;
-	off = irq & 0x1F;
+	index = d->irq >> 5;
+	off = d->irq & 0x1F;
 
 	if (index > 3)
 		return -EINVAL;
@@ -106,10 +106,10 @@ static int tzic_set_wake_irq(unsigned int irq, unsigned int enable)
 
 static struct irq_chip mxc_tzic_chip = {
 	.name = "MXC_TZIC",
-	.ack = tzic_mask_irq,
-	.mask = tzic_mask_irq,
-	.unmask = tzic_unmask_irq,
-	.set_wake = tzic_set_wake_irq,
+	.irq_ack = tzic_mask_irq,
+	.irq_mask = tzic_mask_irq,
+	.irq_unmask = tzic_unmask_irq,
+	.irq_set_wake = tzic_set_wake_irq,
 };
 
 /*
-- 
1.7.1

[PATCH 50/54] ARM: plat-nomadik: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/plat-nomadik/gpio.c |   56 +++++++++++++++++++++---------------------
 1 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index 85e6fd2..2edc841 100644
--- a/arch/arm/plat-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -318,13 +318,13 @@ static inline int nmk_gpio_get_bitmask(int gpio)
 	return 1 << (gpio % 32);
 }
 
-static void nmk_gpio_irq_ack(unsigned int irq)
+static void nmk_gpio_irq_ack(struct irq_data *d)
 {
 	int gpio;
 	struct nmk_gpio_chip *nmk_chip;
 
-	gpio = NOMADIK_IRQ_TO_GPIO(irq);
-	nmk_chip = get_irq_chip_data(irq);
+	gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
+	nmk_chip = irq_data_get_irq_chip_data(d);
 	if (!nmk_chip)
 		return;
 	writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
@@ -363,7 +363,7 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
 	}
 }
 
-static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which,
+static int nmk_gpio_irq_modify(struct irq_data *d, enum nmk_gpio_irq_type which,
 			       bool enable)
 {
 	int gpio;
@@ -371,8 +371,8 @@ static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which,
 	unsigned long flags;
 	u32 bitmask;
 
-	gpio = NOMADIK_IRQ_TO_GPIO(irq);
-	nmk_chip = get_irq_chip_data(irq);
+	gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
+	nmk_chip = irq_data_get_irq_chip_data(d);
 	bitmask = nmk_gpio_get_bitmask(gpio);
 	if (!nmk_chip)
 		return -EINVAL;
@@ -384,24 +384,24 @@ static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which,
 	return 0;
 }
 
-static void nmk_gpio_irq_mask(unsigned int irq)
+static void nmk_gpio_irq_mask(struct irq_data *d)
 {
-	nmk_gpio_irq_modify(irq, NORMAL, false);
+	nmk_gpio_irq_modify(d, NORMAL, false);
 }
 
-static void nmk_gpio_irq_unmask(unsigned int irq)
+static void nmk_gpio_irq_unmask(struct irq_data *d)
 {
-	nmk_gpio_irq_modify(irq, NORMAL, true);
+	nmk_gpio_irq_modify(d, NORMAL, true);
 }
 
-static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
 {
 	struct nmk_gpio_chip *nmk_chip;
 	unsigned long flags;
 	int gpio;
 
-	gpio = NOMADIK_IRQ_TO_GPIO(irq);
-	nmk_chip = get_irq_chip_data(irq);
+	gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
+	nmk_chip = irq_data_get_irq_chip_data(d);
 	if (!nmk_chip)
 		return -EINVAL;
 
@@ -419,9 +419,9 @@ static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on)
 	return 0;
 }
 
-static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
+static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 {
-	struct irq_desc *desc = irq_to_desc(irq);
+	struct irq_desc *desc = irq_to_desc(d->irq);
 	bool enabled = !(desc->status & IRQ_DISABLED);
 	bool wake = desc->wake_depth;
 	int gpio;
@@ -429,8 +429,8 @@ static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
 	unsigned long flags;
 	u32 bitmask;
 
-	gpio = NOMADIK_IRQ_TO_GPIO(irq);
-	nmk_chip = get_irq_chip_data(irq);
+	gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
+	nmk_chip = irq_data_get_irq_chip_data(d);
 	bitmask = nmk_gpio_get_bitmask(gpio);
 	if (!nmk_chip)
 		return -EINVAL;
@@ -469,11 +469,11 @@ static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
 
 static struct irq_chip nmk_gpio_irq_chip = {
 	.name		= "Nomadik-GPIO",
-	.ack		= nmk_gpio_irq_ack,
-	.mask		= nmk_gpio_irq_mask,
-	.unmask		= nmk_gpio_irq_unmask,
-	.set_type	= nmk_gpio_irq_set_type,
-	.set_wake	= nmk_gpio_irq_set_wake,
+	.irq_ack	= nmk_gpio_irq_ack,
+	.irq_mask	= nmk_gpio_irq_mask,
+	.irq_unmask	= nmk_gpio_irq_unmask,
+	.irq_set_type	= nmk_gpio_irq_set_type,
+	.irq_set_wake	= nmk_gpio_irq_set_wake,
 };
 
 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -484,12 +484,12 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	u32 pending;
 	unsigned int first_irq;
 
-	if (host_chip->mask_ack)
-		host_chip->mask_ack(irq);
+	if (host_chip->irq_mask_ack)
+		host_chip->irq_mask_ack(&desc->irq_data);
 	else {
-		host_chip->mask(irq);
-		if (host_chip->ack)
-			host_chip->ack(irq);
+		host_chip->irq_mask(&desc->irq_data);
+		if (host_chip->irq_ack)
+			host_chip->irq_ack(&desc->irq_data);
 	}
 
 	nmk_chip = get_irq_data(irq);
@@ -499,7 +499,7 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 		generic_handle_irq(gpio_irq);
 	}
 
-	host_chip->unmask(irq);
+	host_chip->irq_unmask(&desc->irq_data);
 }
 
 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
-- 
1.7.1

[PATCH 51/54] ARM: plat-omap: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/plat-omap/gpio.c |   93 ++++++++++++++++++++++-----------------------
 1 files changed, 46 insertions(+), 47 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index c05c653..1e83b6b 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -878,17 +878,17 @@ bad:
 	return -EINVAL;
 }
 
-static int gpio_irq_type(unsigned irq, unsigned type)
+static int gpio_irq_type(struct irq_data *d, unsigned type)
 {
 	struct gpio_bank *bank;
 	unsigned gpio;
 	int retval;
 	unsigned long flags;
 
-	if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE)
-		gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
+	if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE)
+		gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
 	else
-		gpio = irq - IH_GPIO_BASE;
+		gpio = d->irq - IH_GPIO_BASE;
 
 	if (check_gpio(gpio) < 0)
 		return -EINVAL;
@@ -901,19 +901,19 @@ static int gpio_irq_type(unsigned irq, unsigned type)
 			&& (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
 		return -EINVAL;
 
-	bank = get_irq_chip_data(irq);
+	bank = irq_data_get_irq_chip_data(d);
 	spin_lock_irqsave(&bank->lock, flags);
 	retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
 	if (retval == 0) {
-		irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
-		irq_desc[irq].status |= type;
+		irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK;
+		irq_desc[d->irq].status |= type;
 	}
 	spin_unlock_irqrestore(&bank->lock, flags);
 
 	if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-		__set_irq_handler_unlocked(irq, handle_level_irq);
+		__set_irq_handler_unlocked(d->irq, handle_level_irq);
 	else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-		__set_irq_handler_unlocked(irq, handle_edge_irq);
+		__set_irq_handler_unlocked(d->irq, handle_edge_irq);
 
 	return retval;
 }
@@ -1170,15 +1170,15 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
 }
 
 /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
-static int gpio_wake_enable(unsigned int irq, unsigned int enable)
+static int gpio_wake_enable(struct irq_data *d, unsigned int enable)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
 	struct gpio_bank *bank;
 	int retval;
 
 	if (check_gpio(gpio) < 0)
 		return -ENODEV;
-	bank = get_irq_chip_data(irq);
+	bank = irq_data_get_irq_chip_data(d);
 	retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable);
 
 	return retval;
@@ -1291,7 +1291,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	u32 retrigger = 0;
 	int unmasked = 0;
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	bank = get_irq_data(irq);
 #ifdef CONFIG_ARCH_OMAP1
@@ -1343,7 +1343,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 		configured, we could unmask GPIO bank interrupt immediately */
 		if (!level_mask && !unmasked) {
 			unmasked = 1;
-			desc->chip->unmask(irq);
+			desc->irq_data.chip->irq_unmask(&desc->irq_data);
 		}
 
 		isr |= retrigger;
@@ -1378,41 +1378,40 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	handler(s) are executed in order to avoid spurious bank
 	interrupt */
 	if (!unmasked)
-		desc->chip->unmask(irq);
-
+		desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
-static void gpio_irq_shutdown(unsigned int irq)
+static void gpio_irq_shutdown(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_reset_gpio(bank, gpio);
 }
 
-static void gpio_ack_irq(unsigned int irq)
+static void gpio_ack_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_clear_gpio_irqstatus(bank, gpio);
 }
 
-static void gpio_mask_irq(unsigned int irq)
+static void gpio_mask_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_set_gpio_irqenable(bank, gpio, 0);
 	_set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
 }
 
-static void gpio_unmask_irq(unsigned int irq)
+static void gpio_unmask_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 	unsigned int irq_mask = 1 << get_gpio_index(gpio);
-	struct irq_desc *desc = irq_to_desc(irq);
+	struct irq_desc *desc = irq_to_desc(d->irq);
 	u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
 
 	if (trigger)
@@ -1430,12 +1429,12 @@ static void gpio_unmask_irq(unsigned int irq)
 
 static struct irq_chip gpio_irq_chip = {
 	.name		= "GPIO",
-	.shutdown	= gpio_irq_shutdown,
-	.ack		= gpio_ack_irq,
-	.mask		= gpio_mask_irq,
-	.unmask		= gpio_unmask_irq,
-	.set_type	= gpio_irq_type,
-	.set_wake	= gpio_wake_enable,
+	.irq_shutdown	= gpio_irq_shutdown,
+	.irq_ack	= gpio_ack_irq,
+	.irq_mask	= gpio_mask_irq,
+	.irq_unmask	= gpio_unmask_irq,
+	.irq_set_type	= gpio_irq_type,
+	.irq_set_wake	= gpio_wake_enable,
 };
 
 /*---------------------------------------------------------------------*/
@@ -1444,36 +1443,36 @@ static struct irq_chip gpio_irq_chip = {
 
 /* MPUIO uses the always-on 32k clock */
 
-static void mpuio_ack_irq(unsigned int irq)
+static void mpuio_ack_irq(struct irq_data *d)
 {
 	/* The ISR is reset automatically, so do nothing here. */
 }
 
-static void mpuio_mask_irq(unsigned int irq)
+static void mpuio_mask_irq(struct irq_data *d)
 {
-	unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_set_gpio_irqenable(bank, gpio, 0);
 }
 
-static void mpuio_unmask_irq(unsigned int irq)
+static void mpuio_unmask_irq(struct irq_data *d)
 {
-	unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_set_gpio_irqenable(bank, gpio, 1);
 }
 
 static struct irq_chip mpuio_irq_chip = {
 	.name		= "MPUIO",
-	.ack		= mpuio_ack_irq,
-	.mask		= mpuio_mask_irq,
-	.unmask		= mpuio_unmask_irq,
-	.set_type	= gpio_irq_type,
+	.irq_ack	= mpuio_ack_irq,
+	.irq_mask	= mpuio_mask_irq,
+	.irq_unmask	= mpuio_unmask_irq,
+	.irq_set_type	= gpio_irq_type,
 #ifdef CONFIG_ARCH_OMAP16XX
 	/* REVISIT: assuming only 16xx supports MPUIO wake events */
-	.set_wake	= gpio_wake_enable,
+	.irq_set_wake	= gpio_wake_enable,
 #endif
 };
 
-- 
1.7.1

[PATCH 51/54] ARM: plat-omap: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/plat-omap/gpio.c |   93 ++++++++++++++++++++++-----------------------
 1 files changed, 46 insertions(+), 47 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index c05c653..1e83b6b 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -878,17 +878,17 @@ bad:
 	return -EINVAL;
 }
 
-static int gpio_irq_type(unsigned irq, unsigned type)
+static int gpio_irq_type(struct irq_data *d, unsigned type)
 {
 	struct gpio_bank *bank;
 	unsigned gpio;
 	int retval;
 	unsigned long flags;
 
-	if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE)
-		gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
+	if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE)
+		gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
 	else
-		gpio = irq - IH_GPIO_BASE;
+		gpio = d->irq - IH_GPIO_BASE;
 
 	if (check_gpio(gpio) < 0)
 		return -EINVAL;
@@ -901,19 +901,19 @@ static int gpio_irq_type(unsigned irq, unsigned type)
 			&& (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
 		return -EINVAL;
 
-	bank = get_irq_chip_data(irq);
+	bank = irq_data_get_irq_chip_data(d);
 	spin_lock_irqsave(&bank->lock, flags);
 	retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
 	if (retval == 0) {
-		irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
-		irq_desc[irq].status |= type;
+		irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK;
+		irq_desc[d->irq].status |= type;
 	}
 	spin_unlock_irqrestore(&bank->lock, flags);
 
 	if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-		__set_irq_handler_unlocked(irq, handle_level_irq);
+		__set_irq_handler_unlocked(d->irq, handle_level_irq);
 	else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-		__set_irq_handler_unlocked(irq, handle_edge_irq);
+		__set_irq_handler_unlocked(d->irq, handle_edge_irq);
 
 	return retval;
 }
@@ -1170,15 +1170,15 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
 }
 
 /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
-static int gpio_wake_enable(unsigned int irq, unsigned int enable)
+static int gpio_wake_enable(struct irq_data *d, unsigned int enable)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
 	struct gpio_bank *bank;
 	int retval;
 
 	if (check_gpio(gpio) < 0)
 		return -ENODEV;
-	bank = get_irq_chip_data(irq);
+	bank = irq_data_get_irq_chip_data(d);
 	retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable);
 
 	return retval;
@@ -1291,7 +1291,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	u32 retrigger = 0;
 	int unmasked = 0;
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	bank = get_irq_data(irq);
 #ifdef CONFIG_ARCH_OMAP1
@@ -1343,7 +1343,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 		configured, we could unmask GPIO bank interrupt immediately */
 		if (!level_mask && !unmasked) {
 			unmasked = 1;
-			desc->chip->unmask(irq);
+			desc->irq_data.chip->irq_unmask(&desc->irq_data);
 		}
 
 		isr |= retrigger;
@@ -1378,41 +1378,40 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	handler(s) are executed in order to avoid spurious bank
 	interrupt */
 	if (!unmasked)
-		desc->chip->unmask(irq);
-
+		desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
-static void gpio_irq_shutdown(unsigned int irq)
+static void gpio_irq_shutdown(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_reset_gpio(bank, gpio);
 }
 
-static void gpio_ack_irq(unsigned int irq)
+static void gpio_ack_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_clear_gpio_irqstatus(bank, gpio);
 }
 
-static void gpio_mask_irq(unsigned int irq)
+static void gpio_mask_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_set_gpio_irqenable(bank, gpio, 0);
 	_set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
 }
 
-static void gpio_unmask_irq(unsigned int irq)
+static void gpio_unmask_irq(struct irq_data *d)
 {
-	unsigned int gpio = irq - IH_GPIO_BASE;
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = d->irq - IH_GPIO_BASE;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 	unsigned int irq_mask = 1 << get_gpio_index(gpio);
-	struct irq_desc *desc = irq_to_desc(irq);
+	struct irq_desc *desc = irq_to_desc(d->irq);
 	u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
 
 	if (trigger)
@@ -1430,12 +1429,12 @@ static void gpio_unmask_irq(unsigned int irq)
 
 static struct irq_chip gpio_irq_chip = {
 	.name		= "GPIO",
-	.shutdown	= gpio_irq_shutdown,
-	.ack		= gpio_ack_irq,
-	.mask		= gpio_mask_irq,
-	.unmask		= gpio_unmask_irq,
-	.set_type	= gpio_irq_type,
-	.set_wake	= gpio_wake_enable,
+	.irq_shutdown	= gpio_irq_shutdown,
+	.irq_ack	= gpio_ack_irq,
+	.irq_mask	= gpio_mask_irq,
+	.irq_unmask	= gpio_unmask_irq,
+	.irq_set_type	= gpio_irq_type,
+	.irq_set_wake	= gpio_wake_enable,
 };
 
 /*---------------------------------------------------------------------*/
@@ -1444,36 +1443,36 @@ static struct irq_chip gpio_irq_chip = {
 
 /* MPUIO uses the always-on 32k clock */
 
-static void mpuio_ack_irq(unsigned int irq)
+static void mpuio_ack_irq(struct irq_data *d)
 {
 	/* The ISR is reset automatically, so do nothing here. */
 }
 
-static void mpuio_mask_irq(unsigned int irq)
+static void mpuio_mask_irq(struct irq_data *d)
 {
-	unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_set_gpio_irqenable(bank, gpio, 0);
 }
 
-static void mpuio_unmask_irq(unsigned int irq)
+static void mpuio_unmask_irq(struct irq_data *d)
 {
-	unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
-	struct gpio_bank *bank = get_irq_chip_data(irq);
+	unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 
 	_set_gpio_irqenable(bank, gpio, 1);
 }
 
 static struct irq_chip mpuio_irq_chip = {
 	.name		= "MPUIO",
-	.ack		= mpuio_ack_irq,
-	.mask		= mpuio_mask_irq,
-	.unmask		= mpuio_unmask_irq,
-	.set_type	= gpio_irq_type,
+	.irq_ack	= mpuio_ack_irq,
+	.irq_mask	= mpuio_mask_irq,
+	.irq_unmask	= mpuio_unmask_irq,
+	.irq_set_type	= gpio_irq_type,
 #ifdef CONFIG_ARCH_OMAP16XX
 	/* REVISIT: assuming only 16xx supports MPUIO wake events */
-	.set_wake	= gpio_wake_enable,
+	.irq_set_wake	= gpio_wake_enable,
 #endif
 };
 
-- 
1.7.1

[PATCH 52/54] ARM: plat-orion: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/plat-orion/gpio.c |   37 ++++++++++++++++++-------------------
 arch/arm/plat-orion/irq.c  |   18 +++++++++---------
 2 files changed, 27 insertions(+), 28 deletions(-)

diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index e814803..5f35223 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -232,20 +232,19 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
  *        polarity    LEVEL          mask
  *
  ****************************************************************************/
-
-static void gpio_irq_ack(u32 irq)
+static void gpio_irq_ack(struct irq_data *d)
 {
-	int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
+	int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
 	if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
-		int pin = irq_to_gpio(irq);
+		int pin = irq_to_gpio(d->irq);
 		writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin));
 	}
 }
 
-static void gpio_irq_mask(u32 irq)
+static void gpio_irq_mask(struct irq_data *d)
 {
-	int pin = irq_to_gpio(irq);
-	int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
+	int pin = irq_to_gpio(d->irq);
+	int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
 	u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
 		GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
 	u32 u = readl(reg);
@@ -253,10 +252,10 @@ static void gpio_irq_mask(u32 irq)
 	writel(u, reg);
 }
 
-static void gpio_irq_unmask(u32 irq)
+static void gpio_irq_unmask(struct irq_data *d)
 {
-	int pin = irq_to_gpio(irq);
-	int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
+	int pin = irq_to_gpio(d->irq);
+	int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
 	u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
 		GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
 	u32 u = readl(reg);
@@ -264,20 +263,20 @@ static void gpio_irq_unmask(u32 irq)
 	writel(u, reg);
 }
 
-static int gpio_irq_set_type(u32 irq, u32 type)
+static int gpio_irq_set_type(struct irq_data *d, u32 type)
 {
-	int pin = irq_to_gpio(irq);
+	int pin = irq_to_gpio(d->irq);
 	struct irq_desc *desc;
 	u32 u;
 
 	u = readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31));
 	if (!u) {
 		printk(KERN_ERR "orion gpio_irq_set_type failed "
-				"(irq %d, pin %d).\n", irq, pin);
+				"(irq %d, pin %d).\n", d->irq, pin);
 		return -EINVAL;
 	}
 
-	desc = irq_desc + irq;
+	desc = irq_desc + d->irq;
 
 	/*
 	 * Set edge/level type.
@@ -287,7 +286,7 @@ static int gpio_irq_set_type(u32 irq, u32 type)
 	} else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
 		desc->handle_irq = handle_level_irq;
 	} else {
-		printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type);
+		printk(KERN_ERR "failed to set irq=%d (type=%d)\n", d->irq, type);
 		return -EINVAL;
 	}
 
@@ -325,10 +324,10 @@ static int gpio_irq_set_type(u32 irq, u32 type)
 
 struct irq_chip orion_gpio_irq_chip = {
 	.name		= "orion_gpio_irq",
-	.ack		= gpio_irq_ack,
-	.mask		= gpio_irq_mask,
-	.unmask		= gpio_irq_unmask,
-	.set_type	= gpio_irq_set_type,
+	.irq_ack	= gpio_irq_ack,
+	.irq_mask	= gpio_irq_mask,
+	.irq_unmask	= gpio_irq_unmask,
+	.irq_set_type	= gpio_irq_set_type,
 };
 
 void orion_gpio_irq_handler(int pinoff)
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 3f9d34f..7d0c7eb 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -14,31 +14,31 @@
 #include <linux/io.h>
 #include <plat/irq.h>
 
-static void orion_irq_mask(u32 irq)
+static void orion_irq_mask(struct irq_data *d)
 {
-	void __iomem *maskaddr = get_irq_chip_data(irq);
+	void __iomem *maskaddr = irq_data_get_irq_chip_data(d);
 	u32 mask;
 
 	mask = readl(maskaddr);
-	mask &= ~(1 << (irq & 31));
+	mask &= ~(1 << (d->irq & 31));
 	writel(mask, maskaddr);
 }
 
-static void orion_irq_unmask(u32 irq)
+static void orion_irq_unmask(struct irq_data *d)
 {
-	void __iomem *maskaddr = get_irq_chip_data(irq);
+	void __iomem *maskaddr = irq_data_get_irq_chip_data(d);
 	u32 mask;
 
 	mask = readl(maskaddr);
-	mask |= 1 << (irq & 31);
+	mask |= 1 << (d->irq & 31);
 	writel(mask, maskaddr);
 }
 
 static struct irq_chip orion_irq_chip = {
 	.name		= "orion_irq",
-	.mask		= orion_irq_mask,
-	.mask_ack	= orion_irq_mask,
-	.unmask		= orion_irq_unmask,
+	.irq_mask	= orion_irq_mask,
+	.irq_mask_ack	= orion_irq_mask,
+	.irq_unmask	= orion_irq_unmask,
 };
 
 void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
-- 
1.7.1

[PATCH 53/54] ARM: plat-spear: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/plat-spear/shirq.c |   22 +++++++++++-----------
 1 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
index 2172d69..7818903 100644
--- a/arch/arm/plat-spear/shirq.c
+++ b/arch/arm/plat-spear/shirq.c
@@ -20,10 +20,10 @@
 struct spear_shirq *shirq;
 static DEFINE_SPINLOCK(lock);
 
-static void shirq_irq_mask(unsigned irq)
+static void shirq_irq_mask(struct irq_data *d)
 {
-	struct spear_shirq *shirq = get_irq_chip_data(irq);
-	u32 val, id = irq - shirq->dev_config[0].virq;
+	struct spear_shirq *shirq = irq_data_get_irq_chip_data(d);
+	u32 val, id = d->irq - shirq->dev_config[0].virq;
 	unsigned long flags;
 
 	if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1)
@@ -39,10 +39,10 @@ static void shirq_irq_mask(unsigned irq)
 	spin_unlock_irqrestore(&lock, flags);
 }
 
-static void shirq_irq_unmask(unsigned irq)
+static void shirq_irq_unmask(struct irq_data *d)
 {
-	struct spear_shirq *shirq = get_irq_chip_data(irq);
-	u32 val, id = irq - shirq->dev_config[0].virq;
+	struct spear_shirq *shirq = irq_data_get_irq_chip_data(d);
+	u32 val, id = d->irq - shirq->dev_config[0].virq;
 	unsigned long flags;
 
 	if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1)
@@ -60,9 +60,9 @@ static void shirq_irq_unmask(unsigned irq)
 
 static struct irq_chip shirq_chip = {
 	.name		= "spear_shirq",
-	.ack		= shirq_irq_mask,
-	.mask		= shirq_irq_mask,
-	.unmask		= shirq_irq_unmask,
+	.irq_ack	= shirq_irq_mask,
+	.irq_mask	= shirq_irq_mask,
+	.irq_unmask	= shirq_irq_unmask,
 };
 
 static void shirq_handler(unsigned irq, struct irq_desc *desc)
@@ -70,7 +70,7 @@ static void shirq_handler(unsigned irq, struct irq_desc *desc)
 	u32 i, val, mask;
 	struct spear_shirq *shirq = get_irq_data(irq);
 
-	desc->chip->ack(irq);
+	desc->irq_data.chip->irq_ack(&desc->irq_data);
 	while ((val = readl(shirq->regs.base + shirq->regs.status_reg) &
 				shirq->regs.status_reg_mask)) {
 		for (i = 0; (i < shirq->dev_count) && val; i++) {
@@ -92,7 +92,7 @@ static void shirq_handler(unsigned irq, struct irq_desc *desc)
 			writel(mask, shirq->regs.base + shirq->regs.clear_reg);
 		}
 	}
-	desc->chip->unmask(irq);
+	desc->irq_data.chip->irq_unmask(&desc->irq_data);
 }
 
 int spear_shirq_register(struct spear_shirq *shirq)
-- 
1.7.1

[PATCH 54/54] ARM: plat-stmp3xxx: irq_data conversion.

[Lennert Buytenhek]

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
 arch/arm/plat-stmp3xxx/irq.c    |    2 +-
 arch/arm/plat-stmp3xxx/pinmux.c |   32 ++++++++++++++++----------------
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c
index 20de4e0..aaa1686 100644
--- a/arch/arm/plat-stmp3xxx/irq.c
+++ b/arch/arm/plat-stmp3xxx/irq.c
@@ -34,7 +34,7 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip)
 
 	/* Disable all interrupts initially */
 	for (i = 0; i < NR_REAL_IRQS; i++) {
-		chip->mask(i);
+		chip->irq_mask(irq_get_irq_data(i));
 		set_irq_chip(i, chip);
 		set_irq_handler(i, handle_level_irq);
 		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
diff --git a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c
index 6d6b1a4..66d5bac 100644
--- a/arch/arm/plat-stmp3xxx/pinmux.c
+++ b/arch/arm/plat-stmp3xxx/pinmux.c
@@ -351,27 +351,27 @@ void stmp3xxx_release_pin_group(struct pin_group *pin_group, const char *label)
 }
 EXPORT_SYMBOL(stmp3xxx_release_pin_group);
 
-static int stmp3xxx_irq_to_gpio(int irq,
+static int stmp3xxx_irq_data_to_gpio(struct irq_data *d,
 	struct stmp3xxx_pinmux_bank **bank, unsigned *gpio)
 {
 	struct stmp3xxx_pinmux_bank *pm;
 
 	for (pm = pinmux_banks; pm < pinmux_banks + NR_BANKS; pm++)
-		if (pm->virq <= irq && irq < pm->virq + 32) {
+		if (pm->virq <= d->irq && d->irq < pm->virq + 32) {
 			*bank = pm;
-			*gpio = irq - pm->virq;
+			*gpio = d->irq - pm->virq;
 			return 0;
 		}
 	return -ENOENT;
 }
 
-static int stmp3xxx_set_irqtype(unsigned irq, unsigned type)
+static int stmp3xxx_set_irqtype(struct irq_data *d, unsigned type)
 {
 	struct stmp3xxx_pinmux_bank *pm;
 	unsigned gpio;
 	int l, p;
 
-	stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
+	stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
 	switch (type) {
 	case IRQ_TYPE_EDGE_RISING:
 		l = 0; p = 1; break;
@@ -398,33 +398,33 @@ static int stmp3xxx_set_irqtype(unsigned irq, unsigned type)
 	return 0;
 }
 
-static void stmp3xxx_pin_ack_irq(unsigned irq)
+static void stmp3xxx_pin_ack_irq(struct irq_data *d)
 {
 	u32 stat;
 	struct stmp3xxx_pinmux_bank *pm;
 	unsigned gpio;
 
-	stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
+	stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
 	stat = __raw_readl(pm->irqstat) & (1 << gpio);
 	stmp3xxx_clearl(stat, pm->irqstat);
 }
 
-static void stmp3xxx_pin_mask_irq(unsigned irq)
+static void stmp3xxx_pin_mask_irq(struct irq_data *d)
 {
 	struct stmp3xxx_pinmux_bank *pm;
 	unsigned gpio;
 
-	stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
+	stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
 	stmp3xxx_clearl(1 << gpio, pm->irqen);
 	stmp3xxx_clearl(1 << gpio, pm->pin2irq);
 }
 
-static void stmp3xxx_pin_unmask_irq(unsigned irq)
+static void stmp3xxx_pin_unmask_irq(struct irq_data *d)
 {
 	struct stmp3xxx_pinmux_bank *pm;
 	unsigned gpio;
 
-	stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
+	stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
 	stmp3xxx_setl(1 << gpio, pm->irqen);
 	stmp3xxx_setl(1 << gpio, pm->pin2irq);
 }
@@ -503,10 +503,10 @@ static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc)
 }
 
 static struct irq_chip gpio_irq_chip = {
-	.ack	= stmp3xxx_pin_ack_irq,
-	.mask	= stmp3xxx_pin_mask_irq,
-	.unmask	= stmp3xxx_pin_unmask_irq,
-	.set_type = stmp3xxx_set_irqtype,
+	.irq_ack	= stmp3xxx_pin_ack_irq,
+	.irq_mask	= stmp3xxx_pin_mask_irq,
+	.irq_unmask	= stmp3xxx_pin_unmask_irq,
+	.irq_set_type	= stmp3xxx_set_irqtype,
 };
 
 int __init stmp3xxx_pinmux_init(int virtual_irq_start)
@@ -533,7 +533,7 @@ int __init stmp3xxx_pinmux_init(int virtual_irq_start)
 		pm->virq = virtual_irq_start + b * 32;
 
 		for (virq = pm->virq; virq < pm->virq; virq++) {
-			gpio_irq_chip.mask(virq);
+			gpio_irq_chip.irq_mask(irq_get_irq_data(virq));
 			set_irq_chip(virq, &gpio_irq_chip);
 			set_irq_handler(virq, handle_level_irq);
 			set_irq_flags(virq, IRQF_VALID);
-- 
1.7.1

[PATCH 04/54] ARM: ITE 8152: irq_data conversion.

[Mike Rapoport]

On 11/30/10 15:25, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Mike Rapoport <mike@compulab.co.il>

> ---
>  arch/arm/common/it8152.c |   14 +++++++++-----
>  1 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
> index 1bec96e..fa708f7 100644
> --- a/arch/arm/common/it8152.c
> +++ b/arch/arm/common/it8152.c
> @@ -31,8 +31,10 @@
>  
>  #define MAX_SLOTS		21
>  
> -static void it8152_mask_irq(unsigned int irq)
> +static void it8152_mask_irq(struct irq_data *d)
>  {
> +	unsigned int irq = d->irq;
> +
>         if (irq >= IT8152_LD_IRQ(0)) {
>  	       __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) |
>  			    (1 << (irq - IT8152_LD_IRQ(0)))),
> @@ -48,8 +50,10 @@ static void it8152_mask_irq(unsigned int irq)
>         }
>  }
>  
> -static void it8152_unmask_irq(unsigned int irq)
> +static void it8152_unmask_irq(struct irq_data *d)
>  {
> +	unsigned int irq = d->irq;
> +
>         if (irq >= IT8152_LD_IRQ(0)) {
>  	       __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) &
>  			     ~(1 << (irq - IT8152_LD_IRQ(0)))),
> @@ -67,9 +71,9 @@ static void it8152_unmask_irq(unsigned int irq)
>  
>  static struct irq_chip it8152_irq_chip = {
>  	.name		= "it8152",
> -	.ack		= it8152_mask_irq,
> -	.mask		= it8152_mask_irq,
> -	.unmask		= it8152_unmask_irq,
> +	.irq_ack	= it8152_mask_irq,
> +	.irq_mask	= it8152_mask_irq,
> +	.irq_unmask	= it8152_unmask_irq,
>  };
>  
>  void it8152_init_irq(void)


-- 
Sincerely yours,
Mike.

[PATCH 17/54] ARM: gemini: irq_data conversion.

[Hans Ulli Kroll]

Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>

On Tue, 30 Nov 2010, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
>  arch/arm/mach-gemini/gpio.c |   26 +++++++++++++-------------
>  arch/arm/mach-gemini/irq.c  |   20 ++++++++++----------
>  2 files changed, 23 insertions(+), 23 deletions(-)
> 
> diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
> index fe3bd5a..fa3d333 100644
> --- a/arch/arm/mach-gemini/gpio.c
> +++ b/arch/arm/mach-gemini/gpio.c
> @@ -54,33 +54,33 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index,
>  	__raw_writel(reg, base + GPIO_INT_EN);
>  }
>  
> -static void gpio_ack_irq(unsigned int irq)
> +static void gpio_ack_irq(struct irq_data *d)
>  {
> -	unsigned int gpio = irq_to_gpio(irq);
> +	unsigned int gpio = irq_to_gpio(d->irq);
>  	unsigned int base = GPIO_BASE(gpio / 32);
>  
>  	__raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR);
>  }
>  
> -static void gpio_mask_irq(unsigned int irq)
> +static void gpio_mask_irq(struct irq_data *d)
>  {
> -	unsigned int gpio = irq_to_gpio(irq);
> +	unsigned int gpio = irq_to_gpio(d->irq);
>  	unsigned int base = GPIO_BASE(gpio / 32);
>  
>  	_set_gpio_irqenable(base, gpio % 32, 0);
>  }
>  
> -static void gpio_unmask_irq(unsigned int irq)
> +static void gpio_unmask_irq(struct irq_data *d)
>  {
> -	unsigned int gpio = irq_to_gpio(irq);
> +	unsigned int gpio = irq_to_gpio(d->irq);
>  	unsigned int base = GPIO_BASE(gpio / 32);
>  
>  	_set_gpio_irqenable(base, gpio % 32, 1);
>  }
>  
> -static int gpio_set_irq_type(unsigned int irq, unsigned int type)
> +static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
>  {
> -	unsigned int gpio = irq_to_gpio(irq);
> +	unsigned int gpio = irq_to_gpio(d->irq);
>  	unsigned int gpio_mask = 1 << (gpio % 32);
>  	unsigned int base = GPIO_BASE(gpio / 32);
>  	unsigned int reg_both, reg_level, reg_type;
> @@ -120,7 +120,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
>  	__raw_writel(reg_level, base + GPIO_INT_LEVEL);
>  	__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
>  
> -	gpio_ack_irq(irq);
> +	gpio_ack_irq(d->irq);
>  
>  	return 0;
>  }
> @@ -146,10 +146,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
>  
>  static struct irq_chip gpio_irq_chip = {
>  	.name = "GPIO",
> -	.ack = gpio_ack_irq,
> -	.mask = gpio_mask_irq,
> -	.unmask = gpio_unmask_irq,
> -	.set_type = gpio_set_irq_type,
> +	.irq_ack = gpio_ack_irq,
> +	.irq_mask = gpio_mask_irq,
> +	.irq_unmask = gpio_unmask_irq,
> +	.irq_set_type = gpio_set_irq_type,
>  };
>  
>  static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
> diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
> index 9e613ca..96bc227 100644
> --- a/arch/arm/mach-gemini/irq.c
> +++ b/arch/arm/mach-gemini/irq.c
> @@ -32,34 +32,34 @@
>  #define FIQ_LEVEL(base_addr)	(base_addr + 0x30)
>  #define FIQ_STATUS(base_addr)	(base_addr + 0x34)
>  
> -static void gemini_ack_irq(unsigned int irq)
> +static void gemini_ack_irq(struct irq_data *d)
>  {
> -	__raw_writel(1 << irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
> +	__raw_writel(1 << d->irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
>  }
>  
> -static void gemini_mask_irq(unsigned int irq)
> +static void gemini_mask_irq(struct irq_data *d)
>  {
>  	unsigned int mask;
>  
>  	mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
> -	mask &= ~(1 << irq);
> +	mask &= ~(1 << d->irq);
>  	__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
>  }
>  
> -static void gemini_unmask_irq(unsigned int irq)
> +static void gemini_unmask_irq(struct irq_data *d)
>  {
>  	unsigned int mask;
>  
>  	mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
> -	mask |= (1 << irq);
> +	mask |= (1 << d->irq);
>  	__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
>  }
>  
>  static struct irq_chip gemini_irq_chip = {
> -	.name	= "INTC",
> -	.ack	= gemini_ack_irq,
> -	.mask	= gemini_mask_irq,
> -	.unmask	= gemini_unmask_irq,
> +	.name		= "INTC",
> +	.irq_ack	= gemini_ack_irq,
> +	.irq_mask	= gemini_mask_irq,
> +	.irq_unmask	= gemini_unmask_irq,
>  };
>  
>  static struct resource irq_resource = {
> -- 
> 1.7.1
> 
> 

[PATCH 15/54] ARM: ep93xx: irq_data conversion.

[Ryan Mallon]

On 12/01/2010 02:36 AM, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
>  arch/arm/mach-ep93xx/gpio.c |   36 ++++++++++++++++++------------------
>  1 files changed, 18 insertions(+), 18 deletions(-)
> 

<snip>

> -static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
> +static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
>  {
> -	struct irq_desc *desc = irq_desc + irq;
> -	const int gpio = irq_to_gpio(irq);
> +	struct irq_desc *desc = irq_desc + d->irq;

Is this still correct? I haven't followed much of the irq_data
discussion, but this post (https://patchwork.kernel.org/patch/230221/)
says that with sparse irq converting irq number to irq_desc is now a
radix tree lookup.

I get the impression from the above email that we should be avoiding
using irq_desc directly in these functions?

~Ryan

-- 
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com         	PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com	New Zealand
Phone: +64 3 3779127		Freecall: Australia 1800 148 751
Fax:   +64 3 3779135			  USA 1800 261 2934

[PATCH 06/54] ARM: sa1111: irq_data conversion.

[Kristoffer Ericson]

On Tue, Nov 30, 2010 at 02:25:46PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---

It applies cleanly and builds without issues. Its hard to test
since sa1111 isnt working properly (which I will need to fix at later date), 
but I dont have any issues with this patch.
So, 

Acked-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>

>  arch/arm/common/sa1111.c |   94 +++++++++++++++++++++++-----------------------
>  1 files changed, 47 insertions(+), 47 deletions(-)
> 
> diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
> index c0258a8..d6c784e 100644
> --- a/arch/arm/common/sa1111.c
> +++ b/arch/arm/common/sa1111.c
> @@ -210,7 +210,7 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
>  
>  	sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
>  
> -	desc->chip->ack(irq);
> +	desc->irq_data.chip->irq_ack(&desc->irq_data);
>  
>  	sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
>  
> @@ -228,35 +228,35 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
>  			generic_handle_irq(i + sachip->irq_base);
>  
>  	/* For level-based interrupts */
> -	desc->chip->unmask(irq);
> +	desc->irq_data.chip->irq_unmask(&desc->irq_data);
>  }
>  
>  #define SA1111_IRQMASK_LO(x)	(1 << (x - sachip->irq_base))
>  #define SA1111_IRQMASK_HI(x)	(1 << (x - sachip->irq_base - 32))
>  
> -static void sa1111_ack_irq(unsigned int irq)
> +static void sa1111_ack_irq(struct irq_data *d)
>  {
>  }
>  
> -static void sa1111_mask_lowirq(unsigned int irq)
> +static void sa1111_mask_lowirq(struct irq_data *d)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
>  	unsigned long ie0;
>  
>  	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
> -	ie0 &= ~SA1111_IRQMASK_LO(irq);
> +	ie0 &= ~SA1111_IRQMASK_LO(d->irq);
>  	writel(ie0, mapbase + SA1111_INTEN0);
>  }
>  
> -static void sa1111_unmask_lowirq(unsigned int irq)
> +static void sa1111_unmask_lowirq(struct irq_data *d)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
>  	unsigned long ie0;
>  
>  	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
> -	ie0 |= SA1111_IRQMASK_LO(irq);
> +	ie0 |= SA1111_IRQMASK_LO(d->irq);
>  	sa1111_writel(ie0, mapbase + SA1111_INTEN0);
>  }
>  
> @@ -267,11 +267,11 @@ static void sa1111_unmask_lowirq(unsigned int irq)
>   * be triggered.  In fact, its very difficult, if not impossible to get
>   * INTSET to re-trigger the interrupt.
>   */
> -static int sa1111_retrigger_lowirq(unsigned int irq)
> +static int sa1111_retrigger_lowirq(struct irq_data *d)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
> -	unsigned int mask = SA1111_IRQMASK_LO(irq);
> +	unsigned int mask = SA1111_IRQMASK_LO(d->irq);
>  	unsigned long ip0;
>  	int i;
>  
> @@ -285,15 +285,15 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
>  
>  	if (i == 8)
>  		printk(KERN_ERR "Danger Will Robinson: failed to "
> -			"re-trigger IRQ%d\n", irq);
> +			"re-trigger IRQ%d\n", d->irq);
>  	return i == 8 ? -1 : 0;
>  }
>  
> -static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
> +static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
> -	unsigned int mask = SA1111_IRQMASK_LO(irq);
> +	unsigned int mask = SA1111_IRQMASK_LO(d->irq);
>  	unsigned long ip0;
>  
>  	if (flags == IRQ_TYPE_PROBE)
> @@ -313,11 +313,11 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
>  	return 0;
>  }
>  
> -static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
> +static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
> -	unsigned int mask = SA1111_IRQMASK_LO(irq);
> +	unsigned int mask = SA1111_IRQMASK_LO(d->irq);
>  	unsigned long we0;
>  
>  	we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
> @@ -332,33 +332,33 @@ static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
>  
>  static struct irq_chip sa1111_low_chip = {
>  	.name		= "SA1111-l",
> -	.ack		= sa1111_ack_irq,
> -	.mask		= sa1111_mask_lowirq,
> -	.unmask		= sa1111_unmask_lowirq,
> -	.retrigger	= sa1111_retrigger_lowirq,
> -	.set_type	= sa1111_type_lowirq,
> -	.set_wake	= sa1111_wake_lowirq,
> +	.irq_ack	= sa1111_ack_irq,
> +	.irq_mask	= sa1111_mask_lowirq,
> +	.irq_unmask	= sa1111_unmask_lowirq,
> +	.irq_retrigger	= sa1111_retrigger_lowirq,
> +	.irq_set_type	= sa1111_type_lowirq,
> +	.irq_set_wake	= sa1111_wake_lowirq,
>  };
>  
> -static void sa1111_mask_highirq(unsigned int irq)
> +static void sa1111_mask_highirq(struct irq_data *d)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
>  	unsigned long ie1;
>  
>  	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
> -	ie1 &= ~SA1111_IRQMASK_HI(irq);
> +	ie1 &= ~SA1111_IRQMASK_HI(d->irq);
>  	sa1111_writel(ie1, mapbase + SA1111_INTEN1);
>  }
>  
> -static void sa1111_unmask_highirq(unsigned int irq)
> +static void sa1111_unmask_highirq(struct irq_data *d)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
>  	unsigned long ie1;
>  
>  	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
> -	ie1 |= SA1111_IRQMASK_HI(irq);
> +	ie1 |= SA1111_IRQMASK_HI(d->irq);
>  	sa1111_writel(ie1, mapbase + SA1111_INTEN1);
>  }
>  
> @@ -369,11 +369,11 @@ static void sa1111_unmask_highirq(unsigned int irq)
>   * be triggered.  In fact, its very difficult, if not impossible to get
>   * INTSET to re-trigger the interrupt.
>   */
> -static int sa1111_retrigger_highirq(unsigned int irq)
> +static int sa1111_retrigger_highirq(struct irq_data *d)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
> -	unsigned int mask = SA1111_IRQMASK_HI(irq);
> +	unsigned int mask = SA1111_IRQMASK_HI(d->irq);
>  	unsigned long ip1;
>  	int i;
>  
> @@ -387,15 +387,15 @@ static int sa1111_retrigger_highirq(unsigned int irq)
>  
>  	if (i == 8)
>  		printk(KERN_ERR "Danger Will Robinson: failed to "
> -			"re-trigger IRQ%d\n", irq);
> +			"re-trigger IRQ%d\n", d->irq);
>  	return i == 8 ? -1 : 0;
>  }
>  
> -static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
> +static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
> -	unsigned int mask = SA1111_IRQMASK_HI(irq);
> +	unsigned int mask = SA1111_IRQMASK_HI(d->irq);
>  	unsigned long ip1;
>  
>  	if (flags == IRQ_TYPE_PROBE)
> @@ -415,11 +415,11 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
>  	return 0;
>  }
>  
> -static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
> +static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
>  {
> -	struct sa1111 *sachip = get_irq_chip_data(irq);
> +	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
>  	void __iomem *mapbase = sachip->base + SA1111_INTC;
> -	unsigned int mask = SA1111_IRQMASK_HI(irq);
> +	unsigned int mask = SA1111_IRQMASK_HI(d->irq);
>  	unsigned long we1;
>  
>  	we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
> @@ -434,12 +434,12 @@ static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
>  
>  static struct irq_chip sa1111_high_chip = {
>  	.name		= "SA1111-h",
> -	.ack		= sa1111_ack_irq,
> -	.mask		= sa1111_mask_highirq,
> -	.unmask		= sa1111_unmask_highirq,
> -	.retrigger	= sa1111_retrigger_highirq,
> -	.set_type	= sa1111_type_highirq,
> -	.set_wake	= sa1111_wake_highirq,
> +	.irq_ack	= sa1111_ack_irq,
> +	.irq_mask	= sa1111_mask_highirq,
> +	.irq_unmask	= sa1111_unmask_highirq,
> +	.irq_retrigger	= sa1111_retrigger_highirq,
> +	.irq_set_type	= sa1111_type_highirq,
> +	.irq_set_wake	= sa1111_wake_highirq,
>  };
>  
>  static void sa1111_setup_irq(struct sa1111 *sachip)
> -- 
> 1.7.1

[PATCH 30/54] ARM: msm: irq_data conversion.

[Daniel Walker]

On Tue, 2010-11-30 at 14:37 +0100, Lennert Buytenhek wrote:
> -static void msm_irq_ack(unsigned int irq)
> +static void msm_irq_ack(struct irq_data *d)
>  {
> -       void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq);
> -       irq = 1 << (irq & 31);
> -       writel(irq, reg);
> +       void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
> +       writel(1 << (d->irq & 31), reg);
>  } 

I haven't really looked over this patch set as a whole, but I was
looking at this section and I noticed that your doing a small clean up
here. If your doing this kind of conversion it's much nicer if you do
any cleanups prior to submitting the conversion. Everyone might agree on
the conversion that your doing, but when you interleave cleanups then
people may be agreeing to things that are hidden inside the conversion..

Daniel

-- 

Sent by a consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

[PATCH 30/54] ARM: msm: irq_data conversion.

[Lennert Buytenhek]

On Tue, Nov 30, 2010 at 02:57:55PM -0800, Daniel Walker wrote:

> > -static void msm_irq_ack(unsigned int irq)
> > +static void msm_irq_ack(struct irq_data *d)
> >  {
> > -       void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq);
> > -       irq = 1 << (irq & 31);
> > -       writel(irq, reg);
> > +       void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
> > +       writel(1 << (d->irq & 31), reg);
> >  } 
> 
> I haven't really looked over this patch set as a whole, but I was
> looking at this section and I noticed that your doing a small clean up
> here. If your doing this kind of conversion it's much nicer if you do
> any cleanups prior to submitting the conversion. Everyone might agree on
> the conversion that your doing, but when you interleave cleanups then
> people may be agreeing to things that are hidden inside the conversion..

Since:

	irq = 1 << (irq & 31);

modifies an argument to the function, I couldn't just change this
into:

	d->irq = 1 << (d->irq & 31);

as that would clobber d->irq permanently.


So my options were to do either:

	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
	writel(1 << (d->irq & 31), reg);

or:

	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
	unsigned int irq = d->irq;
	irq = 1 << (irq & 31);
	writel(irq, reg);


If you prefer the latter, I'd be happy to change the patch to the
latter.

[PATCH 10/54] ARM: bcmring: irq_data conversion.

[Scott Branden]

> -----Original Message-----
> From: Lennert Buytenhek [mailto:buytenh at wantstofly.org]
> Sent: November 30, 2010 5:26 AM
> To: linux-arm-kernel at lists.infradead.org
> Cc: Leo (Hao) Chen; Scott Branden
> Subject: [PATCH 10/54] ARM: bcmring: irq_data conversion.
> 
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Simple change.
Acked-by: Scott Branden <sbranden@broacom.com>
> ---
>  arch/arm/mach-bcmring/irq.c |   42 +++++++++++++++++++++--------------
> -------
>  1 files changed, 21 insertions(+), 21 deletions(-)
> 
> diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c
> index e315263..84dcda0 100644
> --- a/arch/arm/mach-bcmring/irq.c
> +++ b/arch/arm/mach-bcmring/irq.c
> @@ -30,61 +30,61 @@
>  #include <mach/csp/intcHw_reg.h>
>  #include <mach/csp/mm_io.h>
> 
> -static void bcmring_mask_irq0(unsigned int irq)
> +static void bcmring_mask_irq0(struct irq_data *d)
>  {
> -	writel(1 << (irq - IRQ_INTC0_START),
> +	writel(1 << (d->irq - IRQ_INTC0_START),
>  	       MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
>  }
> 
> -static void bcmring_unmask_irq0(unsigned int irq)
> +static void bcmring_unmask_irq0(struct irq_data *d)
>  {
> -	writel(1 << (irq - IRQ_INTC0_START),
> +	writel(1 << (d->irq - IRQ_INTC0_START),
>  	       MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
>  }
> 
> -static void bcmring_mask_irq1(unsigned int irq)
> +static void bcmring_mask_irq1(struct irq_data *d)
>  {
> -	writel(1 << (irq - IRQ_INTC1_START),
> +	writel(1 << (d->irq - IRQ_INTC1_START),
>  	       MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
>  }
> 
> -static void bcmring_unmask_irq1(unsigned int irq)
> +static void bcmring_unmask_irq1(struct irq_data *d)
>  {
> -	writel(1 << (irq - IRQ_INTC1_START),
> +	writel(1 << (d->irq - IRQ_INTC1_START),
>  	       MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
>  }
> 
> -static void bcmring_mask_irq2(unsigned int irq)
> +static void bcmring_mask_irq2(struct irq_data *d)
>  {
> -	writel(1 << (irq - IRQ_SINTC_START),
> +	writel(1 << (d->irq - IRQ_SINTC_START),
>  	       MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
>  }
> 
> -static void bcmring_unmask_irq2(unsigned int irq)
> +static void bcmring_unmask_irq2(struct irq_data *d)
>  {
> -	writel(1 << (irq - IRQ_SINTC_START),
> +	writel(1 << (d->irq - IRQ_SINTC_START),
>  	       MM_IO_BASE_SINTC + INTCHW_INTENABLE);
>  }
> 
>  static struct irq_chip bcmring_irq0_chip = {
>  	.name = "ARM-INTC0",
> -	.ack = bcmring_mask_irq0,
> -	.mask = bcmring_mask_irq0,	/* mask a specific interrupt,
> blocking its delivery. */
> -	.unmask = bcmring_unmask_irq0,	/* unmaks an interrupt */
> +	.irq_ack = bcmring_mask_irq0,
> +	.irq_mask = bcmring_mask_irq0,	/* mask a specific interrupt,
> blocking its delivery. */
> +	.irq_unmask = bcmring_unmask_irq0,	/* unmaks an interrupt */
>  };
> 
>  static struct irq_chip bcmring_irq1_chip = {
>  	.name = "ARM-INTC1",
> -	.ack = bcmring_mask_irq1,
> -	.mask = bcmring_mask_irq1,
> -	.unmask = bcmring_unmask_irq1,
> +	.irq_ack = bcmring_mask_irq1,
> +	.irq_mask = bcmring_mask_irq1,
> +	.irq_unmask = bcmring_unmask_irq1,
>  };
> 
>  static struct irq_chip bcmring_irq2_chip = {
>  	.name = "ARM-SINTC",
> -	.ack = bcmring_mask_irq2,
> -	.mask = bcmring_mask_irq2,
> -	.unmask = bcmring_unmask_irq2,
> +	.irq_ack = bcmring_mask_irq2,
> +	.irq_mask = bcmring_mask_irq2,
> +	.irq_unmask = bcmring_unmask_irq2,
>  };
> 
>  static void vic_init(void __iomem *base, struct irq_chip *chip,
> --
> 1.7.1
> 

[PATCH 30/54] ARM: msm: irq_data conversion.

[Daniel Walker]

On Wed, 2010-12-01 at 01:10 +0100, Lennert Buytenhek wrote:
> On Tue, Nov 30, 2010 at 02:57:55PM -0800, Daniel Walker wrote:
> 
> > > -static void msm_irq_ack(unsigned int irq)
> > > +static void msm_irq_ack(struct irq_data *d)
> > >  {
> > > -       void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq);
> > > -       irq = 1 << (irq & 31);
> > > -       writel(irq, reg);
> > > +       void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
> > > +       writel(1 << (d->irq & 31), reg);
> > >  } 
> > 
> > I haven't really looked over this patch set as a whole, but I was
> > looking at this section and I noticed that your doing a small clean up
> > here. If your doing this kind of conversion it's much nicer if you do
> > any cleanups prior to submitting the conversion. Everyone might agree on
> > the conversion that your doing, but when you interleave cleanups then
> > people may be agreeing to things that are hidden inside the conversion..
> 
> Since:
> 
> 	irq = 1 << (irq & 31);
> 
> modifies an argument to the function, I couldn't just change this
> into:
> 
> 	d->irq = 1 << (d->irq & 31);
> 
> as that would clobber d->irq permanently.
> 
> 
> So my options were to do either:
> 
> 	void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
> 	writel(1 << (d->irq & 31), reg);

Ok, I see .. This one is fine.

Daniel


-- 

Sent by a consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

[PATCH 15/54] ARM: ep93xx: irq_data conversion.

[Lennert Buytenhek]

On Wed, Dec 01, 2010 at 08:33:25AM +1300, Ryan Mallon wrote:

> > -static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
> > +static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
> >  {
> > -	struct irq_desc *desc = irq_desc + irq;
> > -	const int gpio = irq_to_gpio(irq);
> > +	struct irq_desc *desc = irq_desc + d->irq;
> 
> Is this still correct? I haven't followed much of the irq_data
> discussion, but this post (https://patchwork.kernel.org/patch/230221/)
> says that with sparse irq converting irq number to irq_desc is now a
> radix tree lookup.
> 
> I get the impression from the above email that we should be avoiding
> using irq_desc directly in these functions?

You are correct in that this construct is no longer valid with
CONFIG_SPARSE_IRQ.  It should be using irq_to_desc() instead, or
actually, it should not be looking at the irq_desc here at all.

What ep93xx wants to achieve should be possible to achieve by just
calling set_irq_handler() instead of frobbing fields in the irq_desc
directly -- that would work, right?

[PATCH 15/54] ARM: ep93xx: irq_data conversion.

[Ryan Mallon]

On 12/01/2010 01:19 PM, Lennert Buytenhek wrote:
> On Wed, Dec 01, 2010 at 08:33:25AM +1300, Ryan Mallon wrote:
> 
>>> -static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
>>> +static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
>>>  {
>>> -	struct irq_desc *desc = irq_desc + irq;
>>> -	const int gpio = irq_to_gpio(irq);
>>> +	struct irq_desc *desc = irq_desc + d->irq;
>>
>> Is this still correct? I haven't followed much of the irq_data
>> discussion, but this post (https://patchwork.kernel.org/patch/230221/)
>> says that with sparse irq converting irq number to irq_desc is now a
>> radix tree lookup.
>>
>> I get the impression from the above email that we should be avoiding
>> using irq_desc directly in these functions?
> 
> You are correct in that this construct is no longer valid with
> CONFIG_SPARSE_IRQ.  It should be using irq_to_desc() instead, or
> actually, it should not be looking at the irq_desc here at all.
> 
> What ep93xx wants to achieve should be possible to achieve by just
> calling set_irq_handler() instead of frobbing fields in the irq_desc
> directly -- that would work, right?

I think set_irq_handler should be okay. The other way would be to use
irq_to_desc for the lookup.

~Ryan


-- 
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[PATCH 52/54] ARM: plat-orion: irq_data conversion.

[Nicolas Pitre]

On Tue, 30 Nov 2010, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Nicolas Pitre <nico@fluxnic.net>

> ---
>  arch/arm/plat-orion/gpio.c |   37 ++++++++++++++++++-------------------
>  arch/arm/plat-orion/irq.c  |   18 +++++++++---------
>  2 files changed, 27 insertions(+), 28 deletions(-)
> 
> diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
> index e814803..5f35223 100644
> --- a/arch/arm/plat-orion/gpio.c
> +++ b/arch/arm/plat-orion/gpio.c
> @@ -232,20 +232,19 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
>   *        polarity    LEVEL          mask
>   *
>   ****************************************************************************/
> -
> -static void gpio_irq_ack(u32 irq)
> +static void gpio_irq_ack(struct irq_data *d)
>  {
> -	int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
> +	int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
>  	if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
> -		int pin = irq_to_gpio(irq);
> +		int pin = irq_to_gpio(d->irq);
>  		writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin));
>  	}
>  }
>  
> -static void gpio_irq_mask(u32 irq)
> +static void gpio_irq_mask(struct irq_data *d)
>  {
> -	int pin = irq_to_gpio(irq);
> -	int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
> +	int pin = irq_to_gpio(d->irq);
> +	int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
>  	u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
>  		GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
>  	u32 u = readl(reg);
> @@ -253,10 +252,10 @@ static void gpio_irq_mask(u32 irq)
>  	writel(u, reg);
>  }
>  
> -static void gpio_irq_unmask(u32 irq)
> +static void gpio_irq_unmask(struct irq_data *d)
>  {
> -	int pin = irq_to_gpio(irq);
> -	int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
> +	int pin = irq_to_gpio(d->irq);
> +	int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
>  	u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
>  		GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
>  	u32 u = readl(reg);
> @@ -264,20 +263,20 @@ static void gpio_irq_unmask(u32 irq)
>  	writel(u, reg);
>  }
>  
> -static int gpio_irq_set_type(u32 irq, u32 type)
> +static int gpio_irq_set_type(struct irq_data *d, u32 type)
>  {
> -	int pin = irq_to_gpio(irq);
> +	int pin = irq_to_gpio(d->irq);
>  	struct irq_desc *desc;
>  	u32 u;
>  
>  	u = readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31));
>  	if (!u) {
>  		printk(KERN_ERR "orion gpio_irq_set_type failed "
> -				"(irq %d, pin %d).\n", irq, pin);
> +				"(irq %d, pin %d).\n", d->irq, pin);
>  		return -EINVAL;
>  	}
>  
> -	desc = irq_desc + irq;
> +	desc = irq_desc + d->irq;
>  
>  	/*
>  	 * Set edge/level type.
> @@ -287,7 +286,7 @@ static int gpio_irq_set_type(u32 irq, u32 type)
>  	} else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
>  		desc->handle_irq = handle_level_irq;
>  	} else {
> -		printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type);
> +		printk(KERN_ERR "failed to set irq=%d (type=%d)\n", d->irq, type);
>  		return -EINVAL;
>  	}
>  
> @@ -325,10 +324,10 @@ static int gpio_irq_set_type(u32 irq, u32 type)
>  
>  struct irq_chip orion_gpio_irq_chip = {
>  	.name		= "orion_gpio_irq",
> -	.ack		= gpio_irq_ack,
> -	.mask		= gpio_irq_mask,
> -	.unmask		= gpio_irq_unmask,
> -	.set_type	= gpio_irq_set_type,
> +	.irq_ack	= gpio_irq_ack,
> +	.irq_mask	= gpio_irq_mask,
> +	.irq_unmask	= gpio_irq_unmask,
> +	.irq_set_type	= gpio_irq_set_type,
>  };
>  
>  void orion_gpio_irq_handler(int pinoff)
> diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
> index 3f9d34f..7d0c7eb 100644
> --- a/arch/arm/plat-orion/irq.c
> +++ b/arch/arm/plat-orion/irq.c
> @@ -14,31 +14,31 @@
>  #include <linux/io.h>
>  #include <plat/irq.h>
>  
> -static void orion_irq_mask(u32 irq)
> +static void orion_irq_mask(struct irq_data *d)
>  {
> -	void __iomem *maskaddr = get_irq_chip_data(irq);
> +	void __iomem *maskaddr = irq_data_get_irq_chip_data(d);
>  	u32 mask;
>  
>  	mask = readl(maskaddr);
> -	mask &= ~(1 << (irq & 31));
> +	mask &= ~(1 << (d->irq & 31));
>  	writel(mask, maskaddr);
>  }
>  
> -static void orion_irq_unmask(u32 irq)
> +static void orion_irq_unmask(struct irq_data *d)
>  {
> -	void __iomem *maskaddr = get_irq_chip_data(irq);
> +	void __iomem *maskaddr = irq_data_get_irq_chip_data(d);
>  	u32 mask;
>  
>  	mask = readl(maskaddr);
> -	mask |= 1 << (irq & 31);
> +	mask |= 1 << (d->irq & 31);
>  	writel(mask, maskaddr);
>  }
>  
>  static struct irq_chip orion_irq_chip = {
>  	.name		= "orion_irq",
> -	.mask		= orion_irq_mask,
> -	.mask_ack	= orion_irq_mask,
> -	.unmask		= orion_irq_unmask,
> +	.irq_mask	= orion_irq_mask,
> +	.irq_mask_ack	= orion_irq_mask,
> +	.irq_unmask	= orion_irq_unmask,
>  };
>  
>  void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
> -- 
> 1.7.1
> 

[PATCH 13/54] ARM: dove: irq_data conversion.

[Nicolas Pitre]

On Tue, 30 Nov 2010, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Nicolas Pitre <nico@fluxnic.net>

> ---
>  arch/arm/mach-dove/irq.c |   18 +++++++++---------
>  1 files changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
> index 61bfcb3..9317f05 100644
> --- a/arch/arm/mach-dove/irq.c
> +++ b/arch/arm/mach-dove/irq.c
> @@ -36,9 +36,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
>  	}
>  }
>  
> -static void pmu_irq_mask(unsigned int irq)
> +static void pmu_irq_mask(struct irq_data *d)
>  {
> -	int pin = irq_to_pmu(irq);
> +	int pin = irq_to_pmu(d->irq);
>  	u32 u;
>  
>  	u = readl(PMU_INTERRUPT_MASK);
> @@ -46,9 +46,9 @@ static void pmu_irq_mask(unsigned int irq)
>  	writel(u, PMU_INTERRUPT_MASK);
>  }
>  
> -static void pmu_irq_unmask(unsigned int irq)
> +static void pmu_irq_unmask(struct irq_data *d)
>  {
> -	int pin = irq_to_pmu(irq);
> +	int pin = irq_to_pmu(d->irq);
>  	u32 u;
>  
>  	u = readl(PMU_INTERRUPT_MASK);
> @@ -56,9 +56,9 @@ static void pmu_irq_unmask(unsigned int irq)
>  	writel(u, PMU_INTERRUPT_MASK);
>  }
>  
> -static void pmu_irq_ack(unsigned int irq)
> +static void pmu_irq_ack(struct irq_data *d)
>  {
> -	int pin = irq_to_pmu(irq);
> +	int pin = irq_to_pmu(d->irq);
>  	u32 u;
>  
>  	u = ~(1 << (pin & 31));
> @@ -67,9 +67,9 @@ static void pmu_irq_ack(unsigned int irq)
>  
>  static struct irq_chip pmu_irq_chip = {
>  	.name		= "pmu_irq",
> -	.mask		= pmu_irq_mask,
> -	.unmask		= pmu_irq_unmask,
> -	.ack		= pmu_irq_ack,
> +	.irq_mask	= pmu_irq_mask,
> +	.irq_unmask	= pmu_irq_unmask,
> +	.irq_ack	= pmu_irq_ack,
>  };
>  
>  static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
> -- 
> 1.7.1
> 

[PATCH 03/54] ARM: gic: irq_data conversion.

[Abhijeet Dharmapurikar]

Works on msm 8660 surf.

Acked-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>

Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
>  arch/arm/common/gic.c |   62 ++++++++++++++++++++++++------------------------
>  1 files changed, 31 insertions(+), 31 deletions(-)
> 
> diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
> index 772f95f..1118f40 100644
> --- a/arch/arm/common/gic.c
> +++ b/arch/arm/common/gic.c
> @@ -47,57 +47,56 @@ struct gic_chip_data {
>  

[PATCH 48/54] ARM: w90x900: irq_data conversion.

[Wan ZongShun]

2010/11/30 Lennert Buytenhek <buytenh@wantstofly.org>:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
> ?arch/arm/mach-w90x900/irq.c | ? 20 ++++++++++----------
> ?1 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
> index 0ce9d8e..9c35010 100644
> --- a/arch/arm/mach-w90x900/irq.c
> +++ b/arch/arm/mach-w90x900/irq.c
> @@ -92,15 +92,15 @@ static void nuc900_group_enable(struct group_irq *gpirq, int enable)
> ? ? ? ?__raw_writel(regval, REG_AIC_GEN);
> ?}
>
> -static void nuc900_irq_mask(unsigned int irq)
> +static void nuc900_irq_mask(struct irq_data *d)
> ?{
> ? ? ? ?struct group_irq *group_irq;
>
> ? ? ? ?group_irq = NULL;
>
> - ? ? ? __raw_writel(1 << irq, REG_AIC_MDCR);
> + ? ? ? __raw_writel(1 << d->irq, REG_AIC_MDCR);
>
> - ? ? ? switch (irq) {
> + ? ? ? switch (d->irq) {
> ? ? ? ?case IRQ_GROUP0:
> ? ? ? ? ? ? ? ?group_irq = &group_nirq0;
> ? ? ? ? ? ? ? ?break;
> @@ -143,20 +143,20 @@ static void nuc900_irq_mask(unsigned int irq)
> ?* to REG_AIC_EOSCR for ACK
> ?*/
>
> -static void nuc900_irq_ack(unsigned int irq)
> +static void nuc900_irq_ack(struct irq_data *d)
> ?{
> ? ? ? ?__raw_writel(0x01, REG_AIC_EOSCR);
> ?}
>
> -static void nuc900_irq_unmask(unsigned int irq)
> +static void nuc900_irq_unmask(struct irq_data *d)
> ?{
> ? ? ? ?struct group_irq *group_irq;
>
> ? ? ? ?group_irq = NULL;
>
> - ? ? ? __raw_writel(1 << irq, REG_AIC_MECR);
> + ? ? ? __raw_writel(1 << d->irq, REG_AIC_MECR);
>
> - ? ? ? switch (irq) {
> + ? ? ? switch (d->irq) {
> ? ? ? ?case IRQ_GROUP0:
> ? ? ? ? ? ? ? ?group_irq = &group_nirq0;
> ? ? ? ? ? ? ? ?break;
> @@ -195,9 +195,9 @@ static void nuc900_irq_unmask(unsigned int irq)
> ?}
>
> ?static struct irq_chip nuc900_irq_chip = {
> - ? ? ? .ack ? ? ? = nuc900_irq_ack,
> - ? ? ? .mask ? ? ?= nuc900_irq_mask,
> - ? ? ? .unmask ? ?= nuc900_irq_unmask,
> + ? ? ? .irq_ack ? ? ? ?= nuc900_irq_ack,
> + ? ? ? .irq_mask ? ? ? = nuc900_irq_mask,
> + ? ? ? .irq_unmask ? ? = nuc900_irq_unmask,
> ?};
>
> ?void __init nuc900_init_irq(void)
> --
> 1.7.1
>
>

Acked-by: Wan ZongShun <mcuos.com@gmail.com>

Thanks for your patch.

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[PATCH 34/54] ARM: nuc93x: irq_data conversion.

[Wan ZongShun]

2010/11/30 Lennert Buytenhek <buytenh@wantstofly.org>:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
> ?arch/arm/mach-nuc93x/irq.c | ? 16 ++++++++--------
> ?1 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c
> index a7a88ea..1f8a05a 100644
> --- a/arch/arm/mach-nuc93x/irq.c
> +++ b/arch/arm/mach-nuc93x/irq.c
> @@ -25,9 +25,9 @@
> ?#include <mach/hardware.h>
> ?#include <mach/regs-irq.h>
>
> -static void nuc93x_irq_mask(unsigned int irq)
> +static void nuc93x_irq_mask(struct irq_data *d)
> ?{
> - ? ? ? __raw_writel(1 << irq, REG_AIC_MDCR);
> + ? ? ? __raw_writel(1 << d->irq, REG_AIC_MDCR);
> ?}
>
> ?/*
> @@ -35,21 +35,21 @@ static void nuc93x_irq_mask(unsigned int irq)
> ?* to REG_AIC_EOSCR for ACK
> ?*/
>
> -static void nuc93x_irq_ack(unsigned int irq)
> +static void nuc93x_irq_ack(struct irq_data *d)
> ?{
> ? ? ? ?__raw_writel(0x01, REG_AIC_EOSCR);
> ?}
>
> -static void nuc93x_irq_unmask(unsigned int irq)
> +static void nuc93x_irq_unmask(struct irq_data *d)
> ?{
> - ? ? ? __raw_writel(1 << irq, REG_AIC_MECR);
> + ? ? ? __raw_writel(1 << d->irq, REG_AIC_MECR);
>
> ?}
>
> ?static struct irq_chip nuc93x_irq_chip = {
> - ? ? ? .ack ? ? ? = nuc93x_irq_ack,
> - ? ? ? .mask ? ? ?= nuc93x_irq_mask,
> - ? ? ? .unmask ? ?= nuc93x_irq_unmask,
> + ? ? ? .irq_ack ? ? ? ?= nuc93x_irq_ack,
> + ? ? ? .irq_mask ? ? ? = nuc93x_irq_mask,
> + ? ? ? .irq_unmask ? ? = nuc93x_irq_unmask,
> ?};
>
> ?void __init nuc93x_init_irq(void)
> --
> 1.7.1
>
>

Acked-by: Wan ZongShun <mcuos.com@gmail.com>

Thanks for your patch.

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[PATCH 53/54] ARM: plat-spear: irq_data conversion.

[viresh kumar]

On 11/30/2010 07:11 PM, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
>  arch/arm/plat-spear/shirq.c |   22 +++++++++++-----------
>  1 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
> index 2172d69..7818903 100644
> --- a/arch/arm/plat-spear/shirq.c
> +++ b/arch/arm/plat-spear/shirq.c
> @@ -20,10 +20,10 @@
>  struct spear_shirq *shirq;
>  static DEFINE_SPINLOCK(lock);
>  
> -static void shirq_irq_mask(unsigned irq)
> +static void shirq_irq_mask(struct irq_data *d)
>  {
> -	struct spear_shirq *shirq = get_irq_chip_data(irq);
> -	u32 val, id = irq - shirq->dev_config[0].virq;
> +	struct spear_shirq *shirq = irq_data_get_irq_chip_data(d);
> +	u32 val, id = d->irq - shirq->dev_config[0].virq;
>  	unsigned long flags;
>  
>  	if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1)
> @@ -39,10 +39,10 @@ static void shirq_irq_mask(unsigned irq)
>  	spin_unlock_irqrestore(&lock, flags);
>  }
>  
> -static void shirq_irq_unmask(unsigned irq)
> +static void shirq_irq_unmask(struct irq_data *d)
>  {
> -	struct spear_shirq *shirq = get_irq_chip_data(irq);
> -	u32 val, id = irq - shirq->dev_config[0].virq;
> +	struct spear_shirq *shirq = irq_data_get_irq_chip_data(d);
> +	u32 val, id = d->irq - shirq->dev_config[0].virq;
>  	unsigned long flags;
>  
>  	if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1)
> @@ -60,9 +60,9 @@ static void shirq_irq_unmask(unsigned irq)
>  
>  static struct irq_chip shirq_chip = {
>  	.name		= "spear_shirq",
> -	.ack		= shirq_irq_mask,
> -	.mask		= shirq_irq_mask,
> -	.unmask		= shirq_irq_unmask,
> +	.irq_ack	= shirq_irq_mask,
> +	.irq_mask	= shirq_irq_mask,
> +	.irq_unmask	= shirq_irq_unmask,
>  };
>  
>  static void shirq_handler(unsigned irq, struct irq_desc *desc)
> @@ -70,7 +70,7 @@ static void shirq_handler(unsigned irq, struct irq_desc *desc)
>  	u32 i, val, mask;
>  	struct spear_shirq *shirq = get_irq_data(irq);
>  
> -	desc->chip->ack(irq);
> +	desc->irq_data.chip->irq_ack(&desc->irq_data);
>  	while ((val = readl(shirq->regs.base + shirq->regs.status_reg) &
>  				shirq->regs.status_reg_mask)) {
>  		for (i = 0; (i < shirq->dev_count) && val; i++) {
> @@ -92,7 +92,7 @@ static void shirq_handler(unsigned irq, struct irq_desc *desc)
>  			writel(mask, shirq->regs.base + shirq->regs.clear_reg);
>  		}
>  	}
> -	desc->chip->unmask(irq);
> +	desc->irq_data.chip->irq_unmask(&desc->irq_data);
>  }
>  
>  int spear_shirq_register(struct spear_shirq *shirq)

Acked-by: Viresh Kumar <viresh.kumar@st.com>

[PATCH 10/54] ARM: bcmring: irq_data conversion.

[Uwe Kleine-König]

Hi Scott,

On Tue, Nov 30, 2010 at 04:12:53PM -0800, Scott Branden wrote:
> 
> 
> > -----Original Message-----
> > From: Lennert Buytenhek [mailto:buytenh at wantstofly.org]
> > Sent: November 30, 2010 5:26 AM
> > To: linux-arm-kernel at lists.infradead.org
> > Cc: Leo (Hao) Chen; Scott Branden
> > Subject: [PATCH 10/54] ARM: bcmring: irq_data conversion.
> > 
> > Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> Simple change.
> Acked-by: Scott Branden <sbranden@broacom.com>
Compared with the email address you sent your mail from this one misses
a 'd'.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 33/54] ARM: ns9xxx: irq_data conversion.

[Uwe Kleine-König]

On Tue, Nov 30, 2010 at 02:41:04PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>

> ---
>  arch/arm/mach-ns9xxx/board-a9m9750dev.c |   28 ++++++++++++++--------------
>  arch/arm/mach-ns9xxx/irq.c              |   28 ++++++++++++++--------------
>  2 files changed, 28 insertions(+), 28 deletions(-)
> 
> diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
> index b45bb3b..0c0d524 100644
> --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
> +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
> @@ -37,44 +37,44 @@ void __init board_a9m9750dev_map_io(void)
>  		     ARRAY_SIZE(board_a9m9750dev_io_desc));
>  }
>  
> -static void a9m9750dev_fpga_ack_irq(unsigned int irq)
> +static void a9m9750dev_fpga_ack_irq(struct irq_data *d)
>  {
>  	/* nothing */
>  }
>  
> -static void a9m9750dev_fpga_mask_irq(unsigned int irq)
> +static void a9m9750dev_fpga_mask_irq(struct irq_data *d)
>  {
>  	u8 ier;
>  
>  	ier = __raw_readb(FPGA_IER);
>  
> -	ier &= ~(1 << (irq - FPGA_IRQ(0)));
> +	ier &= ~(1 << (d->irq - FPGA_IRQ(0)));
>  
>  	__raw_writeb(ier, FPGA_IER);
>  }
>  
> -static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
> +static void a9m9750dev_fpga_maskack_irq(struct irq_data *d)
>  {
> -	a9m9750dev_fpga_mask_irq(irq);
> -	a9m9750dev_fpga_ack_irq(irq);
> +	a9m9750dev_fpga_mask_irq(d);
> +	a9m9750dev_fpga_ack_irq(d);
>  }
>  
> -static void a9m9750dev_fpga_unmask_irq(unsigned int irq)
> +static void a9m9750dev_fpga_unmask_irq(struct irq_data *d)
>  {
>  	u8 ier;
>  
>  	ier = __raw_readb(FPGA_IER);
>  
> -	ier |= 1 << (irq - FPGA_IRQ(0));
> +	ier |= 1 << (d->irq - FPGA_IRQ(0));
>  
>  	__raw_writeb(ier, FPGA_IER);
>  }
>  
>  static struct irq_chip a9m9750dev_fpga_chip = {
> -	.ack		= a9m9750dev_fpga_ack_irq,
> -	.mask		= a9m9750dev_fpga_mask_irq,
> -	.mask_ack	= a9m9750dev_fpga_maskack_irq,
> -	.unmask		= a9m9750dev_fpga_unmask_irq,
> +	.irq_ack	= a9m9750dev_fpga_ack_irq,
> +	.irq_mask	= a9m9750dev_fpga_mask_irq,
> +	.irq_mask_ack	= a9m9750dev_fpga_maskack_irq,
> +	.irq_unmask	= a9m9750dev_fpga_unmask_irq,
>  };
>  
>  static void a9m9750dev_fpga_demux_handler(unsigned int irq,
> @@ -82,7 +82,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
>  {
>  	u8 stat = __raw_readb(FPGA_ISR);
>  
> -	desc->chip->mask_ack(irq);
> +	desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
>  
>  	while (stat != 0) {
>  		int irqno = fls(stat) - 1;
> @@ -92,7 +92,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
>  		generic_handle_irq(FPGA_IRQ(irqno));
>  	}
>  
> -	desc->chip->unmask(irq);
> +	desc->irq_data.chip->irq_unmask(&desc->irq_data);
>  }
>  
>  void __init board_a9m9750dev_init_irq(void)
> diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
> index 038f24d..389fa5c 100644
> --- a/arch/arm/mach-ns9xxx/irq.c
> +++ b/arch/arm/mach-ns9xxx/irq.c
> @@ -22,40 +22,40 @@
>  #define irq2prio(i) (i)
>  #define prio2irq(p) (p)
>  
> -static void ns9xxx_mask_irq(unsigned int irq)
> +static void ns9xxx_mask_irq(struct irq_data *d)
>  {
>  	/* XXX: better use cpp symbols */
> -	int prio = irq2prio(irq);
> +	int prio = irq2prio(d->irq);
>  	u32 ic = __raw_readl(SYS_IC(prio / 4));
>  	ic &= ~(1 << (7 + 8 * (3 - (prio & 3))));
>  	__raw_writel(ic, SYS_IC(prio / 4));
>  }
>  
> -static void ns9xxx_ack_irq(unsigned int irq)
> +static void ns9xxx_ack_irq(struct irq_data *d)
>  {
>  	__raw_writel(0, SYS_ISRADDR);
>  }
>  
> -static void ns9xxx_maskack_irq(unsigned int irq)
> +static void ns9xxx_maskack_irq(struct irq_data *d)
>  {
> -	ns9xxx_mask_irq(irq);
> -	ns9xxx_ack_irq(irq);
> +	ns9xxx_mask_irq(d);
> +	ns9xxx_ack_irq(d);
>  }
>  
> -static void ns9xxx_unmask_irq(unsigned int irq)
> +static void ns9xxx_unmask_irq(struct irq_data *d)
>  {
>  	/* XXX: better use cpp symbols */
> -	int prio = irq2prio(irq);
> +	int prio = irq2prio(d->irq);
>  	u32 ic = __raw_readl(SYS_IC(prio / 4));
>  	ic |= 1 << (7 + 8 * (3 - (prio & 3)));
>  	__raw_writel(ic, SYS_IC(prio / 4));
>  }
>  
>  static struct irq_chip ns9xxx_chip = {
> -	.ack		= ns9xxx_ack_irq,
> -	.mask		= ns9xxx_mask_irq,
> -	.mask_ack	= ns9xxx_maskack_irq,
> -	.unmask		= ns9xxx_unmask_irq,
> +	.irq_ack	= ns9xxx_ack_irq,
> +	.irq_mask	= ns9xxx_mask_irq,
> +	.irq_mask_ack	= ns9xxx_maskack_irq,
> +	.irq_unmask	= ns9xxx_unmask_irq,
>  };
>  
>  #if 0
> @@ -92,10 +92,10 @@ static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
>  
>  	if (desc->status & IRQ_DISABLED)
>  out_mask:
> -		desc->chip->mask(irq);
> +		desc->irq_data.chip->irq_mask(&desc->irq_data);
>  
>  	/* ack unconditionally to unmask lower prio irqs */
> -	desc->chip->ack(irq);
> +	desc->irq_data.chip->irq_ack(&desc->irq_data);
>  
>  	raw_spin_unlock(&desc->lock);
>  }
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 10/54] ARM: bcmring: irq_data conversion.

[Lennert Buytenhek]

On Wed, Dec 01, 2010 at 09:00:28AM +0100, Uwe Kleine-K?nig wrote:

> > > Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> >
> > Simple change.
> > Acked-by: Scott Branden <sbranden@broacom.com>
>
> Compared with the email address you sent your mail from this one misses
> a 'd'.

I took the liberty of fixing that up, thanks.

[PATCH 30/54] ARM: msm: irq_data conversion.

[Gregory Bean]

On Tue, 30 Nov 2010, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Gregory Bean <gbean@codeaurora.org>

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

[PATCH 40/54] ARM: Samsung SoCs: irq_data conversion.

[Kukjin Kim]

Lennert Buytenhek wrote:
> 
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
>  arch/arm/mach-s3c2410/bast-irq.c         |   22 ++--
>  arch/arm/mach-s3c2412/irq.c              |   50 +++++-----
>  arch/arm/mach-s3c2416/irq.c              |   72 +++++++-------
>  arch/arm/mach-s3c2440/irq.c              |   18 ++--
>  arch/arm/mach-s3c2440/s3c244x-irq.c      |   18 ++--
>  arch/arm/mach-s3c2443/irq.c              |   90 ++++++++--------
>  arch/arm/mach-s3c64xx/irq-eint.c         |   34 +++---
>  arch/arm/mach-s5pv310/irq-combiner.c     |   26 +++--
>  arch/arm/mach-s5pv310/irq-eint.c         |   55 +++++-----
>  arch/arm/plat-s3c24xx/include/plat/irq.h |    4 +-
>  arch/arm/plat-s3c24xx/irq-pm.c           |    9 +-
>  arch/arm/plat-s3c24xx/irq.c              |  170
+++++++++++++++-------------
> --
>  arch/arm/plat-s5p/irq-eint.c             |   84 ++++++++--------
>  arch/arm/plat-s5p/irq-gpioint.c          |   50 +++++-----
>  arch/arm/plat-s5p/irq-pm.c               |    6 +-
>  arch/arm/plat-samsung/include/plat/pm.h  |    4 +-
>  arch/arm/plat-samsung/irq-uart.c         |   44 ++++----
>  arch/arm/plat-samsung/irq-vic-timer.c    |   22 ++--
>  arch/arm/plat-samsung/pm.c               |    7 +-
>  19 files changed, 396 insertions(+), 389 deletions(-)

Hi Lennert,

(Added Mark Brown in Cc)

Looks ok to me but there are some comments.

Firstly, how about to separate this to regarding S3C24XX(mach-s3c24xx and
plat-s3c24xx), S5P(mach-s5pxxxx and plat-s5p) and plat-samsung?
(Actually, already applied S3C64XX changes so that we can drop that in your
patch.)

As you know, I already applied some changes which is from Mark Brown in my
tree.
You can find that in
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
#for-next

So could you please re-work this based on that?

> 
> diff --git a/arch/arm/mach-s3c2410/bast-irq.c
b/arch/arm/mach-s3c2410/bast-
> irq.c
> index 217b102..a22a8a0 100644
> --- a/arch/arm/mach-s3c2410/bast-irq.c
> +++ b/arch/arm/mach-s3c2410/bast-irq.c
> @@ -75,38 +75,38 @@ static unsigned char bast_pc104_irqmasks[] = {
>  static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };
> 
>  static void
> -bast_pc104_mask(unsigned int irqno)
> +bast_pc104_mask(struct irq_data *d)
>  {
>  	unsigned long temp;
> 
>  	temp = __raw_readb(BAST_VA_PC104_IRQMASK);
> -	temp &= ~bast_pc104_irqmasks[irqno];
> +	temp &= ~bast_pc104_irqmasks[d->irq];
>  	__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
>  }
> 
>  static void
> -bast_pc104_maskack(unsigned int irqno)
> +bast_pc104_maskack(struct irq_data *d)
>  {
>  	struct irq_desc *desc = irq_desc + IRQ_ISA;
> 
> -	bast_pc104_mask(irqno);
> -	desc->chip->ack(IRQ_ISA);
> +	bast_pc104_mask(d);
> +	desc->irq_data.chip->irq_ack(&desc->irq_data);
>  }
> 
>  static void
> -bast_pc104_unmask(unsigned int irqno)
> +bast_pc104_unmask(struct irq_data *d)
>  {
>  	unsigned long temp;
> 
>  	temp = __raw_readb(BAST_VA_PC104_IRQMASK);
> -	temp |= bast_pc104_irqmasks[irqno];
> +	temp |= bast_pc104_irqmasks[d->irq];
>  	__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
>  }
> 
>  static struct irq_chip  bast_pc104_chip = {
> -	.mask	     = bast_pc104_mask,
> -	.unmask	     = bast_pc104_unmask,
> -	.ack	     = bast_pc104_maskack
> +	.irq_mask	= bast_pc104_mask,
> +	.irq_unmask     = bast_pc104_unmask,
                   ^^^^
Tab is better instead of white space.

> +	.irq_ack	= bast_pc104_maskack
>  };
> 
>  static void
> @@ -123,7 +123,7 @@ bast_irq_pc104_demux(unsigned int irq,
>  		/* ack if we get an irq with nothing (ie, startup) */
> 
>  		desc = irq_desc + IRQ_ISA;
> -		desc->chip->ack(IRQ_ISA);
> +		desc->irq_data.chip->irq_ack(&desc->irq_data);
>  	} else {
>  		/* handle the IRQ */
> 
> diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
> index 6000ca9..b8b86c3 100644
> --- a/arch/arm/mach-s3c2412/irq.c
> +++ b/arch/arm/mach-s3c2412/irq.c
> @@ -49,9 +49,9 @@
>  */
> 
>  static void
> -s3c2412_irq_mask(unsigned int irqno)
> +s3c2412_irq_mask(struct irq_data *d)
>  {
> -	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
> +	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
>  	unsigned long mask;
> 
>  	mask = __raw_readl(S3C2410_INTMSK);
> @@ -62,9 +62,9 @@ s3c2412_irq_mask(unsigned int irqno)
>  }
> 
>  static inline void
> -s3c2412_irq_ack(unsigned int irqno)
> +s3c2412_irq_ack(struct irq_data *d)
>  {
> -	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
> +	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
> 
>  	__raw_writel(bitval, S3C2412_EINTPEND);
>  	__raw_writel(bitval, S3C2410_SRCPND);
> @@ -72,9 +72,9 @@ s3c2412_irq_ack(unsigned int irqno)
>  }
> 
>  static inline void
> -s3c2412_irq_maskack(unsigned int irqno)
> +s3c2412_irq_maskack(struct irq_data *d)
>  {
> -	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
> +	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
>  	unsigned long mask;
> 
>  	mask = __raw_readl(S3C2410_INTMSK);
> @@ -89,9 +89,9 @@ s3c2412_irq_maskack(unsigned int irqno)
>  }
> 
>  static void
> -s3c2412_irq_unmask(unsigned int irqno)
> +s3c2412_irq_unmask(struct irq_data *d)
>  {
> -	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
> +	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
>  	unsigned long mask;
> 
>  	mask = __raw_readl(S3C2412_EINTMASK);
> @@ -102,11 +102,11 @@ s3c2412_irq_unmask(unsigned int irqno)
>  }
> 
>  static struct irq_chip s3c2412_irq_eint0t4 = {
> -	.ack	   = s3c2412_irq_ack,
> -	.mask	   = s3c2412_irq_mask,
> -	.unmask	   = s3c2412_irq_unmask,
> -	.set_wake  = s3c_irq_wake,
> -	.set_type  = s3c_irqext_type,
> +	.irq_ack	= s3c2412_irq_ack,
> +	.irq_mask	= s3c2412_irq_mask,
> +	.irq_unmask	= s3c2412_irq_unmask,
> +	.irq_set_wake   = s3c_irq_wake,
                    ^^^
Same.

> +	.irq_set_type   = s3c_irqext_type,
                     ^^^
Same.

>  };
> 
>  #define INTBIT(x)	(1 << ((x) - S3C2410_IRQSUB(0)))
> @@ -132,29 +132,29 @@ static void s3c2412_irq_demux_cfsdi(unsigned int
irq,
> struct irq_desc *desc)
>  #define INTMSK_CFSDI	(1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
>  #define SUBMSK_CFSDI	INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF)
> 
> -static void s3c2412_irq_cfsdi_mask(unsigned int irqno)
> +static void s3c2412_irq_cfsdi_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
> +	s3c_irqsub_mask(d->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
>  }
> 
> -static void s3c2412_irq_cfsdi_unmask(unsigned int irqno)
> +static void s3c2412_irq_cfsdi_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_CFSDI);
> +	s3c_irqsub_unmask(d->irq, INTMSK_CFSDI);
>  }
> 
> -static void s3c2412_irq_cfsdi_ack(unsigned int irqno)
> +static void s3c2412_irq_cfsdi_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
> +	s3c_irqsub_maskack(d->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
>  }
> 
>  static struct irq_chip s3c2412_irq_cfsdi = {
>  	.name		= "s3c2412-cfsdi",
> -	.ack		= s3c2412_irq_cfsdi_ack,
> -	.mask		= s3c2412_irq_cfsdi_mask,
> -	.unmask		= s3c2412_irq_cfsdi_unmask,
> +	.irq_ack	= s3c2412_irq_cfsdi_ack,
> +	.irq_mask	= s3c2412_irq_cfsdi_mask,
> +	.irq_unmask	= s3c2412_irq_cfsdi_unmask,
>  };
> 
> -static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
> +static int s3c2412_irq_rtc_wake(struct irq_data *d, unsigned int state)
>  {
>  	unsigned long pwrcfg;
> 
> @@ -165,7 +165,7 @@ static int s3c2412_irq_rtc_wake(unsigned int irqno,
> unsigned int state)
>  		pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ;
>  	__raw_writel(pwrcfg, S3C2412_PWRCFG);
> 
> -	return s3c_irq_chip.set_wake(irqno, state);
> +	return s3c_irq_chip.irq_set_wake(d, state);
>  }
> 
>  static struct irq_chip s3c2412_irq_rtc_chip;
> @@ -193,7 +193,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
>  	/* change RTC IRQ's set wake method */
> 
>  	s3c2412_irq_rtc_chip = s3c_irq_chip;
> -	s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake;
> +	s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake;
> 
>  	set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
> 
> diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c
> index 00174da..6268d2c 100644
> --- a/arch/arm/mach-s3c2416/irq.c
> +++ b/arch/arm/mach-s3c2416/irq.c
> @@ -77,25 +77,25 @@ static void s3c2416_irq_demux_wdtac97(unsigned int
irq,
> struct irq_desc *desc)
>  #define INTMSK_WDTAC97	(1UL << (IRQ_WDT - IRQ_EINT0))
>  #define SUBMSK_WDTAC97	INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
> 
> -static void s3c2416_irq_wdtac97_mask(unsigned int irqno)
> +static void s3c2416_irq_wdtac97_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
> +	s3c_irqsub_mask(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
>  }
> 
> -static void s3c2416_irq_wdtac97_unmask(unsigned int irqno)
> +static void s3c2416_irq_wdtac97_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
> +	s3c_irqsub_unmask(d->irq, INTMSK_WDTAC97);
>  }
> 
> -static void s3c2416_irq_wdtac97_ack(unsigned int irqno)
> +static void s3c2416_irq_wdtac97_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
> +	s3c_irqsub_maskack(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
>  }
> 
>  static struct irq_chip s3c2416_irq_wdtac97 = {
> -	.mask	    = s3c2416_irq_wdtac97_mask,
> -	.unmask	    = s3c2416_irq_wdtac97_unmask,
> -	.ack	    = s3c2416_irq_wdtac97_ack,
> +	.irq_mask	= s3c2416_irq_wdtac97_mask,
> +	.irq_unmask	= s3c2416_irq_wdtac97_unmask,
> +	.irq_ack	= s3c2416_irq_wdtac97_ack,
>  };
> 
> 
> @@ -109,25 +109,25 @@ static void s3c2416_irq_demux_lcd(unsigned int irq,
> struct irq_desc *desc)
>  #define INTMSK_LCD	(1UL << (IRQ_LCD - IRQ_EINT0))
>  #define SUBMSK_LCD	INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
> 
> -static void s3c2416_irq_lcd_mask(unsigned int irqno)
> +static void s3c2416_irq_lcd_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
> +	s3c_irqsub_mask(d->irq, INTMSK_LCD, SUBMSK_LCD);
>  }
> 
> -static void s3c2416_irq_lcd_unmask(unsigned int irqno)
> +static void s3c2416_irq_lcd_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_LCD);
> +	s3c_irqsub_unmask(d->irq, INTMSK_LCD);
>  }
> 
> -static void s3c2416_irq_lcd_ack(unsigned int irqno)
> +static void s3c2416_irq_lcd_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
> +	s3c_irqsub_maskack(d->irq, INTMSK_LCD, SUBMSK_LCD);
>  }
> 
>  static struct irq_chip s3c2416_irq_lcd = {
> -	.mask	    = s3c2416_irq_lcd_mask,
> -	.unmask	    = s3c2416_irq_lcd_unmask,
> -	.ack	    = s3c2416_irq_lcd_ack,
> +	.irq_mask	= s3c2416_irq_lcd_mask,
> +	.irq_unmask	= s3c2416_irq_lcd_unmask,
> +	.irq_ack	= s3c2416_irq_lcd_ack,
>  };
> 
> 
> @@ -142,25 +142,25 @@ static void s3c2416_irq_demux_dma(unsigned int irq,
> struct irq_desc *desc)
>  #define SUBMSK_DMA	INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
> 
> 

If possible, please remove useless empty line.
As you know, just one empty line is enough :-)

> -static void s3c2416_irq_dma_mask(unsigned int irqno)
> +static void s3c2416_irq_dma_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
> +	s3c_irqsub_mask(d->irq, INTMSK_DMA, SUBMSK_DMA);
>  }
> 
> -static void s3c2416_irq_dma_unmask(unsigned int irqno)
> +static void s3c2416_irq_dma_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_DMA);
> +	s3c_irqsub_unmask(d->irq, INTMSK_DMA);
>  }
> 
> -static void s3c2416_irq_dma_ack(unsigned int irqno)
> +static void s3c2416_irq_dma_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
> +	s3c_irqsub_maskack(d->irq, INTMSK_DMA, SUBMSK_DMA);
>  }
> 
>  static struct irq_chip s3c2416_irq_dma = {
> -	.mask	    = s3c2416_irq_dma_mask,
> -	.unmask	    = s3c2416_irq_dma_unmask,
> -	.ack	    = s3c2416_irq_dma_ack,
> +	.irq_mask	= s3c2416_irq_dma_mask,
> +	.irq_unmask	= s3c2416_irq_dma_unmask,
> +	.irq_ack	= s3c2416_irq_dma_ack,
>  };
> 
> 

Same.

> @@ -174,25 +174,25 @@ static void s3c2416_irq_demux_uart3(unsigned int
irq,
> struct irq_desc *desc)
>  #define INTMSK_UART3	(1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
>  #define SUBMSK_UART3	(0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
> 
> -static void s3c2416_irq_uart3_mask(unsigned int irqno)
> +static void s3c2416_irq_uart3_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
> +	s3c_irqsub_mask(d->irq, INTMSK_UART3, SUBMSK_UART3);
>  }
> 
> -static void s3c2416_irq_uart3_unmask(unsigned int irqno)
> +static void s3c2416_irq_uart3_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_UART3);
> +	s3c_irqsub_unmask(d->irq, INTMSK_UART3);
>  }
> 
> -static void s3c2416_irq_uart3_ack(unsigned int irqno)
> +static void s3c2416_irq_uart3_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
> +	s3c_irqsub_maskack(d->irq, INTMSK_UART3, SUBMSK_UART3);
>  }
> 
>  static struct irq_chip s3c2416_irq_uart3 = {
> -	.mask	    = s3c2416_irq_uart3_mask,
> -	.unmask	    = s3c2416_irq_uart3_unmask,
> -	.ack	    = s3c2416_irq_uart3_ack,
> +	.irq_mask	= s3c2416_irq_uart3_mask,
> +	.irq_unmask	= s3c2416_irq_uart3_unmask,
> +	.irq_ack	= s3c2416_irq_uart3_ack,
>  };
> 
> 

Same.

> diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
> index 0c049b9..9af46d5 100644
> --- a/arch/arm/mach-s3c2440/irq.c
> +++ b/arch/arm/mach-s3c2440/irq.c
> @@ -69,27 +69,27 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
>  #define INTMSK_WDT	 (1UL << (IRQ_WDT - IRQ_EINT0))
> 
>  static void
> -s3c_irq_wdtac97_mask(unsigned int irqno)
> +s3c_irq_wdtac97_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
> +	s3c_irqsub_mask(d->irq, INTMSK_WDT, 3<<13);
>  }
> 
>  static void
> -s3c_irq_wdtac97_unmask(unsigned int irqno)
> +s3c_irq_wdtac97_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_WDT);
> +	s3c_irqsub_unmask(d->irq, INTMSK_WDT);
>  }
> 
>  static void
> -s3c_irq_wdtac97_ack(unsigned int irqno)
> +s3c_irq_wdtac97_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
> +	s3c_irqsub_maskack(d->irq, INTMSK_WDT, 3<<13);
>  }
> 
>  static struct irq_chip s3c_irq_wdtac97 = {
> -	.mask	    = s3c_irq_wdtac97_mask,
> -	.unmask	    = s3c_irq_wdtac97_unmask,
> -	.ack	    = s3c_irq_wdtac97_ack,
> +	.irq_mask	= s3c_irq_wdtac97_mask,
> +	.irq_unmask	= s3c_irq_wdtac97_unmask,
> +	.irq_ack	= s3c_irq_wdtac97_ack,
>  };
> 
>  static int s3c2440_irq_add(struct sys_device *sysdev)
> diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-
> s3c2440/s3c244x-irq.c
> index a75c0c2..3878c0a 100644
> --- a/arch/arm/mach-s3c2440/s3c244x-irq.c
> +++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
> @@ -68,27 +68,27 @@ static void s3c_irq_demux_cam(unsigned int irq,
>  #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
> 
>  static void
> -s3c_irq_cam_mask(unsigned int irqno)
> +s3c_irq_cam_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
> +	s3c_irqsub_mask(d->irq, INTMSK_CAM, 3<<11);

3 << 11
Need to add blank around "<<"

>  }
> 
>  static void
> -s3c_irq_cam_unmask(unsigned int irqno)
> +s3c_irq_cam_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_CAM);
> +	s3c_irqsub_unmask(d->irq, INTMSK_CAM);
>  }
> 
>  static void
> -s3c_irq_cam_ack(unsigned int irqno)
> +s3c_irq_cam_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
> +	s3c_irqsub_maskack(d->irq, INTMSK_CAM, 3<<11);
>  }
> 
>  static struct irq_chip s3c_irq_cam = {
> -	.mask	    = s3c_irq_cam_mask,
> -	.unmask	    = s3c_irq_cam_unmask,
> -	.ack	    = s3c_irq_cam_ack,
> +	.irq_mask	= s3c_irq_cam_mask,
> +	.irq_unmask	= s3c_irq_cam_unmask,
> +	.irq_ack	= s3c_irq_cam_ack,
>  };
> 
>  static int s3c244x_irq_add(struct sys_device *sysdev)
> diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
> index 8934247..74b49f4 100644
> --- a/arch/arm/mach-s3c2443/irq.c
> +++ b/arch/arm/mach-s3c2443/irq.c
> @@ -75,25 +75,25 @@ static void s3c2443_irq_demux_wdtac97(unsigned int
irq,
> struct irq_desc *desc)
>  #define INTMSK_WDTAC97	(1UL << (IRQ_WDT - IRQ_EINT0))
>  #define SUBMSK_WDTAC97	INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
> 
> -static void s3c2443_irq_wdtac97_mask(unsigned int irqno)
> +static void s3c2443_irq_wdtac97_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
> +	s3c_irqsub_mask(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
>  }
> 
> -static void s3c2443_irq_wdtac97_unmask(unsigned int irqno)
> +static void s3c2443_irq_wdtac97_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
> +	s3c_irqsub_unmask(d->irq, INTMSK_WDTAC97);
>  }
> 
> -static void s3c2443_irq_wdtac97_ack(unsigned int irqno)
> +static void s3c2443_irq_wdtac97_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
> +	s3c_irqsub_maskack(d->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
>  }
> 
>  static struct irq_chip s3c2443_irq_wdtac97 = {
> -	.mask	    = s3c2443_irq_wdtac97_mask,
> -	.unmask	    = s3c2443_irq_wdtac97_unmask,
> -	.ack	    = s3c2443_irq_wdtac97_ack,
> +	.irq_mask	= s3c2443_irq_wdtac97_mask,
> +	.irq_unmask	= s3c2443_irq_wdtac97_unmask,
> +	.irq_ack	= s3c2443_irq_wdtac97_ack,
>  };
> 
> 

Same.

> @@ -107,25 +107,25 @@ static void s3c2443_irq_demux_lcd(unsigned int irq,
> struct irq_desc *desc)
>  #define INTMSK_LCD	(1UL << (IRQ_LCD - IRQ_EINT0))
>  #define SUBMSK_LCD	INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
> 
> -static void s3c2443_irq_lcd_mask(unsigned int irqno)
> +static void s3c2443_irq_lcd_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
> +	s3c_irqsub_mask(d->irq, INTMSK_LCD, SUBMSK_LCD);
>  }
> 
> -static void s3c2443_irq_lcd_unmask(unsigned int irqno)
> +static void s3c2443_irq_lcd_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_LCD);
> +	s3c_irqsub_unmask(d->irq, INTMSK_LCD);
>  }
> 
> -static void s3c2443_irq_lcd_ack(unsigned int irqno)
> +static void s3c2443_irq_lcd_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
> +	s3c_irqsub_maskack(d->irq, INTMSK_LCD, SUBMSK_LCD);
>  }
> 
>  static struct irq_chip s3c2443_irq_lcd = {
> -	.mask	    = s3c2443_irq_lcd_mask,
> -	.unmask	    = s3c2443_irq_lcd_unmask,
> -	.ack	    = s3c2443_irq_lcd_ack,
> +	.irq_mask	= s3c2443_irq_lcd_mask,
> +	.irq_unmask	= s3c2443_irq_lcd_unmask,
> +	.irq_ack	= s3c2443_irq_lcd_ack,
>  };
> 
> 

Same...please remove useless empty line.

> @@ -140,25 +140,25 @@ static void s3c2443_irq_demux_dma(unsigned int irq,
> struct irq_desc *desc)
>  #define SUBMSK_DMA	INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
> 
> 
> -static void s3c2443_irq_dma_mask(unsigned int irqno)
> +static void s3c2443_irq_dma_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
> +	s3c_irqsub_mask(d->irq, INTMSK_DMA, SUBMSK_DMA);
>  }
> 
> -static void s3c2443_irq_dma_unmask(unsigned int irqno)
> +static void s3c2443_irq_dma_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_DMA);
> +	s3c_irqsub_unmask(d->irq, INTMSK_DMA);
>  }
> 
> -static void s3c2443_irq_dma_ack(unsigned int irqno)
> +static void s3c2443_irq_dma_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
> +	s3c_irqsub_maskack(d->irq, INTMSK_DMA, SUBMSK_DMA);
>  }
> 
>  static struct irq_chip s3c2443_irq_dma = {
> -	.mask	    = s3c2443_irq_dma_mask,
> -	.unmask	    = s3c2443_irq_dma_unmask,
> -	.ack	    = s3c2443_irq_dma_ack,
> +	.irq_mask	= s3c2443_irq_dma_mask,
> +	.irq_unmask	= s3c2443_irq_dma_unmask,
> +	.irq_ack	= s3c2443_irq_dma_ack,
>  };
> 
> 

Same.

> @@ -172,25 +172,25 @@ static void s3c2443_irq_demux_uart3(unsigned int
irq,
> struct irq_desc *desc)
>  #define INTMSK_UART3	(1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
>  #define SUBMSK_UART3	(0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
> 
> -static void s3c2443_irq_uart3_mask(unsigned int irqno)
> +static void s3c2443_irq_uart3_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
> +	s3c_irqsub_mask(d->irq, INTMSK_UART3, SUBMSK_UART3);
>  }
> 
> -static void s3c2443_irq_uart3_unmask(unsigned int irqno)
> +static void s3c2443_irq_uart3_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_UART3);
> +	s3c_irqsub_unmask(d->irq, INTMSK_UART3);
>  }
> 
> -static void s3c2443_irq_uart3_ack(unsigned int irqno)
> +static void s3c2443_irq_uart3_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
> +	s3c_irqsub_maskack(d->irq, INTMSK_UART3, SUBMSK_UART3);
>  }
> 
>  static struct irq_chip s3c2443_irq_uart3 = {
> -	.mask	    = s3c2443_irq_uart3_mask,
> -	.unmask	    = s3c2443_irq_uart3_unmask,
> -	.ack	    = s3c2443_irq_uart3_ack,
> +	.irq_mask	= s3c2443_irq_uart3_mask,
> +	.irq_unmask	= s3c2443_irq_uart3_unmask,
> +	.irq_ack	= s3c2443_irq_uart3_ack,
>  };
> 
> 
Same.

> @@ -204,25 +204,25 @@ static void s3c2443_irq_demux_cam(unsigned int irq,
> struct irq_desc *desc)
>  #define INTMSK_CAM	(1UL << (IRQ_CAM - IRQ_EINT0))
>  #define SUBMSK_CAM	INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
> 
> -static void s3c2443_irq_cam_mask(unsigned int irqno)
> +static void s3c2443_irq_cam_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_CAM, SUBMSK_CAM);
> +	s3c_irqsub_mask(d->irq, INTMSK_CAM, SUBMSK_CAM);
>  }
> 
> -static void s3c2443_irq_cam_unmask(unsigned int irqno)
> +static void s3c2443_irq_cam_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_CAM);
> +	s3c_irqsub_unmask(d->irq, INTMSK_CAM);
>  }
> 
> -static void s3c2443_irq_cam_ack(unsigned int irqno)
> +static void s3c2443_irq_cam_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_CAM, SUBMSK_CAM);
> +	s3c_irqsub_maskack(d->irq, INTMSK_CAM, SUBMSK_CAM);
>  }
> 
>  static struct irq_chip s3c2443_irq_cam = {
> -	.mask	    = s3c2443_irq_cam_mask,
> -	.unmask	    = s3c2443_irq_cam_unmask,
> -	.ack	    = s3c2443_irq_cam_ack,
> +	.irq_mask	= s3c2443_irq_cam_mask,
> +	.irq_unmask	= s3c2443_irq_cam_unmask,
> +	.irq_ack	= s3c2443_irq_cam_ack,
>  };
> 
>  /* IRQ initialisation code */
> diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-
> eint.c
> index 5682d6a..27961d3 100644
> --- a/arch/arm/mach-s3c64xx/irq-eint.c
> +++ b/arch/arm/mach-s3c64xx/irq-eint.c

As you know, already applied this so we can drop this file in your patch.

> @@ -32,39 +32,39 @@
>  #define eint_offset(irq)	((irq) - IRQ_EINT(0))
>  #define eint_irq_to_bit(irq)	(1 << eint_offset(irq))
> 
> -static inline void s3c_irq_eint_mask(unsigned int irq)
> +static inline void s3c_irq_eint_mask(struct irq_data *d)
>  {
>  	u32 mask;
> 
>  	mask = __raw_readl(S3C64XX_EINT0MASK);
> -	mask |= eint_irq_to_bit(irq);
> +	mask |= eint_irq_to_bit(d->irq);
>  	__raw_writel(mask, S3C64XX_EINT0MASK);
>  }
> 
> -static void s3c_irq_eint_unmask(unsigned int irq)
> +static void s3c_irq_eint_unmask(struct irq_data *d)
>  {
>  	u32 mask;
> 
>  	mask = __raw_readl(S3C64XX_EINT0MASK);
> -	mask &= ~eint_irq_to_bit(irq);
> +	mask &= ~eint_irq_to_bit(d->irq);
>  	__raw_writel(mask, S3C64XX_EINT0MASK);
>  }
> 
> -static inline void s3c_irq_eint_ack(unsigned int irq)
> +static inline void s3c_irq_eint_ack(struct irq_data *d)
>  {
> -	__raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND);
> +	__raw_writel(eint_irq_to_bit(d->irq), S3C64XX_EINT0PEND);
>  }
> 
> -static void s3c_irq_eint_maskack(unsigned int irq)
> +static void s3c_irq_eint_maskack(struct irq_data *d)
>  {
>  	/* compiler should in-line these */
> -	s3c_irq_eint_mask(irq);
> -	s3c_irq_eint_ack(irq);
> +	s3c_irq_eint_mask(d);
> +	s3c_irq_eint_ack(d);
>  }
> 
> -static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
> +static int s3c_irq_eint_set_type(struct irq_data *d, unsigned int type)
>  {
> -	int offs = eint_offset(irq);
> +	int offs = eint_offset(d->irq);
>  	int pin, pin_val;
>  	int shift;
>  	u32 ctrl, mask;
> @@ -140,12 +140,12 @@ static int s3c_irq_eint_set_type(unsigned int irq,
> unsigned int type)
> 
>  static struct irq_chip s3c_irq_eint = {
>  	.name		= "s3c-eint",
> -	.mask		= s3c_irq_eint_mask,
> -	.unmask		= s3c_irq_eint_unmask,
> -	.mask_ack	= s3c_irq_eint_maskack,
> -	.ack		= s3c_irq_eint_ack,
> -	.set_type	= s3c_irq_eint_set_type,
> -	.set_wake	= s3c_irqext_wake,
> +	.irq_mask	= s3c_irq_eint_mask,
> +	.irq_unmask	= s3c_irq_eint_unmask,
> +	.irq_mask_ack	= s3c_irq_eint_maskack,
> +	.irq_ack	= s3c_irq_eint_ack,
> +	.irq_set_type	= s3c_irq_eint_set_type,
> +	.irq_set_wake	= s3c_irqext_wake,
>  };
> 
>  /* s3c_irq_demux_eint
> diff --git a/arch/arm/mach-s5pv310/irq-combiner.c b/arch/arm/mach-
> s5pv310/irq-combiner.c
> index c3f88c3..8ef0c38 100644
> --- a/arch/arm/mach-s5pv310/irq-combiner.c
> +++ b/arch/arm/mach-s5pv310/irq-combiner.c
> @@ -29,24 +29,26 @@ struct combiner_chip_data {
> 
>  static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
> 
> -static inline void __iomem *combiner_base(unsigned int irq)
> +static inline void __iomem *combiner_base(struct irq_data *d)
>  {
> -	struct combiner_chip_data *combiner_data = get_irq_chip_data(irq);
> +	struct combiner_chip_data *combiner_data =
> +		irq_data_get_irq_chip_data(d);
> +
>  	return combiner_data->base;
>  }
> 
> -static void combiner_mask_irq(unsigned int irq)
> +static void combiner_mask_irq(struct irq_data *d)
>  {
> -	u32 mask = 1 << (irq % 32);
> +	u32 mask = 1 << (d->irq % 32);
> 
> -	__raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_CLEAR);
> +	__raw_writel(mask, combiner_base(d) + COMBINER_ENABLE_CLEAR);
>  }
> 
> -static void combiner_unmask_irq(unsigned int irq)
> +static void combiner_unmask_irq(struct irq_data *d)
>  {
> -	u32 mask = 1 << (irq % 32);
> +	u32 mask = 1 << (d->irq % 32);
> 
> -	__raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_SET);
> +	__raw_writel(mask, combiner_base(d) + COMBINER_ENABLE_SET);
>  }
> 
>  static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc
> *desc)
> @@ -57,7 +59,7 @@ static void combiner_handle_cascade_irq(unsigned int
irq,
> struct irq_desc *desc)
>  	unsigned long status;
> 
>  	/* primary controller ack'ing */
> -	chip->ack(irq);
> +	chip->irq_ack(&desc->irq_data);
> 
>  	spin_lock(&irq_controller_lock);
>  	status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
> @@ -76,13 +78,13 @@ static void combiner_handle_cascade_irq(unsigned int
irq,
> struct irq_desc *desc)
> 
>   out:
>  	/* primary controller unmasking */
> -	chip->unmask(irq);
> +	chip->irq_unmask(&desc->irq_data);
>  }
> 
>  static struct irq_chip combiner_chip = {
>  	.name		= "COMBINER",
> -	.mask		= combiner_mask_irq,
> -	.unmask		= combiner_unmask_irq,
> +	.irq_mask	= combiner_mask_irq,
> +	.irq_unmask	= combiner_unmask_irq,
>  };
> 
>  void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int
irq)
> diff --git a/arch/arm/mach-s5pv310/irq-eint.c b/arch/arm/mach-s5pv310/irq-
> eint.c
> index 5877503..ed26db8 100644
> --- a/arch/arm/mach-s5pv310/irq-eint.c
> +++ b/arch/arm/mach-s5pv310/irq-eint.c
> @@ -48,42 +48,43 @@ static unsigned int s5pv310_get_irq_nr(unsigned int
> number)
>  	return ret;
>  }
> 
> -static inline void s5pv310_irq_eint_mask(unsigned int irq)
> +static inline void s5pv310_irq_eint_mask(struct irq_data *d)
>  {
>  	u32 mask;
> 
>  	spin_lock(&eint_lock);
> -	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
> -	mask |= eint_irq_to_bit(irq);
> -	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
> +	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
> +	mask |= eint_irq_to_bit(d->irq);
> +	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
>  	spin_unlock(&eint_lock);
>  }
> 
> -static void s5pv310_irq_eint_unmask(unsigned int irq)
> +static void s5pv310_irq_eint_unmask(struct irq_data *d)
>  {
>  	u32 mask;
> 
>  	spin_lock(&eint_lock);
> -	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
> -	mask &= ~(eint_irq_to_bit(irq));
> -	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
> +	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
> +	mask &= ~(eint_irq_to_bit(d->irq));
> +	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
>  	spin_unlock(&eint_lock);
>  }
> 
> -static inline void s5pv310_irq_eint_ack(unsigned int irq)
> +static inline void s5pv310_irq_eint_ack(struct irq_data *d)
>  {
> -	__raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq)));
> +	__raw_writel(eint_irq_to_bit(d->irq),
> +		     S5P_EINT_PEND(EINT_REG_NR(d->irq)));
>  }
> 
> -static void s5pv310_irq_eint_maskack(unsigned int irq)
> +static void s5pv310_irq_eint_maskack(struct irq_data *d)
>  {
> -	s5pv310_irq_eint_mask(irq);
> -	s5pv310_irq_eint_ack(irq);
> +	s5pv310_irq_eint_mask(d);
> +	s5pv310_irq_eint_ack(d);
>  }
> 
> -static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type)
> +static int s5pv310_irq_eint_set_type(struct irq_data *d, unsigned int
type)
>  {
> -	int offs = EINT_OFFSET(irq);
> +	int offs = EINT_OFFSET(d->irq);
>  	int shift;
>  	u32 ctrl, mask;
>  	u32 newvalue = 0;
> @@ -118,10 +119,10 @@ static int s5pv310_irq_eint_set_type(unsigned int
irq,
> unsigned int type)
>  	mask = 0x7 << shift;
> 
>  	spin_lock(&eint_lock);
> -	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq)));
> +	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(d->irq)));
>  	ctrl &= ~mask;
>  	ctrl |= newvalue << shift;
> -	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq)));
> +	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(d->irq)));
>  	spin_unlock(&eint_lock);
> 
>  	switch (offs) {
> @@ -146,13 +147,13 @@ static int s5pv310_irq_eint_set_type(unsigned int
irq,
> unsigned int type)
> 
>  static struct irq_chip s5pv310_irq_eint = {
>  	.name		= "s5pv310-eint",
> -	.mask		= s5pv310_irq_eint_mask,
> -	.unmask		= s5pv310_irq_eint_unmask,
> -	.mask_ack	= s5pv310_irq_eint_maskack,
> -	.ack		= s5pv310_irq_eint_ack,
> -	.set_type	= s5pv310_irq_eint_set_type,
> +	.irq_mask	= s5pv310_irq_eint_mask,
> +	.irq_unmask	= s5pv310_irq_eint_unmask,
> +	.irq_mask_ack	= s5pv310_irq_eint_maskack,
> +	.irq_ack	= s5pv310_irq_eint_ack,
> +	.irq_set_type	= s5pv310_irq_eint_set_type,
>  #ifdef CONFIG_PM
> -	.set_wake	= s3c_irqext_wake,
> +	.irq_set_wake	= s3c_irqext_wake,

Already applied this change.

>  #endif
>  };
> 
> @@ -192,14 +193,14 @@ static void s5pv310_irq_eint0_15(unsigned int irq,
> struct irq_desc *desc)
>  	u32 *irq_data = get_irq_data(irq);
>  	struct irq_chip *chip = get_irq_chip(irq);
> 
> -	chip->mask(irq);
> +	chip->irq_mask(&desc->irq_data);
> 
> -	if (chip->ack)
> -		chip->ack(irq);
> +	if (chip->irq_ack)
> +		chip->irq_ack(&desc->irq_data);
> 
>  	generic_handle_irq(*irq_data);
> 
> -	chip->unmask(irq);
> +	chip->irq_unmask(&desc->irq_data);
>  }
> 
>  int __init s5pv310_init_irq_eint(void)
> diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-
> s3c24xx/include/plat/irq.h
> index 69e1be8..15fdd71 100644
> --- a/arch/arm/plat-s3c24xx/include/plat/irq.h
> +++ b/arch/arm/plat-s3c24xx/include/plat/irq.h
> @@ -107,9 +107,9 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int
> parentmask, unsigned int group)
>  /* exported for use in arch/arm/mach-s3c2410 */
> 
>  #ifdef CONFIG_PM
> -extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
> +extern int s3c_irq_wake(struct irq_data *d, unsigned int state);
>  #else
>  #define s3c_irq_wake NULL
>  #endif
> 
> -extern int s3c_irqext_type(unsigned int irq, unsigned int type);
> +extern int s3c_irqext_type(struct irq_data *d, unsigned int type);
> diff --git a/arch/arm/plat-s3c24xx/irq-pm.c
b/arch/arm/plat-s3c24xx/irq-pm.c
> index ea8dea3..5dbf56d 100644
> --- a/arch/arm/plat-s3c24xx/irq-pm.c
> +++ b/arch/arm/plat-s3c24xx/irq-pm.c
> @@ -15,11 +15,14 @@
>  #include <linux/module.h>
>  #include <linux/interrupt.h>
>  #include <linux/sysdev.h>
> +#include <linux/irq.h>
> 
>  #include <plat/cpu.h>
>  #include <plat/pm.h>
>  #include <plat/irq.h>
> 
> +#include <asm/irq.h>
> +
>  /* state for IRQs over sleep */
> 
>  /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
> @@ -30,15 +33,15 @@
>  unsigned long s3c_irqwake_intallow	= 1L << (IRQ_RTC - IRQ_EINT0) |
0xfL;
>  unsigned long s3c_irqwake_eintallow	= 0x0000fff0L;
> 
> -int s3c_irq_wake(unsigned int irqno, unsigned int state)
> +int s3c_irq_wake(struct irq_data *d, unsigned int state)
>  {
> -	unsigned long irqbit = 1 << (irqno - IRQ_EINT0);
> +	unsigned long irqbit = 1 << (d->irq - IRQ_EINT0);
> 
>  	if (!(s3c_irqwake_intallow & irqbit))
>  		return -ENOENT;
> 
>  	printk(KERN_INFO "wake %s for irq %d\n",
> -	       state ? "enabled" : "disabled", irqno);
> +	       state ? "enabled" : "disabled", d->irq);
> 
>  	if (!state)
>  		s3c_irqwake_intmask |= irqbit;
> diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
> index ad0d44e..bacd817 100644
> --- a/arch/arm/plat-s3c24xx/irq.c
> +++ b/arch/arm/plat-s3c24xx/irq.c
> @@ -34,30 +34,29 @@
>  #include <plat/irq.h>
> 
>  static void
> -s3c_irq_mask(unsigned int irqno)
> +s3c_irq_mask(struct irq_data *d)
>  {
> +	unsigned int irqno = d->irq - IRQ_EINT0;
>  	unsigned long mask;
> 
> -	irqno -= IRQ_EINT0;
> -
>  	mask = __raw_readl(S3C2410_INTMSK);
>  	mask |= 1UL << irqno;
>  	__raw_writel(mask, S3C2410_INTMSK);
>  }
> 
>  static inline void
> -s3c_irq_ack(unsigned int irqno)
> +s3c_irq_ack(struct irq_data *d)
>  {
> -	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
> +	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
> 
>  	__raw_writel(bitval, S3C2410_SRCPND);
>  	__raw_writel(bitval, S3C2410_INTPND);
>  }
> 
>  static inline void
> -s3c_irq_maskack(unsigned int irqno)
> +s3c_irq_maskack(struct irq_data *d)
>  {
> -	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
> +	unsigned long bitval = 1UL << (d->irq - IRQ_EINT0);
>  	unsigned long mask;
> 
>  	mask = __raw_readl(S3C2410_INTMSK);
> @@ -69,8 +68,9 @@ s3c_irq_maskack(unsigned int irqno)
> 
> 
>  static void
> -s3c_irq_unmask(unsigned int irqno)
> +s3c_irq_unmask(struct irq_data *d)
>  {
> +	unsigned int irqno = d->irq;
>  	unsigned long mask;
> 
>  	if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23)
> @@ -85,40 +85,39 @@ s3c_irq_unmask(unsigned int irqno)
> 
>  struct irq_chip s3c_irq_level_chip = {
>  	.name		= "s3c-level",
> -	.ack		= s3c_irq_maskack,
> -	.mask		= s3c_irq_mask,
> -	.unmask		= s3c_irq_unmask,
> -	.set_wake	= s3c_irq_wake
> +	.irq_ack	= s3c_irq_maskack,
> +	.irq_mask	= s3c_irq_mask,
> +	.irq_unmask	= s3c_irq_unmask,
> +	.irq_set_wake	= s3c_irq_wake
>  };
> 
>  struct irq_chip s3c_irq_chip = {
>  	.name		= "s3c",
> -	.ack		= s3c_irq_ack,
> -	.mask		= s3c_irq_mask,
> -	.unmask		= s3c_irq_unmask,
> -	.set_wake	= s3c_irq_wake
> +	.irq_ack	= s3c_irq_ack,
> +	.irq_mask	= s3c_irq_mask,
> +	.irq_unmask	= s3c_irq_unmask,
> +	.irq_set_wake	= s3c_irq_wake
>  };
> 
>  static void
> -s3c_irqext_mask(unsigned int irqno)
> +s3c_irqext_mask(struct irq_data *d)
>  {
> +	unsigned int irqno = d->irq - EXTINT_OFF;
>  	unsigned long mask;
> 
> -	irqno -= EXTINT_OFF;
> -
>  	mask = __raw_readl(S3C24XX_EINTMASK);
>  	mask |= ( 1UL << irqno);
>  	__raw_writel(mask, S3C24XX_EINTMASK);
>  }
> 
>  static void
> -s3c_irqext_ack(unsigned int irqno)
> +s3c_irqext_ack(struct irq_data *d)
>  {
>  	unsigned long req;
>  	unsigned long bit;
>  	unsigned long mask;
> 
> -	bit = 1UL << (irqno - EXTINT_OFF);
> +	bit = 1UL << (d->irq - EXTINT_OFF);
> 
>  	mask = __raw_readl(S3C24XX_EINTMASK);
> 
> @@ -129,62 +128,61 @@ s3c_irqext_ack(unsigned int irqno)
> 
>  	/* not sure if we should be acking the parent irq... */
> 
> -	if (irqno <= IRQ_EINT7 ) {
> +	if (d->irq <= IRQ_EINT7 ) {
>  		if ((req & 0xf0) == 0)
> -			s3c_irq_ack(IRQ_EINT4t7);
> +			s3c_irq_ack(irq_get_irq_data(IRQ_EINT4t7));
>  	} else {
>  		if ((req >> 8) == 0)
> -			s3c_irq_ack(IRQ_EINT8t23);
> +			s3c_irq_ack(irq_get_irq_data(IRQ_EINT8t23));
>  	}
>  }
> 
>  static void
> -s3c_irqext_unmask(unsigned int irqno)
> +s3c_irqext_unmask(struct irq_data *d)
>  {
> +	unsigned int irqno = d->irq - EXTINT_OFF;
>  	unsigned long mask;
> 
> -	irqno -= EXTINT_OFF;
> -
>  	mask = __raw_readl(S3C24XX_EINTMASK);
>  	mask &= ~( 1UL << irqno);
>  	__raw_writel(mask, S3C24XX_EINTMASK);
>  }
> 
>  int
> -s3c_irqext_type(unsigned int irq, unsigned int type)
> +s3c_irqext_type(struct irq_data *d, unsigned int type)
>  {
>  	void __iomem *extint_reg;
>  	void __iomem *gpcon_reg;
>  	unsigned long gpcon_offset, extint_offset;
>  	unsigned long newvalue = 0, value;
> 
> -	if ((irq >= IRQ_EINT0) && (irq <= IRQ_EINT3))
> +	if ((d->irq >= IRQ_EINT0) && (d->irq <= IRQ_EINT3))
>  	{
>  		gpcon_reg = S3C2410_GPFCON;
>  		extint_reg = S3C24XX_EXTINT0;
> -		gpcon_offset = (irq - IRQ_EINT0) * 2;
> -		extint_offset = (irq - IRQ_EINT0) * 4;
> +		gpcon_offset = (d->irq - IRQ_EINT0) * 2;
> +		extint_offset = (d->irq - IRQ_EINT0) * 4;
>  	}
> -	else if ((irq >= IRQ_EINT4) && (irq <= IRQ_EINT7))
> +	else if ((d->irq >= IRQ_EINT4) && (d->irq <= IRQ_EINT7))
>  	{
>  		gpcon_reg = S3C2410_GPFCON;
>  		extint_reg = S3C24XX_EXTINT0;
> -		gpcon_offset = (irq - (EXTINT_OFF)) * 2;
> -		extint_offset = (irq - (EXTINT_OFF)) * 4;
> +		gpcon_offset = (d->irq - (EXTINT_OFF)) * 2;
> +		extint_offset = (d->irq - (EXTINT_OFF)) * 4;
>  	}
> -	else if ((irq >= IRQ_EINT8) && (irq <= IRQ_EINT15))
> +	else if ((d->irq >= IRQ_EINT8) && (d->irq <= IRQ_EINT15))
>  	{
>  		gpcon_reg = S3C2410_GPGCON;
>  		extint_reg = S3C24XX_EXTINT1;
> -		gpcon_offset = (irq - IRQ_EINT8) * 2;
> -		extint_offset = (irq - IRQ_EINT8) * 4;
> +		gpcon_offset = (d->irq - IRQ_EINT8) * 2;
> +		extint_offset = (d->irq - IRQ_EINT8) * 4;
>  	}
> -	else if ((irq >= IRQ_EINT16) && (irq <= IRQ_EINT23))
> +	else if ((d->irq >= IRQ_EINT16) && (d->irq <= IRQ_EINT23))
>  	{
>  		gpcon_reg = S3C2410_GPGCON;
>  		extint_reg = S3C24XX_EXTINT2;
> -		gpcon_offset = (irq - IRQ_EINT8) * 2;
> -		extint_offset = (irq - IRQ_EINT16) * 4;
> +		gpcon_offset = (d->irq - IRQ_EINT8) * 2;
> +		extint_offset = (d->irq - IRQ_EINT16) * 4;
>  	} else
>  		return -1;
> 
> @@ -234,20 +232,20 @@ s3c_irqext_type(unsigned int irq, unsigned int type)
> 
>  static struct irq_chip s3c_irqext_chip = {
>  	.name		= "s3c-ext",
> -	.mask		= s3c_irqext_mask,
> -	.unmask		= s3c_irqext_unmask,
> -	.ack		= s3c_irqext_ack,
> -	.set_type	= s3c_irqext_type,
> -	.set_wake	= s3c_irqext_wake
> +	.irq_mask	= s3c_irqext_mask,
> +	.irq_unmask	= s3c_irqext_unmask,
> +	.irq_ack	= s3c_irqext_ack,
> +	.irq_set_type	= s3c_irqext_type,
> +	.irq_set_wake	= s3c_irqext_wake

Already applied last change.

>  };
> 
>  static struct irq_chip s3c_irq_eint0t4 = {
>  	.name		= "s3c-ext0",
> -	.ack		= s3c_irq_ack,
> -	.mask		= s3c_irq_mask,
> -	.unmask		= s3c_irq_unmask,
> -	.set_wake	= s3c_irq_wake,
> -	.set_type	= s3c_irqext_type,
> +	.irq_ack	= s3c_irq_ack,
> +	.irq_mask	= s3c_irq_mask,
> +	.irq_unmask	= s3c_irq_unmask,
> +	.irq_set_wake	= s3c_irq_wake,
> +	.irq_set_type	= s3c_irqext_type,
>  };
> 
>  /* mask values for the parent registers for each of the interrupt types
*/
> @@ -261,109 +259,109 @@ static struct irq_chip s3c_irq_eint0t4 = {
>  /* UART0 */
> 
>  static void
> -s3c_irq_uart0_mask(unsigned int irqno)
> +s3c_irq_uart0_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_UART0, 7);
> +	s3c_irqsub_mask(d->irq, INTMSK_UART0, 7);
>  }
> 
>  static void
> -s3c_irq_uart0_unmask(unsigned int irqno)
> +s3c_irq_uart0_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_UART0);
> +	s3c_irqsub_unmask(d->irq, INTMSK_UART0);
>  }
> 
>  static void
> -s3c_irq_uart0_ack(unsigned int irqno)
> +s3c_irq_uart0_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_UART0, 7);
> +	s3c_irqsub_maskack(d->irq, INTMSK_UART0, 7);
>  }
> 
>  static struct irq_chip s3c_irq_uart0 = {
>  	.name		= "s3c-uart0",
> -	.mask		= s3c_irq_uart0_mask,
> -	.unmask		= s3c_irq_uart0_unmask,
> -	.ack		= s3c_irq_uart0_ack,
> +	.irq_mask	= s3c_irq_uart0_mask,
> +	.irq_unmask	= s3c_irq_uart0_unmask,
> +	.irq_ack	= s3c_irq_uart0_ack,
>  };
> 
>  /* UART1 */
> 
>  static void
> -s3c_irq_uart1_mask(unsigned int irqno)
> +s3c_irq_uart1_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_UART1, 7 << 3);
> +	s3c_irqsub_mask(d->irq, INTMSK_UART1, 7 << 3);
>  }
> 
>  static void
> -s3c_irq_uart1_unmask(unsigned int irqno)
> +s3c_irq_uart1_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_UART1);
> +	s3c_irqsub_unmask(d->irq, INTMSK_UART1);
>  }
> 
>  static void
> -s3c_irq_uart1_ack(unsigned int irqno)
> +s3c_irq_uart1_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_UART1, 7 << 3);
> +	s3c_irqsub_maskack(d->irq, INTMSK_UART1, 7 << 3);
>  }
> 
>  static struct irq_chip s3c_irq_uart1 = {
>  	.name		= "s3c-uart1",
> -	.mask		= s3c_irq_uart1_mask,
> -	.unmask		= s3c_irq_uart1_unmask,
> -	.ack		= s3c_irq_uart1_ack,
> +	.irq_mask	= s3c_irq_uart1_mask,
> +	.irq_unmask	= s3c_irq_uart1_unmask,
> +	.irq_ack	= s3c_irq_uart1_ack,
>  };
> 
>  /* UART2 */
> 
>  static void
> -s3c_irq_uart2_mask(unsigned int irqno)
> +s3c_irq_uart2_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_UART2, 7 << 6);
> +	s3c_irqsub_mask(d->irq, INTMSK_UART2, 7 << 6);
>  }
> 
>  static void
> -s3c_irq_uart2_unmask(unsigned int irqno)
> +s3c_irq_uart2_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_UART2);
> +	s3c_irqsub_unmask(d->irq, INTMSK_UART2);
>  }
> 
>  static void
> -s3c_irq_uart2_ack(unsigned int irqno)
> +s3c_irq_uart2_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_maskack(irqno, INTMSK_UART2, 7 << 6);
> +	s3c_irqsub_maskack(d->irq, INTMSK_UART2, 7 << 6);
>  }
> 
>  static struct irq_chip s3c_irq_uart2 = {
>  	.name		= "s3c-uart2",
> -	.mask		= s3c_irq_uart2_mask,
> -	.unmask		= s3c_irq_uart2_unmask,
> -	.ack		= s3c_irq_uart2_ack,
> +	.irq_mask	= s3c_irq_uart2_mask,
> +	.irq_unmask	= s3c_irq_uart2_unmask,
> +	.irq_ack	= s3c_irq_uart2_ack,
>  };
> 
>  /* ADC and Touchscreen */
> 
>  static void
> -s3c_irq_adc_mask(unsigned int irqno)
> +s3c_irq_adc_mask(struct irq_data *d)
>  {
> -	s3c_irqsub_mask(irqno, INTMSK_ADCPARENT, 3 << 9);
> +	s3c_irqsub_mask(d->irq, INTMSK_ADCPARENT, 3 << 9);
>  }
> 
>  static void
> -s3c_irq_adc_unmask(unsigned int irqno)
> +s3c_irq_adc_unmask(struct irq_data *d)
>  {
> -	s3c_irqsub_unmask(irqno, INTMSK_ADCPARENT);
> +	s3c_irqsub_unmask(d->irq, INTMSK_ADCPARENT);
>  }
> 
>  static void
> -s3c_irq_adc_ack(unsigned int irqno)
> +s3c_irq_adc_ack(struct irq_data *d)
>  {
> -	s3c_irqsub_ack(irqno, INTMSK_ADCPARENT, 3 << 9);
> +	s3c_irqsub_ack(d->irq, INTMSK_ADCPARENT, 3 << 9);
>  }
> 
>  static struct irq_chip s3c_irq_adc = {
>  	.name		= "s3c-adc",
> -	.mask		= s3c_irq_adc_mask,
> -	.unmask		= s3c_irq_adc_unmask,
> -	.ack		= s3c_irq_adc_ack,
> +	.irq_mask	= s3c_irq_adc_mask,
> +	.irq_unmask	= s3c_irq_adc_unmask,
> +	.irq_ack	= s3c_irq_adc_ack,
>  };
> 
>  /* irq demux for adc */
> diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
> index 752f1a6..088655a 100644
> --- a/arch/arm/plat-s5p/irq-eint.c
> +++ b/arch/arm/plat-s5p/irq-eint.c
> @@ -28,39 +28,39 @@
>  #include <plat/gpio-cfg.h>
>  #include <mach/regs-gpio.h>
> 
> -static inline void s5p_irq_eint_mask(unsigned int irq)
> +static inline void s5p_irq_eint_mask(struct irq_data *d)
>  {
>  	u32 mask;
> 
> -	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
> -	mask |= eint_irq_to_bit(irq);
> -	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
> +	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
> +	mask |= eint_irq_to_bit(d->irq);
> +	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
>  }
> 
> -static void s5p_irq_eint_unmask(unsigned int irq)
> +static void s5p_irq_eint_unmask(struct irq_data *d)
>  {
>  	u32 mask;
> 
> -	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
> -	mask &= ~(eint_irq_to_bit(irq));
> -	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
> +	mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(d->irq)));
> +	mask &= ~(eint_irq_to_bit(d->irq));
> +	__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(d->irq)));
>  }
> 
> -static inline void s5p_irq_eint_ack(unsigned int irq)
> +static inline void s5p_irq_eint_ack(struct irq_data *d)
>  {
> -	__raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq)));
> +	__raw_writel(eint_irq_to_bit(d->irq), S5P_EINT_PEND(EINT_REG_NR(d-
> >irq)));
>  }
> 
> -static void s5p_irq_eint_maskack(unsigned int irq)
> +static void s5p_irq_eint_maskack(struct irq_data *d)
>  {
>  	/* compiler should in-line these */
> -	s5p_irq_eint_mask(irq);
> -	s5p_irq_eint_ack(irq);
> +	s5p_irq_eint_mask(d);
> +	s5p_irq_eint_ack(d);
>  }
> 
> -static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)
> +static int s5p_irq_eint_set_type(struct irq_data *d, unsigned int type)
>  {
> -	int offs = EINT_OFFSET(irq);
> +	int offs = EINT_OFFSET(d->irq);
>  	int shift;
>  	u32 ctrl, mask;
>  	u32 newvalue = 0;
> @@ -94,10 +94,10 @@ static int s5p_irq_eint_set_type(unsigned int irq,
> unsigned int type)
>  	shift = (offs & 0x7) * 4;
>  	mask = 0x7 << shift;
> 
> -	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq)));
> +	ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(d->irq)));
>  	ctrl &= ~mask;
>  	ctrl |= newvalue << shift;
> -	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq)));
> +	__raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(d->irq)));
> 
>  	if ((0 <= offs) && (offs < 8))
>  		s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
> @@ -119,13 +119,13 @@ static int s5p_irq_eint_set_type(unsigned int irq,
> unsigned int type)
> 
>  static struct irq_chip s5p_irq_eint = {
>  	.name		= "s5p-eint",
> -	.mask		= s5p_irq_eint_mask,
> -	.unmask		= s5p_irq_eint_unmask,
> -	.mask_ack	= s5p_irq_eint_maskack,
> -	.ack		= s5p_irq_eint_ack,
> -	.set_type	= s5p_irq_eint_set_type,
> +	.irq_mask	= s5p_irq_eint_mask,
> +	.irq_unmask	= s5p_irq_eint_unmask,
> +	.irq_mask_ack	= s5p_irq_eint_maskack,
> +	.irq_ack	= s5p_irq_eint_ack,
> +	.irq_set_type	= s5p_irq_eint_set_type,
>  #ifdef CONFIG_PM
> -	.set_wake	= s3c_irqext_wake,
> +	.irq_set_wake	= s3c_irqext_wake,

Already applied last change.

>  #endif
>  };
> 
> @@ -159,42 +159,42 @@ static void s5p_irq_demux_eint16_31(unsigned int
irq,
> struct irq_desc *desc)
>  	s5p_irq_demux_eint(IRQ_EINT(24));
>  }
> 
> -static inline void s5p_irq_vic_eint_mask(unsigned int irq)
> +static inline void s5p_irq_vic_eint_mask(struct irq_data *d)
>  {
> -	void __iomem *base = get_irq_chip_data(irq);
> +	void __iomem *base = irq_data_get_irq_chip_data(d);
> 
> -	s5p_irq_eint_mask(irq);
> -	writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE_CLEAR);
> +	s5p_irq_eint_mask(d);
> +	writel(1 << EINT_OFFSET(d->irq), base + VIC_INT_ENABLE_CLEAR);
>  }
> 
> -static void s5p_irq_vic_eint_unmask(unsigned int irq)
> +static void s5p_irq_vic_eint_unmask(struct irq_data *d)
>  {
> -	void __iomem *base = get_irq_chip_data(irq);
> +	void __iomem *base = irq_data_get_irq_chip_data(d);
> 
> -	s5p_irq_eint_unmask(irq);
> -	writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE);
> +	s5p_irq_eint_unmask(d);
> +	writel(1 << EINT_OFFSET(d->irq), base + VIC_INT_ENABLE);
>  }
> 
> -static inline void s5p_irq_vic_eint_ack(unsigned int irq)
> +static inline void s5p_irq_vic_eint_ack(struct irq_data *d)
>  {
> -	__raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq)));
> +	__raw_writel(eint_irq_to_bit(d->irq), S5P_EINT_PEND(EINT_REG_NR(d-
> >irq)));
>  }
> 
> -static void s5p_irq_vic_eint_maskack(unsigned int irq)
> +static void s5p_irq_vic_eint_maskack(struct irq_data *d)
>  {
> -	s5p_irq_vic_eint_mask(irq);
> -	s5p_irq_vic_eint_ack(irq);
> +	s5p_irq_vic_eint_mask(d);
> +	s5p_irq_vic_eint_ack(d);
>  }
> 
>  static struct irq_chip s5p_irq_vic_eint = {
>  	.name		= "s5p_vic_eint",
> -	.mask		= s5p_irq_vic_eint_mask,
> -	.unmask		= s5p_irq_vic_eint_unmask,
> -	.mask_ack	= s5p_irq_vic_eint_maskack,
> -	.ack		= s5p_irq_vic_eint_ack,
> -	.set_type	= s5p_irq_eint_set_type,
> +	.irq_mask	= s5p_irq_vic_eint_mask,
> +	.irq_unmask	= s5p_irq_vic_eint_unmask,
> +	.irq_mask_ack	= s5p_irq_vic_eint_maskack,
> +	.irq_ack	= s5p_irq_vic_eint_ack,
> +	.irq_set_type	= s5p_irq_eint_set_type,
>  #ifdef CONFIG_PM
> -	.set_wake	= s3c_irqext_wake,
> +	.irq_set_wake	= s3c_irqext_wake,

Same.

>  #endif
>  };
> 
> diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-
> gpioint.c
> index 0e5dc8c..6b96d32 100644
> --- a/arch/arm/plat-s5p/irq-gpioint.c
> +++ b/arch/arm/plat-s5p/irq-gpioint.c
> @@ -30,9 +30,9 @@
> 
>  static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR];
> 
> -static int s5p_gpioint_get_group(unsigned int irq)
> +static int s5p_gpioint_get_group(struct irq_data *d)
>  {
> -	struct gpio_chip *chip = get_irq_data(irq);
> +	struct gpio_chip *chip = irq_data_get_irq_data(d);
>  	struct s3c_gpio_chip *s3c_chip = container_of(chip,
>  			struct s3c_gpio_chip, chip);
>  	int group;
> @@ -44,22 +44,22 @@ static int s5p_gpioint_get_group(unsigned int irq)
>  	return group;
>  }
> 
> -static int s5p_gpioint_get_offset(unsigned int irq)
> +static int s5p_gpioint_get_offset(struct irq_data *d)
>  {
> -	struct gpio_chip *chip = get_irq_data(irq);
> +	struct gpio_chip *chip = irq_data_get_irq_data(d);
>  	struct s3c_gpio_chip *s3c_chip = container_of(chip,
>  			struct s3c_gpio_chip, chip);
> 
> -	return irq - s3c_chip->irq_base;
> +	return d->irq - s3c_chip->irq_base;
>  }
> 
> -static void s5p_gpioint_ack(unsigned int irq)
> +static void s5p_gpioint_ack(struct irq_data *d)
>  {
>  	int group, offset, pend_offset;
>  	unsigned int value;
> 
> -	group = s5p_gpioint_get_group(irq);
> -	offset = s5p_gpioint_get_offset(irq);
> +	group = s5p_gpioint_get_group(d);
> +	offset = s5p_gpioint_get_offset(d);
>  	pend_offset = group << 2;
> 
>  	value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
> @@ -67,13 +67,13 @@ static void s5p_gpioint_ack(unsigned int irq)
>  	__raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
>  }
> 
> -static void s5p_gpioint_mask(unsigned int irq)
> +static void s5p_gpioint_mask(struct irq_data *d)
>  {
>  	int group, offset, mask_offset;
>  	unsigned int value;
> 
> -	group = s5p_gpioint_get_group(irq);
> -	offset = s5p_gpioint_get_offset(irq);
> +	group = s5p_gpioint_get_group(d);
> +	offset = s5p_gpioint_get_offset(d);
>  	mask_offset = group << 2;
> 
>  	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
> @@ -81,13 +81,13 @@ static void s5p_gpioint_mask(unsigned int irq)
>  	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
>  }
> 
> -static void s5p_gpioint_unmask(unsigned int irq)
> +static void s5p_gpioint_unmask(struct irq_data *d)
>  {
>  	int group, offset, mask_offset;
>  	unsigned int value;
> 
> -	group = s5p_gpioint_get_group(irq);
> -	offset = s5p_gpioint_get_offset(irq);
> +	group = s5p_gpioint_get_group(d);
> +	offset = s5p_gpioint_get_offset(d);
>  	mask_offset = group << 2;
> 
>  	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
> @@ -95,19 +95,19 @@ static void s5p_gpioint_unmask(unsigned int irq)
>  	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
>  }
> 
> -static void s5p_gpioint_mask_ack(unsigned int irq)
> +static void s5p_gpioint_mask_ack(struct irq_data *d)
>  {
> -	s5p_gpioint_mask(irq);
> -	s5p_gpioint_ack(irq);
> +	s5p_gpioint_mask(d);
> +	s5p_gpioint_ack(d);
>  }
> 
> -static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
> +static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type)
>  {
>  	int group, offset, con_offset;
>  	unsigned int value;
> 
> -	group = s5p_gpioint_get_group(irq);
> -	offset = s5p_gpioint_get_offset(irq);
> +	group = s5p_gpioint_get_group(d);
> +	offset = s5p_gpioint_get_offset(d);
>  	con_offset = group << 2;
> 
>  	switch (type) {
> @@ -142,11 +142,11 @@ static int s5p_gpioint_set_type(unsigned int irq,
> unsigned int type)
> 
>  struct irq_chip s5p_gpioint = {
>  	.name		= "s5p_gpioint",
> -	.ack		= s5p_gpioint_ack,
> -	.mask		= s5p_gpioint_mask,
> -	.mask_ack	= s5p_gpioint_mask_ack,
> -	.unmask		= s5p_gpioint_unmask,
> -	.set_type	= s5p_gpioint_set_type,
> +	.irq_ack	= s5p_gpioint_ack,
> +	.irq_mask	= s5p_gpioint_mask,
> +	.irq_mask_ack	= s5p_gpioint_mask_ack,
> +	.irq_unmask	= s5p_gpioint_unmask,
> +	.irq_set_type	= s5p_gpioint_set_type,
>  };
> 
>  static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
> diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c
> index dc33b9e..7918261 100644
> --- a/arch/arm/plat-s5p/irq-pm.c
> +++ b/arch/arm/plat-s5p/irq-pm.c
> @@ -37,14 +37,14 @@
>  unsigned long s3c_irqwake_intallow	= 0x00000006L;
>  unsigned long s3c_irqwake_eintallow	= 0xffffffffL;
> 
> -int s3c_irq_wake(unsigned int irqno, unsigned int state)
> +int s3c_irq_wake(struct irq_data *d, unsigned int state)
>  {
>  	unsigned long irqbit;
> 
> -	switch (irqno) {
> +	switch (d->irq) {
>  	case IRQ_RTC_TIC:
>  	case IRQ_RTC_ALARM:
> -		irqbit = 1 << (irqno + 1 - IRQ_RTC_ALARM);
> +		irqbit = 1 << (d->irq + 1 - IRQ_RTC_ALARM);
>  		if (!state)
>  			s3c_irqwake_intmask |= irqbit;
>  		else
> diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-
> samsung/include/plat/pm.h
> index 245836d..0f212c2 100644
> --- a/arch/arm/plat-samsung/include/plat/pm.h
> +++ b/arch/arm/plat-samsung/include/plat/pm.h

Already applied the changes of this file.

> @@ -15,6 +15,8 @@
>   * management
>  */
> 
> +struct irq_data;
> +
>  #ifdef CONFIG_PM
> 
>  extern __init int s3c_pm_init(void);
> @@ -100,7 +102,7 @@ extern void s3c_pm_do_restore(struct sleep_save *ptr,
int
> count);
>  extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
> 
>  #ifdef CONFIG_PM
> -extern int s3c_irqext_wake(unsigned int irqno, unsigned int state);
> +extern int s3c_irqext_wake(struct irq_data *d, unsigned int state);
>  extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t
state);
>  extern int s3c24xx_irq_resume(struct sys_device *dev);
>  #else
> diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-
> uart.c
> index 4f8c102..92a25d6 100644
> --- a/arch/arm/plat-samsung/irq-uart.c
> +++ b/arch/arm/plat-samsung/irq-uart.c

Already applied some changes in this file...

> @@ -28,21 +28,21 @@
>   * are consecutive when looking up the interrupt in the demux routines.
>   */
> 
> -static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
> +static inline void __iomem *s3c_irq_uart_base(struct irq_data *d)
>  {
> -	struct s3c_uart_irq *uirq = get_irq_chip_data(irq);
> +	struct s3c_uart_irq *uirq = irq_data_get_irq_chip_data(d);
>  	return uirq->regs;
>  }
> 
> -static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
> +static inline unsigned int s3c_irq_uart_bit(struct irq_data *d)
>  {
> -	return irq & 3;
> +	return d->irq & 3;
>  }
> 
> -static void s3c_irq_uart_mask(unsigned int irq)
> +static void s3c_irq_uart_mask(struct irq_data *d)
>  {
> -	void __iomem *regs = s3c_irq_uart_base(irq);
> -	unsigned int bit = s3c_irq_uart_bit(irq);
> +	void __iomem *regs = s3c_irq_uart_base(d);
> +	unsigned int bit = s3c_irq_uart_bit(d);
>  	u32 reg;
> 
>  	reg = __raw_readl(regs + S3C64XX_UINTM);
> @@ -50,10 +50,10 @@ static void s3c_irq_uart_mask(unsigned int irq)
>  	__raw_writel(reg, regs + S3C64XX_UINTM);
>  }
> 
> -static void s3c_irq_uart_maskack(unsigned int irq)
> +static void s3c_irq_uart_maskack(struct irq_data *d)
>  {
> -	void __iomem *regs = s3c_irq_uart_base(irq);
> -	unsigned int bit = s3c_irq_uart_bit(irq);
> +	void __iomem *regs = s3c_irq_uart_base(d);
> +	unsigned int bit = s3c_irq_uart_bit(d);
>  	u32 reg;
> 
>  	reg = __raw_readl(regs + S3C64XX_UINTM);
> @@ -62,10 +62,10 @@ static void s3c_irq_uart_maskack(unsigned int irq)
>  	__raw_writel(1 << bit, regs + S3C64XX_UINTP);
>  }
> 
> -static void s3c_irq_uart_unmask(unsigned int irq)
> +static void s3c_irq_uart_unmask(struct irq_data *d)
>  {
> -	void __iomem *regs = s3c_irq_uart_base(irq);
> -	unsigned int bit = s3c_irq_uart_bit(irq);
> +	void __iomem *regs = s3c_irq_uart_base(d);
> +	unsigned int bit = s3c_irq_uart_bit(d);
>  	u32 reg;
> 
>  	reg = __raw_readl(regs + S3C64XX_UINTM);
> @@ -73,17 +73,17 @@ static void s3c_irq_uart_unmask(unsigned int irq)
>  	__raw_writel(reg, regs + S3C64XX_UINTM);
>  }
> 
> -static void s3c_irq_uart_ack(unsigned int irq)
> +static void s3c_irq_uart_ack(struct irq_data *d)
>  {
> -	void __iomem *regs = s3c_irq_uart_base(irq);
> -	unsigned int bit = s3c_irq_uart_bit(irq);
> +	void __iomem *regs = s3c_irq_uart_base(d);
> +	unsigned int bit = s3c_irq_uart_bit(d);
> 
>  	__raw_writel(1 << bit, regs + S3C64XX_UINTP);
>  }
> 
>  static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
>  {
> -	struct s3c_uart_irq *uirq = desc->handler_data;
> +	struct s3c_uart_irq *uirq = desc->irq_data.handler_data;
>  	u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
>  	int base = uirq->base_irq;
> 
> @@ -99,10 +99,10 @@ static void s3c_irq_demux_uart(unsigned int irq,
struct
> irq_desc *desc)
> 
>  static struct irq_chip s3c_irq_uart = {
>  	.name		= "s3c-uart",
> -	.mask		= s3c_irq_uart_mask,
> -	.unmask		= s3c_irq_uart_unmask,
> -	.mask_ack	= s3c_irq_uart_maskack,
> -	.ack		= s3c_irq_uart_ack,
> +	.irq_mask	= s3c_irq_uart_mask,
> +	.irq_unmask	= s3c_irq_uart_unmask,
> +	.irq_mask_ack	= s3c_irq_uart_maskack,
> +	.irq_ack	= s3c_irq_uart_ack,
>  };
> 
>  static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
> @@ -124,7 +124,7 @@ static void __init s3c_init_uart_irq(struct
s3c_uart_irq
> *uirq)
>  		set_irq_flags(irq, IRQF_VALID);
>  	}
> 
> -	desc->handler_data = uirq;
> +	desc->irq_data.handler_data = uirq;
>  	set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
>  }
> 
> diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-
> samsung/irq-vic-timer.c
> index 0270519..6ee39e0 100644
> --- a/arch/arm/plat-samsung/irq-vic-timer.c
> +++ b/arch/arm/plat-samsung/irq-vic-timer.c

Same...already applied some changes in this file...

> @@ -24,43 +24,43 @@
> 
>  static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc
*desc)
>  {
> -	generic_handle_irq((int)desc->handler_data);
> +	generic_handle_irq((int)desc->irq_data.handler_data);
>  }
> 
>  /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
> 
> -static void s3c_irq_timer_mask(unsigned int irq)
> +static void s3c_irq_timer_mask(struct irq_data *d)
>  {
>  	u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
> 
>  	reg &= 0x1f;  /* mask out pending interrupts */
> -	reg &= ~(1 << (irq - IRQ_TIMER0));
> +	reg &= ~(1 << (d->irq - IRQ_TIMER0));
>  	__raw_writel(reg, S3C64XX_TINT_CSTAT);
>  }
> 
> -static void s3c_irq_timer_unmask(unsigned int irq)
> +static void s3c_irq_timer_unmask(struct irq_data *d)
>  {
>  	u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
> 
>  	reg &= 0x1f;  /* mask out pending interrupts */
> -	reg |= 1 << (irq - IRQ_TIMER0);
> +	reg |= 1 << (d->irq - IRQ_TIMER0);
>  	__raw_writel(reg, S3C64XX_TINT_CSTAT);
>  }
> 
> -static void s3c_irq_timer_ack(unsigned int irq)
> +static void s3c_irq_timer_ack(struct irq_data *d)
>  {
>  	u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
> 
>  	reg &= 0x1f;
> -	reg |= (1 << 5) << (irq - IRQ_TIMER0);
> +	reg |= (1 << 5) << (d->irq - IRQ_TIMER0);
>  	__raw_writel(reg, S3C64XX_TINT_CSTAT);
>  }
> 
>  static struct irq_chip s3c_irq_timer = {
>  	.name		= "s3c-timer",
> -	.mask		= s3c_irq_timer_mask,
> -	.unmask		= s3c_irq_timer_unmask,
> -	.ack		= s3c_irq_timer_ack,
> +	.irq_mask	= s3c_irq_timer_mask,
> +	.irq_unmask	= s3c_irq_timer_unmask,
> +	.irq_ack	= s3c_irq_timer_ack,
>  };
> 
>  /**
> @@ -82,5 +82,5 @@ void __init s3c_init_vic_timer_irq(unsigned int
parent_irq,
>  	set_irq_handler(timer_irq, handle_level_irq);
>  	set_irq_flags(timer_irq, IRQF_VALID);
> 
> -	desc->handler_data = (void *)timer_irq;
> +	desc->irq_data.handler_data = (void *)timer_irq;
>  }
> diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
> index 27cfca5..510a9c6 100644
> --- a/arch/arm/plat-samsung/pm.c
> +++ b/arch/arm/plat-samsung/pm.c
> @@ -18,6 +18,7 @@
>  #include <linux/delay.h>
>  #include <linux/serial_core.h>
>  #include <linux/io.h>
> +#include <linux/irq.h>
> 
>  #include <asm/cacheflush.h>
>  #include <mach/hardware.h>
> @@ -136,15 +137,15 @@ static void s3c_pm_restore_uarts(void) { }
>  unsigned long s3c_irqwake_intmask	= 0xffffffffL;
>  unsigned long s3c_irqwake_eintmask	= 0xffffffffL;
> 
> -int s3c_irqext_wake(unsigned int irqno, unsigned int state)
> +int s3c_irqext_wake(struct irq_data *d, unsigned int state)

Already applied.

>  {
> -	unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
> +	unsigned long bit = 1L << IRQ_EINT_BIT(d->irq);

Same.

> 
>  	if (!(s3c_irqwake_eintallow & bit))
>  		return -ENOENT;
> 
>  	printk(KERN_INFO "wake %s for irq %d\n",
> -	       state ? "enabled" : "disabled", irqno);
> +	       state ? "enabled" : "disabled", d->irq);

Same.

> 
>  	if (!state)
>  		s3c_irqwake_eintmask |= bit;
> --

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 14/54] ARM: ebsa110: irq_data conversion.

[Russell King - ARM Linux]

On Tue, Nov 30, 2010 at 02:36:38PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

> ---
>  arch/arm/mach-ebsa110/core.c |   14 +++++++-------
>  1 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
> index 5df4099..7df083f 100644
> --- a/arch/arm/mach-ebsa110/core.c
> +++ b/arch/arm/mach-ebsa110/core.c
> @@ -35,20 +35,20 @@
>  #define IRQ_STAT		0xff000000	/* read */
>  #define IRQ_MCLR		0xff000000	/* write */
>  
> -static void ebsa110_mask_irq(unsigned int irq)
> +static void ebsa110_mask_irq(struct irq_data *d)
>  {
> -	__raw_writeb(1 << irq, IRQ_MCLR);
> +	__raw_writeb(1 << d->irq, IRQ_MCLR);
>  }
>  
> -static void ebsa110_unmask_irq(unsigned int irq)
> +static void ebsa110_unmask_irq(struct irq_data *d)
>  {
> -	__raw_writeb(1 << irq, IRQ_MSET);
> +	__raw_writeb(1 << d->irq, IRQ_MSET);
>  }
>  
>  static struct irq_chip ebsa110_irq_chip = {
> -	.ack	= ebsa110_mask_irq,
> -	.mask	= ebsa110_mask_irq,
> -	.unmask = ebsa110_unmask_irq,
> +	.irq_ack	= ebsa110_mask_irq,
> +	.irq_mask	= ebsa110_mask_irq,
> +	.irq_unmask	= ebsa110_unmask_irq,
>  };
>   
>  static void __init ebsa110_init_irq(void)
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 02/54] ARM: ecard: irq_data conversion.

[Russell King - ARM Linux]

On Tue, Nov 30, 2010 at 02:25:34PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

> ---
>  arch/arm/kernel/ecard.c |   28 ++++++++++++++--------------
>  1 files changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
> index eed2f79..2ad62df 100644
> --- a/arch/arm/kernel/ecard.c
> +++ b/arch/arm/kernel/ecard.c
> @@ -443,40 +443,40 @@ static expansioncard_ops_t ecard_default_ops = {
>   *
>   * They are not meant to be called directly, but via enable/disable_irq.
>   */
> -static void ecard_irq_unmask(unsigned int irqnr)
> +static void ecard_irq_unmask(struct irq_data *d)
>  {
> -	ecard_t *ec = slot_to_ecard(irqnr - 32);
> +	ecard_t *ec = slot_to_ecard(d->irq - 32);
>  
>  	if (ec) {
>  		if (!ec->ops)
>  			ec->ops = &ecard_default_ops;
>  
>  		if (ec->claimed && ec->ops->irqenable)
> -			ec->ops->irqenable(ec, irqnr);
> +			ec->ops->irqenable(ec, d->irq);
>  		else
>  			printk(KERN_ERR "ecard: rejecting request to "
> -				"enable IRQs for %d\n", irqnr);
> +				"enable IRQs for %d\n", d->irq);
>  	}
>  }
>  
> -static void ecard_irq_mask(unsigned int irqnr)
> +static void ecard_irq_mask(struct irq_data *d)
>  {
> -	ecard_t *ec = slot_to_ecard(irqnr - 32);
> +	ecard_t *ec = slot_to_ecard(d->irq - 32);
>  
>  	if (ec) {
>  		if (!ec->ops)
>  			ec->ops = &ecard_default_ops;
>  
>  		if (ec->ops && ec->ops->irqdisable)
> -			ec->ops->irqdisable(ec, irqnr);
> +			ec->ops->irqdisable(ec, d->irq);
>  	}
>  }
>  
>  static struct irq_chip ecard_chip = {
> -	.name	= "ECARD",
> -	.ack	= ecard_irq_mask,
> -	.mask	= ecard_irq_mask,
> -	.unmask = ecard_irq_unmask,
> +	.name		= "ECARD",
> +	.irq_ack	= ecard_irq_mask,
> +	.irq_mask	= ecard_irq_mask,
> +	.irq_unmask	= ecard_irq_unmask,
>  };
>  
>  void ecard_enablefiq(unsigned int fiqnr)
> @@ -551,7 +551,7 @@ static void ecard_check_lockup(struct irq_desc *desc)
>  			printk(KERN_ERR "\nInterrupt lockup detected - "
>  			       "disabling all expansion card interrupts\n");
>  
> -			desc->chip->mask(IRQ_EXPANSIONCARD);
> +			desc->irq_data.chip->irq_mask(&desc->irq_data);
>  			ecard_dump_irq_state();
>  		}
>  	} else
> @@ -574,7 +574,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
>  	ecard_t *ec;
>  	int called = 0;
>  
> -	desc->chip->mask(irq);
> +	desc->irq_data.chip->irq_mask(&desc->irq_data);
>  	for (ec = cards; ec; ec = ec->next) {
>  		int pending;
>  
> @@ -591,7 +591,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
>  			called ++;
>  		}
>  	}
> -	desc->chip->unmask(irq);
> +	desc->irq_data.chip->irq_unmask(&desc->irq_data);
>  
>  	if (called == 0)
>  		ecard_check_lockup(desc);
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 16/54] ARM: footbridge: irq_data conversion.

[Russell King - ARM Linux]

On Tue, Nov 30, 2010 at 02:36:41PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

Note that there's a big with the isa-irq code - it assumes that we still
have the ARM implementation of IRQ support, where there was a global lock.
As this is no longer the case, the read-modify-writes there are no longer
safe and need fixing.

> ---
>  arch/arm/mach-footbridge/common.c  |   14 +++++++-------
>  arch/arm/mach-footbridge/isa-irq.c |   36 ++++++++++++++++++------------------
>  2 files changed, 25 insertions(+), 25 deletions(-)
> 
> diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
> index 88b3dd8..84c5f25 100644
> --- a/arch/arm/mach-footbridge/common.c
> +++ b/arch/arm/mach-footbridge/common.c
> @@ -75,20 +75,20 @@ static const int fb_irq_mask[] = {
>  	IRQ_MASK_PCI_PERR,	/* 19 */
>  };
>  
> -static void fb_mask_irq(unsigned int irq)
> +static void fb_mask_irq(struct irq_data *d)
>  {
> -	*CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
> +	*CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(d->irq)];
>  }
>  
> -static void fb_unmask_irq(unsigned int irq)
> +static void fb_unmask_irq(struct irq_data *d)
>  {
> -	*CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
> +	*CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(d->irq)];
>  }
>  
>  static struct irq_chip fb_chip = {
> -	.ack	= fb_mask_irq,
> -	.mask	= fb_mask_irq,
> -	.unmask = fb_unmask_irq,
> +	.irq_ack	= fb_mask_irq,
> +	.irq_mask	= fb_mask_irq,
> +	.irq_unmask	= fb_unmask_irq,
>  };
>  
>  static void __init __fb_init_irq(void)
> diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
> index 8bfd06a..de7a5cb 100644
> --- a/arch/arm/mach-footbridge/isa-irq.c
> +++ b/arch/arm/mach-footbridge/isa-irq.c
> @@ -30,61 +30,61 @@
>  
>  #include "common.h"
>  
> -static void isa_mask_pic_lo_irq(unsigned int irq)
> +static void isa_mask_pic_lo_irq(struct irq_data *d)
>  {
> -	unsigned int mask = 1 << (irq & 7);
> +	unsigned int mask = 1 << (d->irq & 7);
>  
>  	outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
>  }
>  
> -static void isa_ack_pic_lo_irq(unsigned int irq)
> +static void isa_ack_pic_lo_irq(struct irq_data *d)
>  {
> -	unsigned int mask = 1 << (irq & 7);
> +	unsigned int mask = 1 << (d->irq & 7);
>  
>  	outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
>  	outb(0x20, PIC_LO);
>  }
>  
> -static void isa_unmask_pic_lo_irq(unsigned int irq)
> +static void isa_unmask_pic_lo_irq(struct irq_data *d)
>  {
> -	unsigned int mask = 1 << (irq & 7);
> +	unsigned int mask = 1 << (d->irq & 7);
>  
>  	outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO);
>  }
>  
>  static struct irq_chip isa_lo_chip = {
> -	.ack	= isa_ack_pic_lo_irq,
> -	.mask	= isa_mask_pic_lo_irq,
> -	.unmask = isa_unmask_pic_lo_irq,
> +	.irq_ack	= isa_ack_pic_lo_irq,
> +	.irq_mask	= isa_mask_pic_lo_irq,
> +	.irq_unmask	= isa_unmask_pic_lo_irq,
>  };
>  
> -static void isa_mask_pic_hi_irq(unsigned int irq)
> +static void isa_mask_pic_hi_irq(struct irq_data *d)
>  {
> -	unsigned int mask = 1 << (irq & 7);
> +	unsigned int mask = 1 << (d->irq & 7);
>  
>  	outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
>  }
>  
> -static void isa_ack_pic_hi_irq(unsigned int irq)
> +static void isa_ack_pic_hi_irq(struct irq_data *d)
>  {
> -	unsigned int mask = 1 << (irq & 7);
> +	unsigned int mask = 1 << (d->irq & 7);
>  
>  	outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
>  	outb(0x62, PIC_LO);
>  	outb(0x20, PIC_HI);
>  }
>  
> -static void isa_unmask_pic_hi_irq(unsigned int irq)
> +static void isa_unmask_pic_hi_irq(struct irq_data *d)
>  {
> -	unsigned int mask = 1 << (irq & 7);
> +	unsigned int mask = 1 << (d->irq & 7);
>  
>  	outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI);
>  }
>  
>  static struct irq_chip isa_hi_chip = {
> -	.ack	= isa_ack_pic_hi_irq,
> -	.mask	= isa_mask_pic_hi_irq,
> -	.unmask = isa_unmask_pic_hi_irq,
> +	.irq_ack	= isa_ack_pic_hi_irq,
> +	.irq_mask	= isa_mask_pic_hi_irq,
> +	.irq_unmask	= isa_unmask_pic_hi_irq,
>  };
>  
>  static void
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 19/54] ARM: integrator: irq_data conversion.

[Russell King - ARM Linux]

On Tue, Nov 30, 2010 at 02:36:44PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

> ---
>  arch/arm/mach-integrator/integrator_ap.c |   16 +++++-----
>  arch/arm/mach-integrator/integrator_cp.c |   48 +++++++++++++++---------------
>  2 files changed, 32 insertions(+), 32 deletions(-)
> 
> diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
> index 548208f..ca363c1 100644
> --- a/arch/arm/mach-integrator/integrator_ap.c
> +++ b/arch/arm/mach-integrator/integrator_ap.c
> @@ -156,21 +156,21 @@ static void __init ap_map_io(void)
>  
>  #define INTEGRATOR_SC_VALID_INT	0x003fffff
>  
> -static void sc_mask_irq(unsigned int irq)
> +static void sc_mask_irq(struct irq_data *d)
>  {
> -	writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
> +	writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
>  }
>  
> -static void sc_unmask_irq(unsigned int irq)
> +static void sc_unmask_irq(struct irq_data *d)
>  {
> -	writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET);
> +	writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_SET);
>  }
>  
>  static struct irq_chip sc_chip = {
> -	.name	= "SC",
> -	.ack	= sc_mask_irq,
> -	.mask	= sc_mask_irq,
> -	.unmask = sc_unmask_irq,
> +	.name		= "SC",
> +	.irq_ack	= sc_mask_irq,
> +	.irq_mask	= sc_mask_irq,
> +	.irq_unmask	= sc_unmask_irq,
>  };
>  
>  static void __init ap_init_irq(void)
> diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
> index 6258c90..f0f16d4 100644
> --- a/arch/arm/mach-integrator/integrator_cp.c
> +++ b/arch/arm/mach-integrator/integrator_cp.c
> @@ -147,61 +147,61 @@ static void __init intcp_map_io(void)
>  #define sic_writel	__raw_writel
>  #define sic_readl	__raw_readl
>  
> -static void cic_mask_irq(unsigned int irq)
> +static void cic_mask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_CIC_START;
> +	unsigned int irq = d->irq - IRQ_CIC_START;
>  	cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
>  }
>  
> -static void cic_unmask_irq(unsigned int irq)
> +static void cic_unmask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_CIC_START;
> +	unsigned int irq = d->irq - IRQ_CIC_START;
>  	cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
>  }
>  
>  static struct irq_chip cic_chip = {
> -	.name	= "CIC",
> -	.ack	= cic_mask_irq,
> -	.mask	= cic_mask_irq,
> -	.unmask	= cic_unmask_irq,
> +	.name		= "CIC",
> +	.irq_ack	= cic_mask_irq,
> +	.irq_mask	= cic_mask_irq,
> +	.irq_unmask	= cic_unmask_irq,
>  };
>  
> -static void pic_mask_irq(unsigned int irq)
> +static void pic_mask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_PIC_START;
> +	unsigned int irq = d->irq - IRQ_PIC_START;
>  	pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
>  }
>  
> -static void pic_unmask_irq(unsigned int irq)
> +static void pic_unmask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_PIC_START;
> +	unsigned int irq = d->irq - IRQ_PIC_START;
>  	pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
>  }
>  
>  static struct irq_chip pic_chip = {
> -	.name	= "PIC",
> -	.ack	= pic_mask_irq,
> -	.mask	= pic_mask_irq,
> -	.unmask = pic_unmask_irq,
> +	.name		= "PIC",
> +	.irq_ack	= pic_mask_irq,
> +	.irq_mask	= pic_mask_irq,
> +	.irq_unmask	= pic_unmask_irq,
>  };
>  
> -static void sic_mask_irq(unsigned int irq)
> +static void sic_mask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_SIC_START;
> +	unsigned int irq = d->irq - IRQ_SIC_START;
>  	sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
>  }
>  
> -static void sic_unmask_irq(unsigned int irq)
> +static void sic_unmask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_SIC_START;
> +	unsigned int irq = d->irq - IRQ_SIC_START;
>  	sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
>  }
>  
>  static struct irq_chip sic_chip = {
> -	.name	= "SIC",
> -	.ack	= sic_mask_irq,
> -	.mask	= sic_mask_irq,
> -	.unmask	= sic_unmask_irq,
> +	.name		= "SIC",
> +	.irq_ack	= sic_mask_irq,
> +	.irq_mask	= sic_mask_irq,
> +	.irq_unmask	= sic_unmask_irq,
>  };
>  
>  static void
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 39/54] ARM: rpc: irq_data conversion.

[Russell King - ARM Linux]

On Tue, Nov 30, 2010 at 02:41:11PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

> ---
>  arch/arm/mach-rpc/irq.c |   60 +++++++++++++++++++++++-----------------------
>  1 files changed, 30 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
> index 9dd15d6..d29cd9b 100644
> --- a/arch/arm/mach-rpc/irq.c
> +++ b/arch/arm/mach-rpc/irq.c
> @@ -6,110 +6,110 @@
>  #include <asm/hardware/iomd.h>
>  #include <asm/irq.h>
>  
> -static void iomd_ack_irq_a(unsigned int irq)
> +static void iomd_ack_irq_a(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << irq;
> +	mask = 1 << d->irq;
>  	val = iomd_readb(IOMD_IRQMASKA);
>  	iomd_writeb(val & ~mask, IOMD_IRQMASKA);
>  	iomd_writeb(mask, IOMD_IRQCLRA);
>  }
>  
> -static void iomd_mask_irq_a(unsigned int irq)
> +static void iomd_mask_irq_a(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << irq;
> +	mask = 1 << d->irq;
>  	val = iomd_readb(IOMD_IRQMASKA);
>  	iomd_writeb(val & ~mask, IOMD_IRQMASKA);
>  }
>  
> -static void iomd_unmask_irq_a(unsigned int irq)
> +static void iomd_unmask_irq_a(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << irq;
> +	mask = 1 << d->irq;
>  	val = iomd_readb(IOMD_IRQMASKA);
>  	iomd_writeb(val | mask, IOMD_IRQMASKA);
>  }
>  
>  static struct irq_chip iomd_a_chip = {
> -	.ack	= iomd_ack_irq_a,
> -	.mask	= iomd_mask_irq_a,
> -	.unmask = iomd_unmask_irq_a,
> +	.irq_ack	= iomd_ack_irq_a,
> +	.irq_mask	= iomd_mask_irq_a,
> +	.irq_unmask	= iomd_unmask_irq_a,
>  };
>  
> -static void iomd_mask_irq_b(unsigned int irq)
> +static void iomd_mask_irq_b(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << (irq & 7);
> +	mask = 1 << (d->irq & 7);
>  	val = iomd_readb(IOMD_IRQMASKB);
>  	iomd_writeb(val & ~mask, IOMD_IRQMASKB);
>  }
>  
> -static void iomd_unmask_irq_b(unsigned int irq)
> +static void iomd_unmask_irq_b(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << (irq & 7);
> +	mask = 1 << (d->irq & 7);
>  	val = iomd_readb(IOMD_IRQMASKB);
>  	iomd_writeb(val | mask, IOMD_IRQMASKB);
>  }
>  
>  static struct irq_chip iomd_b_chip = {
> -	.ack	= iomd_mask_irq_b,
> -	.mask	= iomd_mask_irq_b,
> -	.unmask = iomd_unmask_irq_b,
> +	.irq_ack	= iomd_mask_irq_b,
> +	.irq_mask	= iomd_mask_irq_b,
> +	.irq_unmask	= iomd_unmask_irq_b,
>  };
>  
> -static void iomd_mask_irq_dma(unsigned int irq)
> +static void iomd_mask_irq_dma(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << (irq & 7);
> +	mask = 1 << (d->irq & 7);
>  	val = iomd_readb(IOMD_DMAMASK);
>  	iomd_writeb(val & ~mask, IOMD_DMAMASK);
>  }
>  
> -static void iomd_unmask_irq_dma(unsigned int irq)
> +static void iomd_unmask_irq_dma(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << (irq & 7);
> +	mask = 1 << (d->irq & 7);
>  	val = iomd_readb(IOMD_DMAMASK);
>  	iomd_writeb(val | mask, IOMD_DMAMASK);
>  }
>  
>  static struct irq_chip iomd_dma_chip = {
> -	.ack	= iomd_mask_irq_dma,
> -	.mask	= iomd_mask_irq_dma,
> -	.unmask = iomd_unmask_irq_dma,
> +	.irq_ack	= iomd_mask_irq_dma,
> +	.irq_mask	= iomd_mask_irq_dma,
> +	.irq_unmask	= iomd_unmask_irq_dma,
>  };
>  
> -static void iomd_mask_irq_fiq(unsigned int irq)
> +static void iomd_mask_irq_fiq(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << (irq & 7);
> +	mask = 1 << (d->irq & 7);
>  	val = iomd_readb(IOMD_FIQMASK);
>  	iomd_writeb(val & ~mask, IOMD_FIQMASK);
>  }
>  
> -static void iomd_unmask_irq_fiq(unsigned int irq)
> +static void iomd_unmask_irq_fiq(struct irq_data *d)
>  {
>  	unsigned int val, mask;
>  
> -	mask = 1 << (irq & 7);
> +	mask = 1 << (d->irq & 7);
>  	val = iomd_readb(IOMD_FIQMASK);
>  	iomd_writeb(val | mask, IOMD_FIQMASK);
>  }
>  
>  static struct irq_chip iomd_fiq_chip = {
> -	.ack	= iomd_mask_irq_fiq,
> -	.mask	= iomd_mask_irq_fiq,
> -	.unmask = iomd_unmask_irq_fiq,
> +	.irq_ack	= iomd_mask_irq_fiq,
> +	.irq_mask	= iomd_mask_irq_fiq,
> +	.irq_unmask	= iomd_unmask_irq_fiq,
>  };
>  
>  void __init rpc_init_irq(void)
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 47/54] ARM: versatile: irq_data conversion.

[Russell King - ARM Linux]

On Tue, Nov 30, 2010 at 02:41:19PM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

> ---
>  arch/arm/mach-versatile/core.c |   16 ++++++++--------
>  1 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
> index e38acb0..9b9b6fa 100644
> --- a/arch/arm/mach-versatile/core.c
> +++ b/arch/arm/mach-versatile/core.c
> @@ -62,23 +62,23 @@
>  #define VA_VIC_BASE		__io_address(VERSATILE_VIC_BASE)
>  #define VA_SIC_BASE		__io_address(VERSATILE_SIC_BASE)
>  
> -static void sic_mask_irq(unsigned int irq)
> +static void sic_mask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_SIC_START;
> +	unsigned int irq = d->irq - IRQ_SIC_START;
>  	writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
>  }
>  
> -static void sic_unmask_irq(unsigned int irq)
> +static void sic_unmask_irq(struct irq_data *d)
>  {
> -	irq -= IRQ_SIC_START;
> +	unsigned int irq = d->irq - IRQ_SIC_START;
>  	writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
>  }
>  
>  static struct irq_chip sic_chip = {
> -	.name	= "SIC",
> -	.ack	= sic_mask_irq,
> -	.mask	= sic_mask_irq,
> -	.unmask	= sic_unmask_irq,
> +	.name		= "SIC",
> +	.irq_ack	= sic_mask_irq,
> +	.irq_mask	= sic_mask_irq,
> +	.irq_unmask	= sic_unmask_irq,
>  };
>  
>  static void
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 20/54] ARM: iop13xx: irq_data conversion.

[Dan Williams]

On Tue, Nov 30, 2010 at 5:36 AM, Lennert Buytenhek
<buytenh@wantstofly.org> wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---

Acked-by: Dan Williams <dan.j.williams@intel.com>

...and 21/54, 22/54.


--
Dan

[PATCH 08/54] ARM: aaec2000: irq_data conversion.

[Sergei Shtylyov]

Hello.

On 30-11-2010 16:25, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek<buytenh@secretlab.ca>
[...]

> diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
> index 3ef6833..f8465bd 100644
> --- a/arch/arm/mach-aaec2000/core.c
> +++ b/arch/arm/mach-aaec2000/core.c
> @@ -68,25 +68,25 @@ void __init aaec2000_map_io(void)
>   /*
>    * Interrupt handling routines
>    */
> -static void aaec2000_int_ack(unsigned int irq)
> +static void aaec2000_int_ack(struct irq_data *d)
>   {
> -	IRQ_INTSR = 1<<  irq;
> +	IRQ_INTSR = 1<<  d->irq;
>   }
>
> -static void aaec2000_int_mask(unsigned int irq)
> +static void aaec2000_int_mask(struct irq_data *d)
>   {
> -	IRQ_INTENC |= (1<<  irq);
> +	IRQ_INTENC |= (1<<  d->irq);
>   }
>
> -static void aaec2000_int_unmask(unsigned int irq)
> +static void aaec2000_int_unmask(struct irq_data *d)
>   {
> -	IRQ_INTENS |= (1<<  irq);
> +	IRQ_INTENS |= (1<<  d->irq);
>   }

    Probably could have dropped useless parens, while at it...

WBR, Sergei

[PATCH 12/54] ARM: davinci: irq_data conversion.

[Sergei Shtylyov]

Hello.

On 30-11-2010 16:36, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek<buytenh@secretlab.ca>
[...]

> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> index 784ddf3..f5f417e 100644
> --- a/arch/arm/mach-davinci/irq.c
> +++ b/arch/arm/mach-davinci/irq.c
> @@ -53,14 +53,14 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
[...]
> @@ -91,23 +91,23 @@ static void davinci_unmask_irq(unsigned int irq)
[...]
>   static struct irq_chip davinci_irq_chip_0 = {
> -	.name	= "AINTC",
> -	.ack	= davinci_ack_irq,
> -	.mask	= davinci_mask_irq,
> -	.unmask = davinci_unmask_irq,
> +	.name		= "AINTC",
> +	.irq_ack	= davinci_ack_irq,
> +	.irq_mask	= davinci_mask_irq,
> +	.irq_unmask = davinci_unmask_irq,

    Er, you forgot to align it?

WBR, Sergei

[PATCH 22/54] ARM: iop33x: irq_data conversion.

[Sergei Shtylyov]

On 30-11-2010 16:36, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek<buytenh@secretlab.ca>
[...]

> diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
> index abb4ea2..0ff2f74 100644
> --- a/arch/arm/mach-iop33x/irq.c
> +++ b/arch/arm/mach-iop33x/irq.c
> @@ -53,45 +53,45 @@ static void intsize_write(u32 val)
[...]
>   static void
> -iop33x_irq_unmask2(unsigned int irq)
> +iop33x_irq_unmask2(struct irq_data *d)
>   {
> -	iop33x_mask1 |= (1 << (irq - 32));
> +	iop33x_mask1 |= (1 << (d->irq - 32));

    Probably could have dropped useless parens, while at it...

WBR, Sergei

[PATCH 08/54] ARM: aaec2000: irq_data conversion.

[Russell King - ARM Linux]

On Mon, Dec 06, 2010 at 02:27:46PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 30-11-2010 16:25, Lennert Buytenhek wrote:
>
>> Signed-off-by: Lennert Buytenhek<buytenh@secretlab.ca>
> [...]
>
>> diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
>> index 3ef6833..f8465bd 100644
>> --- a/arch/arm/mach-aaec2000/core.c
>> +++ b/arch/arm/mach-aaec2000/core.c
>> @@ -68,25 +68,25 @@ void __init aaec2000_map_io(void)
>>   /*
>>    * Interrupt handling routines
>>    */
>> -static void aaec2000_int_ack(unsigned int irq)
>> +static void aaec2000_int_ack(struct irq_data *d)
>>   {
>> -	IRQ_INTSR = 1<<  irq;
>> +	IRQ_INTSR = 1<<  d->irq;
>>   }
>>
>> -static void aaec2000_int_mask(unsigned int irq)
>> +static void aaec2000_int_mask(struct irq_data *d)
>>   {
>> -	IRQ_INTENC |= (1<<  irq);
>> +	IRQ_INTENC |= (1<<  d->irq);
>>   }
>>
>> -static void aaec2000_int_unmask(unsigned int irq)
>> +static void aaec2000_int_unmask(struct irq_data *d)
>>   {
>> -	IRQ_INTENS |= (1<<  irq);
>> +	IRQ_INTENS |= (1<<  d->irq);
>>   }
>
>    Probably could have dropped useless parens, while at it...

That depends how you look at it.  Lennert's change is just the minimalist
change required for this patch, which is good.

The parens and whitespace issues should be a separate patch.

[PATCH 47/54] ARM: versatile: irq_data conversion.

[Sergei Shtylyov]

On 30-11-2010 16:41, Lennert Buytenhek wrote:

> Signed-off-by: Lennert Buytenhek<buytenh@secretlab.ca>
[...]

> diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
> index e38acb0..9b9b6fa 100644
> --- a/arch/arm/mach-versatile/core.c
> +++ b/arch/arm/mach-versatile/core.c
> @@ -62,23 +62,23 @@
>   #define VA_VIC_BASE		__io_address(VERSATILE_VIC_BASE)
>   #define VA_SIC_BASE		__io_address(VERSATILE_SIC_BASE)
>
> -static void sic_mask_irq(unsigned int irq)
> +static void sic_mask_irq(struct irq_data *d)
>   {
> -	irq -= IRQ_SIC_START;
> +	unsigned int irq = d->irq - IRQ_SIC_START;

    Perhaps should've inserted an empty line here...

>   	writel(1<<  irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
>   }
>
> -static void sic_unmask_irq(unsigned int irq)
> +static void sic_unmask_irq(struct irq_data *d)
>   {
> -	irq -= IRQ_SIC_START;
> +	unsigned int irq = d->irq - IRQ_SIC_START;

    Here too.

>   	writel(1<<  irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
>   }

WBR, Sergei

[PATCH 47/54] ARM: versatile: irq_data conversion.

[Russell King - ARM Linux]

On Mon, Dec 06, 2010 at 03:10:24PM +0300, Sergei Shtylyov wrote:
>> -	irq -= IRQ_SIC_START;
>> +	unsigned int irq = d->irq - IRQ_SIC_START;
>
>    Perhaps should've inserted an empty line here...
>
>>   	writel(1<<  irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);

Oh, it's _your_ mailer which is totally buggering up the spacing.  Please
get an email client which doesn't think it has the right to randomly
reformat text.

[PATCH 50/54] ARM: plat-nomadik: irq_data conversion.

[Rabin Vincent]

On Tue, Nov 30, 2010 at 14:41:22 +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
>  arch/arm/plat-nomadik/gpio.c |   56 +++++++++++++++++++++---------------------
>  1 files changed, 28 insertions(+), 28 deletions(-)

Acked-by: Rabin Vincent <rabin.vincent@stericsson.com>

[PATCH 15/54] ARM: ep93xx: irq_data conversion.

[Lennert Buytenhek]

On Wed, Dec 01, 2010 at 01:26:38PM +1300, Ryan Mallon wrote:

> >>> -static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
> >>> +static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
> >>>  {
> >>> -	struct irq_desc *desc = irq_desc + irq;
> >>> -	const int gpio = irq_to_gpio(irq);
> >>> +	struct irq_desc *desc = irq_desc + d->irq;
> >>
> >> Is this still correct? I haven't followed much of the irq_data
> >> discussion, but this post (https://patchwork.kernel.org/patch/230221/)
> >> says that with sparse irq converting irq number to irq_desc is now a
> >> radix tree lookup.
> >>
> >> I get the impression from the above email that we should be avoiding
> >> using irq_desc directly in these functions?
> > 
> > You are correct in that this construct is no longer valid with
> > CONFIG_SPARSE_IRQ.  It should be using irq_to_desc() instead, or
> > actually, it should not be looking at the irq_desc here at all.
> > 
> > What ep93xx wants to achieve should be possible to achieve by just
> > calling set_irq_handler() instead of frobbing fields in the irq_desc
> > directly -- that would work, right?
> 
> I think set_irq_handler should be okay. The other way would be to use
> irq_to_desc for the lookup.

I can do that, but that's really an orthogonal issue, and ought to be
a separate patch.

Are you OK with this patch as-is?

[PATCH 40/54] ARM: Samsung SoCs: irq_data conversion.

['Lennert Buytenhek']

On Fri, Dec 03, 2010 at 08:56:03PM +0900, Kukjin Kim wrote:

> > Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> > ---
> >  arch/arm/mach-s3c2410/bast-irq.c         |   22 ++--
> >  arch/arm/mach-s3c2412/irq.c              |   50 +++++-----
> >  arch/arm/mach-s3c2416/irq.c              |   72 +++++++-------
> >  arch/arm/mach-s3c2440/irq.c              |   18 ++--
> >  arch/arm/mach-s3c2440/s3c244x-irq.c      |   18 ++--
> >  arch/arm/mach-s3c2443/irq.c              |   90 ++++++++--------
> >  arch/arm/mach-s3c64xx/irq-eint.c         |   34 +++---
> >  arch/arm/mach-s5pv310/irq-combiner.c     |   26 +++--
> >  arch/arm/mach-s5pv310/irq-eint.c         |   55 +++++-----
> >  arch/arm/plat-s3c24xx/include/plat/irq.h |    4 +-
> >  arch/arm/plat-s3c24xx/irq-pm.c           |    9 +-
> >  arch/arm/plat-s3c24xx/irq.c              |  170
> +++++++++++++++-------------
> > --
> >  arch/arm/plat-s5p/irq-eint.c             |   84 ++++++++--------
> >  arch/arm/plat-s5p/irq-gpioint.c          |   50 +++++-----
> >  arch/arm/plat-s5p/irq-pm.c               |    6 +-
> >  arch/arm/plat-samsung/include/plat/pm.h  |    4 +-
> >  arch/arm/plat-samsung/irq-uart.c         |   44 ++++----
> >  arch/arm/plat-samsung/irq-vic-timer.c    |   22 ++--
> >  arch/arm/plat-samsung/pm.c               |    7 +-
> >  19 files changed, 396 insertions(+), 389 deletions(-)
> 
> Hi Lennert,

Hi Kukjin,


> (Added Mark Brown in Cc)
> 
> Looks ok to me but there are some comments.
> 
> Firstly, how about to separate this to regarding S3C24XX(mach-s3c24xx and
> plat-s3c24xx), S5P(mach-s5pxxxx and plat-s5p) and plat-samsung?
> (Actually, already applied S3C64XX changes so that we can drop that in your
> patch.)

The reason I originally put everything into one patch is that the
change touches s3c_irqext_wake(), which is defined in plat-samsung
and used in mach-s3c64xx, mach-s5pv310, plat-s3c24xx and plat-s5p --
so just splitting the patch across directory boundaries wouldn't work.

Since the s3c_irqext_wake() change is already in your tree, that
argument isn't valid anymore, but..


> As you know, I already applied some changes which is from Mark Brown in my
> tree.
> You can find that in
> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
> #for-next
> 
> So could you please re-work this based on that?

..wouldn't it just be easier if you merged the remainder of this
patch via your tree, so as not to introduce a merge dependency between
our trees?


> >  static struct irq_chip  bast_pc104_chip = {
> > -	.mask	     = bast_pc104_mask,
> > -	.unmask	     = bast_pc104_unmask,
> > -	.ack	     = bast_pc104_maskack
> > +	.irq_mask	= bast_pc104_mask,
> > +	.irq_unmask     = bast_pc104_unmask,
>                    ^^^^
> Tab is better instead of white space.

I agree, but the original version also had spaces -- and people
appear to get nervous when they perceive you to be sneaking in
'cleanup' patches along with your changes.


> > -static void s3c2416_irq_lcd_ack(unsigned int irqno)
> > +static void s3c2416_irq_lcd_ack(struct irq_data *d)
> >  {
> > -	s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
> > +	s3c_irqsub_maskack(d->irq, INTMSK_LCD, SUBMSK_LCD);
> >  }
> > 
> >  static struct irq_chip s3c2416_irq_lcd = {
> > -	.mask	    = s3c2416_irq_lcd_mask,
> > -	.unmask	    = s3c2416_irq_lcd_unmask,
> > -	.ack	    = s3c2416_irq_lcd_ack,
> > +	.irq_mask	= s3c2416_irq_lcd_mask,
> > +	.irq_unmask	= s3c2416_irq_lcd_unmask,
> > +	.irq_ack	= s3c2416_irq_lcd_ack,
> >  };
> > 
> > 
> > @@ -142,25 +142,25 @@ static void s3c2416_irq_demux_dma(unsigned int irq,
> > struct irq_desc *desc)
> >  #define SUBMSK_DMA	INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
> > 
> > 
> 
> If possible, please remove useless empty line.
> As you know, just one empty line is enough :-)

The original blank line was already there, and I left it there for
reasons stated above.


> > diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-
> > s3c2440/s3c244x-irq.c
> > index a75c0c2..3878c0a 100644
> > --- a/arch/arm/mach-s3c2440/s3c244x-irq.c
> > +++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
> > @@ -68,27 +68,27 @@ static void s3c_irq_demux_cam(unsigned int irq,
> >  #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
> > 
> >  static void
> > -s3c_irq_cam_mask(unsigned int irqno)
> > +s3c_irq_cam_mask(struct irq_data *d)
> >  {
> > -	s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
> > +	s3c_irqsub_mask(d->irq, INTMSK_CAM, 3<<11);
> 
> 3 << 11
> Need to add blank around "<<"

See above.


> >  static struct irq_chip s3c2443_irq_lcd = {
> > -	.mask	    = s3c2443_irq_lcd_mask,
> > -	.unmask	    = s3c2443_irq_lcd_unmask,
> > -	.ack	    = s3c2443_irq_lcd_ack,
> > +	.irq_mask	= s3c2443_irq_lcd_mask,
> > +	.irq_unmask	= s3c2443_irq_lcd_unmask,
> > +	.irq_ack	= s3c2443_irq_lcd_ack,
> >  };
> 
> Same...please remove useless empty line.

See above.


thanks,
Lennert

[PATCH 15/54] ARM: ep93xx: irq_data conversion.

[Ryan Mallon]

On 12/15/2010 08:28 AM, Lennert Buytenhek wrote:
> On Wed, Dec 01, 2010 at 01:26:38PM +1300, Ryan Mallon wrote:
> 
>>>>> -static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
>>>>> +static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
>>>>>  {
>>>>> -	struct irq_desc *desc = irq_desc + irq;
>>>>> -	const int gpio = irq_to_gpio(irq);
>>>>> +	struct irq_desc *desc = irq_desc + d->irq;
>>>>
>>>> Is this still correct? I haven't followed much of the irq_data
>>>> discussion, but this post (https://patchwork.kernel.org/patch/230221/)
>>>> says that with sparse irq converting irq number to irq_desc is now a
>>>> radix tree lookup.
>>>>
>>>> I get the impression from the above email that we should be avoiding
>>>> using irq_desc directly in these functions?
>>>
>>> You are correct in that this construct is no longer valid with
>>> CONFIG_SPARSE_IRQ.  It should be using irq_to_desc() instead, or
>>> actually, it should not be looking at the irq_desc here at all.
>>>
>>> What ep93xx wants to achieve should be possible to achieve by just
>>> calling set_irq_handler() instead of frobbing fields in the irq_desc
>>> directly -- that would work, right?
>>
>> I think set_irq_handler should be okay. The other way would be to use
>> irq_to_desc for the lookup.
> 
> I can do that, but that's really an orthogonal issue, and ought to be
> a separate patch.
> 
> Are you OK with this patch as-is?

Yes. We don't select SPARSE_IRQ for EP93xx so it's not a pressing issue.
The code should be fixed to be correct though, but as you say this is a
separate issue and can be handled with another patch.

~Ryan

-- 
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com         	PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com	New Zealand
Phone: +64 3 3779127		Freecall: Australia 1800 148 751
Fax:   +64 3 3779135			  USA 1800 261 2934

[PATCH 40/54] ARM: Samsung SoCs: irq_data conversion.

['Lennert Buytenhek']

On Fri, Dec 03, 2010 at 08:56:03PM +0900, Kukjin Kim wrote:

> Hi Lennert,

Hi again,


> (Added Mark Brown in Cc)
> 
> Looks ok to me but there are some comments.
> 
> Firstly, how about to separate this to regarding S3C24XX(mach-s3c24xx and
> plat-s3c24xx), S5P(mach-s5pxxxx and plat-s5p) and plat-samsung?
> (Actually, already applied S3C64XX changes so that we can drop that in your
> patch.)
> 
> As you know, I already applied some changes which is from Mark Brown in my
> tree.
> You can find that in
> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
> #for-next
> 
> So could you please re-work this based on that?

I've reworked the patch I had in my tree on top of your git tree
(latest commit "Merge branch 'next-s5p64x0' into for-next"), and came
up with the three attached patches.  I've incorporated the whitespace
changes you requested, and changed the struct irq_data * variable
names from 'd' to 'data' to match Mark's earlier patches.

Caveat emptor -- uncompiled, and totally untested.

How's this look?

Feel free to merge this via your tree -- I'll drop the Samsung patch
from my tree then.


thanks,
Lennert

[PATCH 40/54] ARM: Samsung SoCs: irq_data conversion.

[Kukjin Kim]

Lennert Buytenhek wrote:
> 
> On Fri, Dec 03, 2010 at 08:56:03PM +0900, Kukjin Kim wrote:
> 
> > Hi Lennert,
> 
> Hi again,
> 
Hi :-)

> 
> > (Added Mark Brown in Cc)
> >
> > Looks ok to me but there are some comments.
> >
> > Firstly, how about to separate this to regarding S3C24XX(mach-s3c24xx
and
> > plat-s3c24xx), S5P(mach-s5pxxxx and plat-s5p) and plat-samsung?
> > (Actually, already applied S3C64XX changes so that we can drop that in
your
> > patch.)
> >
> > As you know, I already applied some changes which is from Mark Brown in
my
> > tree.
> > You can find that in
> > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
> > #for-next
> >
> > So could you please re-work this based on that?
> 
> I've reworked the patch I had in my tree on top of your git tree
> (latest commit "Merge branch 'next-s5p64x0' into for-next"), and came
> up with the three attached patches.  I've incorporated the whitespace
> changes you requested, and changed the struct irq_data * variable
> names from 'd' to 'data' to match Mark's earlier patches.
> 
Ok...thanks.

> Caveat emptor -- uncompiled, and totally untested.
> 
> How's this look?
> 
Looks ok to me ;-)

> Feel free to merge this via your tree -- I'll drop the Samsung patch
> from my tree then.
> 
Ok...will apply after some tests and if any problems, let you know.

Thanks again.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 40/54] ARM: Samsung SoCs: irq_data conversion.

[Kukjin Kim]

Lennert Buytenhek wrote:
> 
> On Fri, Dec 03, 2010 at 08:56:03PM +0900, Kukjin Kim wrote:
> 
> > Hi Lennert,
> 
> Hi again,
> 
> 
> > (Added Mark Brown in Cc)
> >
> > Looks ok to me but there are some comments.
> >
> > Firstly, how about to separate this to regarding S3C24XX(mach-s3c24xx
and
> > plat-s3c24xx), S5P(mach-s5pxxxx and plat-s5p) and plat-samsung?
> > (Actually, already applied S3C64XX changes so that we can drop that in
your
> > patch.)
> >
> > As you know, I already applied some changes which is from Mark Brown in
my
> > tree.
> > You can find that in
> > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
> > #for-next
> >
> > So could you please re-work this based on that?
> 
> I've reworked the patch I had in my tree on top of your git tree
> (latest commit "Merge branch 'next-s5p64x0' into for-next"), and came
> up with the three attached patches.  I've incorporated the whitespace
> changes you requested, and changed the struct irq_data * variable
> names from 'd' to 'data' to match Mark's earlier patches.
> 
> Caveat emptor -- uncompiled, and totally untested.
> 
> How's this look?
> 
> Feel free to merge this via your tree -- I'll drop the Samsung patch
> from my tree then.
> 

Hi Lennert :-)

I found your different e-mail in your patch like following.

"From: Lennert Buytenhek <buytenh@wantstofly.org>"
...
"Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>"

I think, should be used same e-mail address.
Which one do you want to use?...

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 40/54] ARM: Samsung SoCs: irq_data conversion.

['Lennert Buytenhek']

On Tue, Dec 21, 2010 at 07:03:45PM +0900, Kukjin Kim wrote:

> > > (Added Mark Brown in Cc)
> > >
> > > Looks ok to me but there are some comments.
> > >
> > > Firstly, how about to separate this to regarding S3C24XX(mach-s3c24xx
> and
> > > plat-s3c24xx), S5P(mach-s5pxxxx and plat-s5p) and plat-samsung?
> > > (Actually, already applied S3C64XX changes so that we can drop that in
> your
> > > patch.)
> > >
> > > As you know, I already applied some changes which is from Mark Brown in
> my
> > > tree.
> > > You can find that in
> > > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
> > > #for-next
> > >
> > > So could you please re-work this based on that?
> > 
> > I've reworked the patch I had in my tree on top of your git tree
> > (latest commit "Merge branch 'next-s5p64x0' into for-next"), and came
> > up with the three attached patches.  I've incorporated the whitespace
> > changes you requested, and changed the struct irq_data * variable
> > names from 'd' to 'data' to match Mark's earlier patches.
> > 
> > Caveat emptor -- uncompiled, and totally untested.
> > 
> > How's this look?
> > 
> > Feel free to merge this via your tree -- I'll drop the Samsung patch
> > from my tree then.
> 
> Hi Lennert :-)

Hello,


> I found your different e-mail in your patch like following.
> 
> "From: Lennert Buytenhek <buytenh@wantstofly.org>"
> ...
> "Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>"
> 
> I think, should be used same e-mail address.
> Which one do you want to use?...

I don't think there is a requirement to use the same one for both,
but if it bothers you, please use the latter one.


thanks,
Lennert

[PATCH 47/54] ARM: versatile: irq_data conversion.

[Sergei Shtylyov]

Hello.

Russell King - ARM Linux wrote:

>>> -	irq -= IRQ_SIC_START;
>>> +	unsigned int irq = d->irq - IRQ_SIC_START;

>>    Perhaps should've inserted an empty line here...

>>>   	writel(1<<  irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);

> Oh, it's _your_ mailer which is totally buggering up the spacing.  Please
> get an email client which doesn't think it has the right to randomly
> reformat text.

    Thunderbird is not exactly only my client. :-)
    And I haven't noticed it randomly reformatting text before. What it does is 
eating spaces before & in the quoted text (and inserting them afterwards).

WBR, Sergei

[PATCH 01/54] ARM: core irq_data conversion.

[Russell King - ARM Linux]

On Tue, Nov 30, 2010 at 02:25:32PM +0100, Lennert Buytenhek wrote:
> @@ -169,10 +169,11 @@ int __init arch_probe_nr_irqs(void)
>  
>  static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
>  {
> -	pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->node, cpu);
> +	pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->irq_data.node, cpu);
>  
>  	raw_spin_lock_irq(&desc->lock);
> -	desc->chip->set_affinity(irq, cpumask_of(cpu));
> +	desc->irq_data.chip->irq_set_affinity(&desc->irq_data,
> +					      cpumask_of(cpu), false);

Shouldn't this be 'true' to force the IRQ to move?  The old CPU is
going down so it's not really optional.

[PATCH 01/54] ARM: core irq_data conversion.

[Lennert Buytenhek]

On Fri, Jan 14, 2011 at 04:24:17PM +0000, Russell King - ARM Linux wrote:

> >  static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
> >  {
> > -	pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->node, cpu);
> > +	pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->irq_data.node, cpu);
> >  
> >  	raw_spin_lock_irq(&desc->lock);
> > -	desc->chip->set_affinity(irq, cpumask_of(cpu));
> > +	desc->irq_data.chip->irq_set_affinity(&desc->irq_data,
> > +					      cpumask_of(cpu), false);
> 
> Shouldn't this be 'true' to force the IRQ to move?  The old CPU is
> going down so it's not really optional.

Right, that makes sense.  Can you make that change?